Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}
dashboard | hierarchy | modlist | groups | tests | asserts


Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 2327789 1 T1 187 T2 151 T3 151
values[2] 168869 1 T1 12 T2 12 T3 11
values[3] 39431 1 T8 66 T9 2 T4 1
values[4] 24058 1 T8 41 T32 1 T248 1
values[5] 16841 1 T8 34 T32 1 T57 1
values[6] 13053 1 T8 26 T32 1 T39 126
values[7] 10627 1 T8 34 T32 1 T39 111
values[8] 9161 1 T8 70 T32 1 T39 93
values[9] 7830 1 T8 43 T32 1 T39 83
values[10] 6581 1 T8 21 T32 1 T39 94
values[11] 6156 1 T8 28 T32 1 T39 90
values[12] 5554 1 T8 26 T32 1 T39 76
values[13] 4930 1 T8 28 T32 1 T39 64
values[14] 4590 1 T8 5 T32 1 T39 73
values[15] 3987 1 T8 3 T32 1 T39 79
values[16] 3765 1 T8 3 T32 1 T39 70
values[17] 3586 1 T8 9 T32 1 T39 54
values[18] 3356 1 T8 3 T32 1 T39 58
values[19] 3129 1 T8 3 T32 1 T39 69
values[20] 2832 1 T8 1 T32 1 T39 57
values[21] 2669 1 T8 1 T32 1 T39 63
values[22] 2595 1 T8 2 T32 1 T39 59
values[23] 2444 1 T8 3 T32 1 T39 76
values[24] 2319 1 T8 4 T32 1 T39 67
values[25] 2348 1 T8 4 T32 1 T39 43
values[26] 2199 1 T8 2 T32 1 T39 42
values[27] 2109 1 T8 1 T32 1 T39 64
values[28] 1976 1 T8 2 T32 1 T39 79
values[29] 1898 1 T8 1 T32 1 T39 63
values[30] 1840 1 T8 2 T32 1 T39 55
values[31] 1734 1 T8 2 T32 1 T39 33
values[32] 1684 1 T8 3 T32 1 T39 21
values[33] 1646 1 T8 1 T32 1 T39 26
values[34] 1623 1 T8 1 T32 1 T39 32
values[35] 1563 1 T8 3 T32 1 T39 30
values[36] 1557 1 T8 5 T32 1 T39 19
values[37] 1429 1 T8 2 T32 1 T39 14
values[38] 1480 1 T8 3 T32 1 T39 21
values[39] 1470 1 T8 3 T32 1 T39 13
values[40] 1418 1 T8 1 T32 1 T39 15
values[41] 1368 1 T8 2 T32 1 T39 22
values[42] 1411 1 T8 4 T32 1 T39 32
values[43] 1409 1 T8 1 T32 1 T39 37
values[44] 1382 1 T8 3 T32 1 T39 25
values[45] 1341 1 T8 1 T32 1 T39 10
values[46] 1333 1 T8 1 T32 1 T39 24
values[47] 1357 1 T8 3 T32 1 T39 13
values[48] 1253 1 T8 1 T32 1 T39 16
values[49] 1231 1 T8 1 T32 1 T39 13
values[50] 1222 1 T8 1 T32 1 T39 10
values[51] 1255 1 T8 1 T32 1 T39 5
values[52] 1266 1 T8 1 T32 1 T39 7
values[53] 1231 1 T8 3 T32 1 T39 12
values[54] 1209 1 T8 5 T32 1 T39 10
values[55] 1173 1 T8 2 T32 1 T39 12
values[56] 1208 1 T8 2 T32 1 T39 14
values[57] 1211 1 T8 1 T32 1 T39 8
values[58] 1207 1 T8 2 T32 1 T39 5
values[59] 1246 1 T8 3 T32 1 T39 13
values[60] 1283 1 T8 4 T32 1 T39 21
values[61] 1572 1 T8 4 T32 1 T39 30
values[62] 2667 1 T8 18 T32 1 T39 61
values[63] 7578 1 T8 39 T32 1 T39 166
values[64] 104043 1 T8 72 T32 172 T39 237


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 2377157 1 T1 96 T2 99 T3 144
values[2] 398504 1 T1 21 T2 26 T3 40
values[3] 41288 1 T2 2 T11 4 T7 5
values[4] 8447 1 T8 2 T9 1 T24 1
values[5] 3979 1 T25 1 T22 1 T248 1
values[6] 2909 1 T25 1 T248 1 T57 2
values[7] 2401 1 T57 1 T39 11 T269 1
values[8] 1955 1 T57 1 T39 3 T269 2
values[9] 1686 1 T57 3 T39 1 T269 4
values[10] 1514 1 T57 2 T39 5 T269 1
values[11] 1392 1 T57 2 T39 3 T269 1
values[12] 1276 1 T57 2 T39 6 T269 2
values[13] 1286 1 T57 2 T39 6 T269 2
values[14] 1182 1 T57 2 T39 5 T269 1
values[15] 1083 1 T57 2 T39 9 T269 1
values[16] 949 1 T57 2 T39 10 T269 1
values[17] 990 1 T57 2 T39 13 T269 3
values[18] 928 1 T57 2 T39 12 T269 2
values[19] 862 1 T57 2 T39 9 T269 2
values[20] 818 1 T57 2 T39 4 T269 1
values[21] 740 1 T57 2 T39 5 T269 3
values[22] 795 1 T57 2 T39 1 T269 1
values[23] 755 1 T57 2 T269 3 T90 3
values[24] 703 1 T57 2 T269 2 T90 3
values[25] 707 1 T57 2 T269 3 T90 4
values[26] 628 1 T57 2 T269 1 T90 3
values[27] 636 1 T57 2 T269 1 T90 4
values[28] 628 1 T57 1 T269 2 T90 4
values[29] 550 1 T57 1 T269 7 T90 3
values[30] 546 1 T57 1 T269 3 T90 4
values[31] 505 1 T57 1 T269 1 T90 6
values[32] 512 1 T57 4 T269 1 T90 3
values[33] 497 1 T57 2 T269 4 T90 7
values[34] 478 1 T57 2 T269 1 T90 3
values[35] 490 1 T57 2 T269 1 T90 5
values[36] 500 1 T57 2 T269 1 T90 3
values[37] 458 1 T57 2 T269 1 T90 2
values[38] 481 1 T57 2 T269 2 T90 3
values[39] 463 1 T57 2 T269 2 T90 2
values[40] 414 1 T57 2 T269 2 T90 3
values[41] 415 1 T57 2 T269 1 T90 7
values[42] 408 1 T57 2 T269 1 T90 4
values[43] 368 1 T57 2 T269 1 T90 10
values[44] 392 1 T57 2 T269 2 T90 9
values[45] 419 1 T57 2 T269 1 T90 8
values[46] 427 1 T57 2 T269 4 T90 3
values[47] 418 1 T57 2 T269 4 T90 2
values[48] 430 1 T57 1 T269 2 T90 2
values[49] 392 1 T57 2 T269 1 T90 2
values[50] 382 1 T57 3 T269 1 T90 2
values[51] 415 1 T57 2 T269 2 T90 6
values[52] 391 1 T57 2 T269 4 T90 4
values[53] 355 1 T57 2 T269 1 T90 2
values[54] 394 1 T57 2 T269 3 T90 2
values[55] 344 1 T57 2 T269 3 T90 5
values[56] 371 1 T57 2 T269 5 T90 4
values[57] 339 1 T57 2 T269 4 T90 4
values[58] 305 1 T57 2 T269 1 T90 2
values[59] 308 1 T57 2 T269 2 T90 4
values[60] 307 1 T57 2 T269 3 T90 2
values[61] 366 1 T57 2 T269 1 T90 5
values[62] 551 1 T57 2 T269 1 T90 4
values[63] 2332 1 T57 3 T269 10 T90 48
values[64] 23849 1 T57 6 T269 132 T90 161


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 296880 1 T1 1 T2 1 T3 1
values[2] 1681283 1 T1 177 T2 153 T3 171
values[3] 475773 1 T1 19 T2 15 T3 14
values[4] 50825 1 T8 59 T9 4 T24 1
values[5] 32365 1 T8 46 T32 1 T31 1
values[6] 24473 1 T8 31 T32 1 T57 18
values[7] 19664 1 T8 33 T32 1 T57 13
values[8] 16396 1 T8 40 T32 1 T57 5
values[9] 13637 1 T8 27 T32 1 T57 6
values[10] 11635 1 T8 29 T32 1 T39 135
values[11] 10019 1 T8 20 T32 1 T39 148
values[12] 8933 1 T8 11 T32 1 T39 135
values[13] 7895 1 T8 9 T32 1 T39 86
values[14] 6847 1 T8 4 T32 1 T39 81
values[15] 6003 1 T8 1 T32 1 T39 78
values[16] 5066 1 T8 3 T32 1 T39 48
values[17] 4743 1 T8 2 T32 1 T39 48
values[18] 4299 1 T8 1 T32 1 T39 61
values[19] 3989 1 T8 5 T32 1 T39 80
values[20] 3701 1 T8 4 T32 1 T39 66
values[21] 3462 1 T8 5 T32 1 T39 47
values[22] 3074 1 T8 4 T32 1 T39 33
values[23] 2992 1 T8 1 T32 1 T39 43
values[24] 2763 1 T8 2 T32 1 T39 48
values[25] 2614 1 T8 1 T32 1 T39 26
values[26] 2460 1 T8 3 T32 1 T39 21
values[27] 2325 1 T8 2 T32 1 T39 26
values[28] 2169 1 T8 1 T32 1 T39 24
values[29] 2081 1 T8 2 T32 1 T39 32
values[30] 2040 1 T8 2 T32 1 T39 31
values[31] 1967 1 T8 2 T32 1 T39 30
values[32] 1871 1 T8 4 T32 1 T39 29
values[33] 1763 1 T8 8 T32 1 T39 27
values[34] 1661 1 T8 4 T32 1 T39 20
values[35] 1690 1 T8 3 T32 1 T39 24
values[36] 1616 1 T8 2 T32 2 T39 33
values[37] 1531 1 T8 2 T32 1 T39 17
values[38] 1544 1 T8 2 T32 1 T39 21
values[39] 1522 1 T8 1 T32 1 T39 22
values[40] 1496 1 T8 1 T32 1 T39 17
values[41] 1491 1 T8 2 T32 1 T39 11
values[42] 1472 1 T8 1 T32 1 T39 18
values[43] 1395 1 T8 1 T32 1 T39 15
values[44] 1372 1 T8 2 T32 1 T39 20
values[45] 1357 1 T8 3 T32 1 T39 19
values[46] 1352 1 T8 2 T32 1 T39 15
values[47] 1398 1 T8 2 T32 1 T39 9
values[48] 1265 1 T8 1 T32 1 T39 16
values[49] 1294 1 T8 1 T32 1 T39 17
values[50] 1349 1 T8 7 T32 1 T39 16
values[51] 1344 1 T8 2 T32 1 T39 24
values[52] 1329 1 T8 1 T32 1 T39 14
values[53] 1352 1 T8 1 T32 1 T39 18
values[54] 1292 1 T8 1 T32 1 T39 12
values[55] 1313 1 T8 3 T32 1 T39 10
values[56] 1284 1 T8 2 T32 1 T39 11
values[57] 1252 1 T8 1 T32 1 T39 14
values[58] 1171 1 T8 2 T32 1 T39 22
values[59] 1153 1 T8 2 T32 1 T39 14
values[60] 1153 1 T8 2 T32 1 T39 7
values[61] 1280 1 T8 2 T32 1 T39 10
values[62] 2053 1 T8 8 T32 1 T39 44
values[63] 6521 1 T8 24 T32 1 T39 127
values[64] 102781 1 T8 59 T32 236 T39 224

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