T63 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_unmapped_addr.783713358 |
|
|
Oct 02 06:37:46 PM UTC 24 |
Oct 02 06:38:07 PM UTC 24 |
1151430908 ps |
T406 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_random.733990576 |
|
|
Oct 02 06:37:37 PM UTC 24 |
Oct 02 06:38:07 PM UTC 24 |
355791172 ps |
T407 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_random_zero_delays.2592817073 |
|
|
Oct 02 06:37:40 PM UTC 24 |
Oct 02 06:38:09 PM UTC 24 |
711745749 ps |
T408 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/15.xbar_smoke_large_delays.361015774 |
|
|
Oct 02 06:37:08 PM UTC 24 |
Oct 02 06:38:11 PM UTC 24 |
6650696203 ps |
T355 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/4.xbar_stress_all_with_reset_error.2208381643 |
|
|
Oct 02 06:33:21 PM UTC 24 |
Oct 02 06:38:11 PM UTC 24 |
9402615579 ps |
T409 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_error_and_unmapped_addr.925442572 |
|
|
Oct 02 06:37:50 PM UTC 24 |
Oct 02 06:38:13 PM UTC 24 |
346115746 ps |
T337 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/10.xbar_stress_all_with_reset_error.3616774550 |
|
|
Oct 02 06:35:16 PM UTC 24 |
Oct 02 06:38:15 PM UTC 24 |
532008943 ps |
T410 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_same_source.4285860002 |
|
|
Oct 02 06:38:09 PM UTC 24 |
Oct 02 06:38:15 PM UTC 24 |
38966297 ps |
T411 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_smoke_large_delays.174979047 |
|
|
Oct 02 06:37:36 PM UTC 24 |
Oct 02 06:38:18 PM UTC 24 |
5300040917 ps |
T288 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/10.xbar_random_large_delays.4095234085 |
|
|
Oct 02 06:34:59 PM UTC 24 |
Oct 02 06:38:19 PM UTC 24 |
60439972272 ps |
T412 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/5.xbar_random_large_delays.4133714068 |
|
|
Oct 02 06:33:27 PM UTC 24 |
Oct 02 06:38:20 PM UTC 24 |
33505817684 ps |
T413 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_error_random.1325145521 |
|
|
Oct 02 06:38:11 PM UTC 24 |
Oct 02 06:38:21 PM UTC 24 |
139849356 ps |
T235 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_access_same_device.1715571847 |
|
|
Oct 02 06:37:44 PM UTC 24 |
Oct 02 06:38:22 PM UTC 24 |
323745457 ps |
T133 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/15.xbar_access_same_device.488370000 |
|
|
Oct 02 06:37:25 PM UTC 24 |
Oct 02 06:38:23 PM UTC 24 |
2868257394 ps |
T266 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_smoke_slow_rsp.1491311236 |
|
|
Oct 02 06:37:36 PM UTC 24 |
Oct 02 06:38:23 PM UTC 24 |
4025865835 ps |
T267 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_smoke_zero_delays.1239070895 |
|
|
Oct 02 06:38:22 PM UTC 24 |
Oct 02 06:38:26 PM UTC 24 |
46057419 ps |
T268 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_smoke.2515974535 |
|
|
Oct 02 06:38:21 PM UTC 24 |
Oct 02 06:38:27 PM UTC 24 |
340374928 ps |
T269 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/13.xbar_stress_all_with_rand_reset.647594213 |
|
|
Oct 02 06:36:30 PM UTC 24 |
Oct 02 06:38:31 PM UTC 24 |
311272171 ps |
T239 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_random_zero_delays.1131728085 |
|
|
Oct 02 06:38:06 PM UTC 24 |
Oct 02 06:38:32 PM UTC 24 |
193164711 ps |
T270 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/12.xbar_stress_all_with_rand_reset.2843856918 |
|
|
Oct 02 06:35:59 PM UTC 24 |
Oct 02 06:38:33 PM UTC 24 |
327359885 ps |
T271 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_error_and_unmapped_addr.4241681085 |
|
|
Oct 02 06:38:14 PM UTC 24 |
Oct 02 06:38:36 PM UTC 24 |
109724666 ps |
T134 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/9.xbar_stress_all.1361983370 |
|
|
Oct 02 06:34:51 PM UTC 24 |
Oct 02 06:38:37 PM UTC 24 |
7160529142 ps |
T214 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_same_source.2881646280 |
|
|
Oct 02 06:37:45 PM UTC 24 |
Oct 02 06:38:37 PM UTC 24 |
1783823016 ps |
T414 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_smoke_slow_rsp.2640529197 |
|
|
Oct 02 06:38:05 PM UTC 24 |
Oct 02 06:38:37 PM UTC 24 |
4684122232 ps |
T415 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_random_zero_delays.4145201001 |
|
|
Oct 02 06:38:26 PM UTC 24 |
Oct 02 06:38:39 PM UTC 24 |
87499085 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/14.xbar_stress_all_with_reset_error.1626415803 |
|
|
Oct 02 06:37:04 PM UTC 24 |
Oct 02 06:38:41 PM UTC 24 |
1612304600 ps |
T215 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_random.2723584765 |
|
|
Oct 02 06:38:06 PM UTC 24 |
Oct 02 06:38:41 PM UTC 24 |
1354308320 ps |
T50 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_unmapped_addr.2225367930 |
|
|
Oct 02 06:38:13 PM UTC 24 |
Oct 02 06:38:43 PM UTC 24 |
831828391 ps |
T135 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/7.xbar_stress_all_with_rand_reset.2552673265 |
|
|
Oct 02 06:34:02 PM UTC 24 |
Oct 02 06:38:43 PM UTC 24 |
2421558385 ps |
T322 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_error_and_unmapped_addr.909997289 |
|
|
Oct 02 06:38:39 PM UTC 24 |
Oct 02 06:38:44 PM UTC 24 |
132104977 ps |
T323 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_smoke_slow_rsp.1661076093 |
|
|
Oct 02 06:38:24 PM UTC 24 |
Oct 02 06:38:46 PM UTC 24 |
2953154302 ps |
T324 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_smoke.3220283178 |
|
|
Oct 02 06:38:44 PM UTC 24 |
Oct 02 06:38:49 PM UTC 24 |
166205172 ps |
T325 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_smoke_zero_delays.1687554158 |
|
|
Oct 02 06:38:44 PM UTC 24 |
Oct 02 06:38:49 PM UTC 24 |
29115711 ps |
T326 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_access_same_device.2724459086 |
|
|
Oct 02 06:38:08 PM UTC 24 |
Oct 02 06:38:50 PM UTC 24 |
358346642 ps |
T136 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_stress_all_with_rand_reset.1048813677 |
|
|
Oct 02 06:38:16 PM UTC 24 |
Oct 02 06:38:51 PM UTC 24 |
912562566 ps |
T327 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_same_source.670305413 |
|
|
Oct 02 06:38:37 PM UTC 24 |
Oct 02 06:38:51 PM UTC 24 |
532770833 ps |
T417 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_random.1041114033 |
|
|
Oct 02 06:38:24 PM UTC 24 |
Oct 02 06:38:52 PM UTC 24 |
267734738 ps |
T137 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/5.xbar_random_slow_rsp.3504117785 |
|
|
Oct 02 06:33:29 PM UTC 24 |
Oct 02 06:38:54 PM UTC 24 |
55168013298 ps |
T418 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_smoke_large_delays.2052525118 |
|
|
Oct 02 06:38:03 PM UTC 24 |
Oct 02 06:38:58 PM UTC 24 |
6942269313 ps |
T419 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_unmapped_addr.2759752960 |
|
|
Oct 02 06:38:39 PM UTC 24 |
Oct 02 06:38:59 PM UTC 24 |
148199662 ps |
T354 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/6.xbar_stress_all_with_reset_error.1531386264 |
|
|
Oct 02 06:33:48 PM UTC 24 |
Oct 02 06:39:01 PM UTC 24 |
8175462911 ps |
T420 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_error_random.2212973294 |
|
|
Oct 02 06:38:59 PM UTC 24 |
Oct 02 06:39:04 PM UTC 24 |
262931498 ps |
T421 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_same_source.790840471 |
|
|
Oct 02 06:38:59 PM UTC 24 |
Oct 02 06:39:09 PM UTC 24 |
336961665 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_stress_all_with_error.3012259030 |
|
|
Oct 02 06:38:19 PM UTC 24 |
Oct 02 06:39:10 PM UTC 24 |
1143457474 ps |
T423 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/9.xbar_random_slow_rsp.1316129752 |
|
|
Oct 02 06:34:40 PM UTC 24 |
Oct 02 06:39:13 PM UTC 24 |
55743389061 ps |
T356 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/10.xbar_stress_all_with_rand_reset.3679145292 |
|
|
Oct 02 06:35:13 PM UTC 24 |
Oct 02 06:39:15 PM UTC 24 |
344377830 ps |
T179 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/8.xbar_access_same_device_slow_rsp.1791786089 |
|
|
Oct 02 06:34:21 PM UTC 24 |
Oct 02 06:39:16 PM UTC 24 |
79769636146 ps |
T291 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_error_and_unmapped_addr.3650621952 |
|
|
Oct 02 06:39:06 PM UTC 24 |
Oct 02 06:39:16 PM UTC 24 |
499853964 ps |
T292 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_smoke_zero_delays.933732990 |
|
|
Oct 02 06:39:17 PM UTC 24 |
Oct 02 06:39:21 PM UTC 24 |
41011234 ps |
T293 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_smoke.1039698614 |
|
|
Oct 02 06:39:17 PM UTC 24 |
Oct 02 06:39:22 PM UTC 24 |
97137989 ps |
T294 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_error_random.2420559236 |
|
|
Oct 02 06:38:39 PM UTC 24 |
Oct 02 06:39:25 PM UTC 24 |
5064012397 ps |
T295 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_random.2146631715 |
|
|
Oct 02 06:38:51 PM UTC 24 |
Oct 02 06:39:25 PM UTC 24 |
221794385 ps |
T296 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_smoke_slow_rsp.2105776373 |
|
|
Oct 02 06:38:50 PM UTC 24 |
Oct 02 06:39:25 PM UTC 24 |
14343297866 ps |
T297 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_unmapped_addr.3719236832 |
|
|
Oct 02 06:39:02 PM UTC 24 |
Oct 02 06:39:27 PM UTC 24 |
123954295 ps |
T298 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_smoke_large_delays.836352931 |
|
|
Oct 02 06:38:23 PM UTC 24 |
Oct 02 06:39:27 PM UTC 24 |
5493962849 ps |
T299 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_random_zero_delays.1506010125 |
|
|
Oct 02 06:38:51 PM UTC 24 |
Oct 02 06:39:29 PM UTC 24 |
166141196 ps |
T357 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/5.xbar_stress_all_with_reset_error.1171765529 |
|
|
Oct 02 06:33:39 PM UTC 24 |
Oct 02 06:39:35 PM UTC 24 |
12352044527 ps |
T138 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/4.xbar_stress_all_with_rand_reset.2780574712 |
|
|
Oct 02 06:33:20 PM UTC 24 |
Oct 02 06:39:36 PM UTC 24 |
19403998344 ps |
T142 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/13.xbar_random_slow_rsp.1190190208 |
|
|
Oct 02 06:36:15 PM UTC 24 |
Oct 02 06:39:36 PM UTC 24 |
62072845290 ps |
T143 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_smoke_large_delays.4217506660 |
|
|
Oct 02 06:38:46 PM UTC 24 |
Oct 02 06:39:41 PM UTC 24 |
6937107225 ps |
T144 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_random_zero_delays.1813380952 |
|
|
Oct 02 06:39:26 PM UTC 24 |
Oct 02 06:39:41 PM UTC 24 |
100830304 ps |
T145 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/9.xbar_stress_all_with_error.3480649597 |
|
|
Oct 02 06:34:53 PM UTC 24 |
Oct 02 06:39:41 PM UTC 24 |
14868332733 ps |
T146 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_access_same_device.2687402429 |
|
|
Oct 02 06:38:33 PM UTC 24 |
Oct 02 06:39:42 PM UTC 24 |
2256496281 ps |
T147 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_stress_all_with_error.1416004463 |
|
|
Oct 02 06:38:01 PM UTC 24 |
Oct 02 06:39:50 PM UTC 24 |
5029460866 ps |
T148 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_same_source.1554242657 |
|
|
Oct 02 06:39:37 PM UTC 24 |
Oct 02 06:39:51 PM UTC 24 |
521823739 ps |
T149 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_stress_all_with_reset_error.1543248286 |
|
|
Oct 02 06:39:16 PM UTC 24 |
Oct 02 06:39:53 PM UTC 24 |
65106696 ps |
T150 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_stress_all.1525667828 |
|
|
Oct 02 06:39:10 PM UTC 24 |
Oct 02 06:39:54 PM UTC 24 |
1620941855 ps |
T424 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_random_large_delays.586019684 |
|
|
Oct 02 06:38:27 PM UTC 24 |
Oct 02 06:39:56 PM UTC 24 |
7393166290 ps |
T425 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_smoke_zero_delays.236563682 |
|
|
Oct 02 06:39:54 PM UTC 24 |
Oct 02 06:39:59 PM UTC 24 |
50576500 ps |
T139 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_access_same_device.3503292425 |
|
|
Oct 02 06:39:27 PM UTC 24 |
Oct 02 06:39:56 PM UTC 24 |
639127190 ps |
T426 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_smoke.2010785222 |
|
|
Oct 02 06:39:52 PM UTC 24 |
Oct 02 06:39:57 PM UTC 24 |
57261280 ps |
T343 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_access_same_device.2575331206 |
|
|
Oct 02 06:38:53 PM UTC 24 |
Oct 02 06:39:57 PM UTC 24 |
1360760565 ps |
T427 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_stress_all_with_reset_error.3643336300 |
|
|
Oct 02 06:38:44 PM UTC 24 |
Oct 02 06:39:57 PM UTC 24 |
457949189 ps |
T428 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_random.317961747 |
|
|
Oct 02 06:41:27 PM UTC 24 |
Oct 02 06:41:34 PM UTC 24 |
38895226 ps |
T341 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/11.xbar_access_same_device_slow_rsp.1287661072 |
|
|
Oct 02 06:35:33 PM UTC 24 |
Oct 02 06:39:57 PM UTC 24 |
24145904802 ps |
T429 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_smoke_slow_rsp.1673025219 |
|
|
Oct 02 06:39:23 PM UTC 24 |
Oct 02 06:40:01 PM UTC 24 |
5111244712 ps |
T430 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_unmapped_addr.1876743326 |
|
|
Oct 02 06:39:37 PM UTC 24 |
Oct 02 06:40:02 PM UTC 24 |
828382736 ps |
T431 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_stress_all_with_error.2472292326 |
|
|
Oct 02 06:39:14 PM UTC 24 |
Oct 02 06:40:03 PM UTC 24 |
694472966 ps |
T432 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/11.xbar_random_large_delays.668768839 |
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|
Oct 02 06:35:25 PM UTC 24 |
Oct 02 06:40:03 PM UTC 24 |
52545881803 ps |
T433 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/13.xbar_stress_all_with_error.159195510 |
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|
Oct 02 06:36:31 PM UTC 24 |
Oct 02 06:40:03 PM UTC 24 |
7813028087 ps |
T434 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_random.1998680302 |
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|
Oct 02 06:39:25 PM UTC 24 |
Oct 02 06:40:07 PM UTC 24 |
1796627520 ps |
T38 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/14.xbar_stress_all_with_rand_reset.2241318541 |
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|
Oct 02 06:37:02 PM UTC 24 |
Oct 02 06:40:07 PM UTC 24 |
342965754 ps |
T435 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_error_and_unmapped_addr.2185467362 |
|
|
Oct 02 06:39:41 PM UTC 24 |
Oct 02 06:40:09 PM UTC 24 |
960999049 ps |
T338 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/12.xbar_stress_all_with_error.3758848042 |
|
|
Oct 02 06:36:01 PM UTC 24 |
Oct 02 06:40:12 PM UTC 24 |
10108166168 ps |
T436 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_random.2340644238 |
|
|
Oct 02 06:39:57 PM UTC 24 |
Oct 02 06:40:12 PM UTC 24 |
1029800395 ps |
T437 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_random_zero_delays.269138877 |
|
|
Oct 02 06:39:58 PM UTC 24 |
Oct 02 06:40:13 PM UTC 24 |
342024477 ps |
T216 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/14.xbar_random_large_delays.1898408602 |
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|
Oct 02 06:36:42 PM UTC 24 |
Oct 02 06:40:13 PM UTC 24 |
45963737094 ps |
T438 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_error_random.1590773249 |
|
|
Oct 02 06:39:37 PM UTC 24 |
Oct 02 06:40:14 PM UTC 24 |
597586475 ps |
T439 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/15.xbar_stress_all.869204724 |
|
|
Oct 02 06:37:29 PM UTC 24 |
Oct 02 06:40:15 PM UTC 24 |
1107227431 ps |
T140 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/10.xbar_access_same_device_slow_rsp.694048615 |
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|
Oct 02 06:35:01 PM UTC 24 |
Oct 02 06:40:15 PM UTC 24 |
53653994331 ps |
T178 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_same_source.3569812447 |
|
|
Oct 02 06:40:02 PM UTC 24 |
Oct 02 06:40:15 PM UTC 24 |
97752194 ps |
T141 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/5.xbar_stress_all_with_rand_reset.140978167 |
|
|
Oct 02 06:33:36 PM UTC 24 |
Oct 02 06:40:17 PM UTC 24 |
13263352025 ps |
T166 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_smoke_zero_delays.3919770057 |
|
|
Oct 02 06:40:13 PM UTC 24 |
Oct 02 06:40:17 PM UTC 24 |
44669483 ps |
T167 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_random_large_delays.2940984069 |
|
|
Oct 02 06:38:52 PM UTC 24 |
Oct 02 06:40:19 PM UTC 24 |
22702651253 ps |
T168 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_smoke.1829812139 |
|
|
Oct 02 06:40:13 PM UTC 24 |
Oct 02 06:40:20 PM UTC 24 |
137211028 ps |
T169 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_unmapped_addr.271021981 |
|
|
Oct 02 06:40:03 PM UTC 24 |
Oct 02 06:40:20 PM UTC 24 |
121815529 ps |
T151 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/12.xbar_random_slow_rsp.1096641337 |
|
|
Oct 02 06:35:52 PM UTC 24 |
Oct 02 06:40:21 PM UTC 24 |
54131132592 ps |
T170 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/5.xbar_access_same_device_slow_rsp.3124611991 |
|
|
Oct 02 06:33:32 PM UTC 24 |
Oct 02 06:40:22 PM UTC 24 |
43649309690 ps |
T171 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_stress_all_with_reset_error.3956622386 |
|
|
Oct 02 06:38:01 PM UTC 24 |
Oct 02 06:40:23 PM UTC 24 |
260384460 ps |
T172 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_error_random.2523257264 |
|
|
Oct 02 06:40:03 PM UTC 24 |
Oct 02 06:40:23 PM UTC 24 |
597314935 ps |
T173 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/12.xbar_stress_all_with_reset_error.3025700239 |
|
|
Oct 02 06:36:02 PM UTC 24 |
Oct 02 06:40:25 PM UTC 24 |
4131962291 ps |
T440 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_smoke_large_delays.1137727791 |
|
|
Oct 02 06:39:22 PM UTC 24 |
Oct 02 06:40:26 PM UTC 24 |
26036242572 ps |
T441 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_stress_all_with_rand_reset.364887959 |
|
|
Oct 02 06:38:42 PM UTC 24 |
Oct 02 06:40:28 PM UTC 24 |
166275271 ps |
T442 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_error_and_unmapped_addr.113872103 |
|
|
Oct 02 06:40:04 PM UTC 24 |
Oct 02 06:40:29 PM UTC 24 |
591158183 ps |
T443 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_smoke.2387170663 |
|
|
Oct 02 06:40:27 PM UTC 24 |
Oct 02 06:40:31 PM UTC 24 |
33870064 ps |
T444 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_random_slow_rsp.1333516179 |
|
|
Oct 02 06:40:16 PM UTC 24 |
Oct 02 06:40:33 PM UTC 24 |
3343286348 ps |
T445 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_random_zero_delays.3266229318 |
|
|
Oct 02 06:40:16 PM UTC 24 |
Oct 02 06:40:34 PM UTC 24 |
150798939 ps |
T446 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_smoke_slow_rsp.2992637460 |
|
|
Oct 02 06:39:56 PM UTC 24 |
Oct 02 06:40:34 PM UTC 24 |
3992040841 ps |
T447 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_smoke_zero_delays.2842976300 |
|
|
Oct 02 06:40:29 PM UTC 24 |
Oct 02 06:40:34 PM UTC 24 |
28620406 ps |
T448 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_same_source.332090765 |
|
|
Oct 02 06:40:20 PM UTC 24 |
Oct 02 06:40:37 PM UTC 24 |
158543550 ps |
T449 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_random.3603731762 |
|
|
Oct 02 06:40:35 PM UTC 24 |
Oct 02 06:40:40 PM UTC 24 |
52038872 ps |
T450 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_stress_all_with_reset_error.1417113988 |
|
|
Oct 02 06:39:51 PM UTC 24 |
Oct 02 06:40:40 PM UTC 24 |
73003961 ps |
T451 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_smoke_large_delays.2529371852 |
|
|
Oct 02 06:39:55 PM UTC 24 |
Oct 02 06:40:40 PM UTC 24 |
13112957463 ps |
T452 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_random.108260028 |
|
|
Oct 02 06:40:15 PM UTC 24 |
Oct 02 06:40:41 PM UTC 24 |
140303251 ps |
T453 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_stress_all_with_error.3376304897 |
|
|
Oct 02 06:38:42 PM UTC 24 |
Oct 02 06:40:42 PM UTC 24 |
1402961133 ps |
T454 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_random_zero_delays.1909019452 |
|
|
Oct 02 06:40:35 PM UTC 24 |
Oct 02 06:40:42 PM UTC 24 |
37873371 ps |
T455 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_error_random.3903104643 |
|
|
Oct 02 06:40:21 PM UTC 24 |
Oct 02 06:40:44 PM UTC 24 |
462925309 ps |
T456 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_error_random.3691255120 |
|
|
Oct 02 06:40:41 PM UTC 24 |
Oct 02 06:40:47 PM UTC 24 |
46291036 ps |
T457 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_error_and_unmapped_addr.3011864573 |
|
|
Oct 02 06:40:22 PM UTC 24 |
Oct 02 06:40:48 PM UTC 24 |
122803567 ps |
T458 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_unmapped_addr.3209296166 |
|
|
Oct 02 06:40:22 PM UTC 24 |
Oct 02 06:40:51 PM UTC 24 |
519406194 ps |
T459 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_stress_all.2029128727 |
|
|
Oct 02 06:40:23 PM UTC 24 |
Oct 02 06:40:56 PM UTC 24 |
1417620291 ps |
T460 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_smoke.2183429677 |
|
|
Oct 02 06:40:52 PM UTC 24 |
Oct 02 06:40:56 PM UTC 24 |
28313803 ps |
T461 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_unmapped_addr.4163221471 |
|
|
Oct 02 06:40:42 PM UTC 24 |
Oct 02 06:40:58 PM UTC 24 |
62322981 ps |
T462 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_smoke_zero_delays.2435661038 |
|
|
Oct 02 06:40:56 PM UTC 24 |
Oct 02 06:41:01 PM UTC 24 |
31899212 ps |
T64 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_smoke_slow_rsp.517573947 |
|
|
Oct 02 06:40:15 PM UTC 24 |
Oct 02 06:41:02 PM UTC 24 |
7722704062 ps |
T463 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_access_same_device.777854485 |
|
|
Oct 02 06:40:38 PM UTC 24 |
Oct 02 06:41:03 PM UTC 24 |
131225720 ps |
T464 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_smoke_slow_rsp.1992832936 |
|
|
Oct 02 06:40:32 PM UTC 24 |
Oct 02 06:41:05 PM UTC 24 |
4386419088 ps |
T465 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_same_source.4231257190 |
|
|
Oct 02 06:40:41 PM UTC 24 |
Oct 02 06:41:06 PM UTC 24 |
3203941526 ps |
T466 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_random_zero_delays.2823707148 |
|
|
Oct 02 06:41:03 PM UTC 24 |
Oct 02 06:41:08 PM UTC 24 |
48774763 ps |
T467 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_access_same_device_slow_rsp.3501412960 |
|
|
Oct 02 06:40:19 PM UTC 24 |
Oct 02 06:41:09 PM UTC 24 |
4051001186 ps |
T346 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/6.xbar_access_same_device_slow_rsp.3823694592 |
|
|
Oct 02 06:33:43 PM UTC 24 |
Oct 02 06:41:09 PM UTC 24 |
84998151418 ps |
T305 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_access_same_device.2760020947 |
|
|
Oct 02 06:39:59 PM UTC 24 |
Oct 02 06:41:12 PM UTC 24 |
1532042846 ps |
T468 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_smoke_large_delays.497764909 |
|
|
Oct 02 06:40:29 PM UTC 24 |
Oct 02 06:41:12 PM UTC 24 |
18072286057 ps |
T469 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/15.xbar_stress_all_with_error.433169051 |
|
|
Oct 02 06:37:31 PM UTC 24 |
Oct 02 06:41:12 PM UTC 24 |
9867682602 ps |
T470 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_smoke_large_delays.2839656145 |
|
|
Oct 02 06:40:13 PM UTC 24 |
Oct 02 06:41:14 PM UTC 24 |
7057004319 ps |
T471 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_error_random.1860481918 |
|
|
Oct 02 06:41:10 PM UTC 24 |
Oct 02 06:41:16 PM UTC 24 |
29570004 ps |
T472 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_access_same_device.3847395917 |
|
|
Oct 02 06:40:17 PM UTC 24 |
Oct 02 06:41:18 PM UTC 24 |
1462239703 ps |
T473 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_error_and_unmapped_addr.585842347 |
|
|
Oct 02 06:40:44 PM UTC 24 |
Oct 02 06:41:18 PM UTC 24 |
854917601 ps |
T474 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/14.xbar_random_slow_rsp.3271838963 |
|
|
Oct 02 06:36:42 PM UTC 24 |
Oct 02 06:41:19 PM UTC 24 |
50062686003 ps |
T475 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_random_slow_rsp.2995679424 |
|
|
Oct 02 06:39:27 PM UTC 24 |
Oct 02 06:41:19 PM UTC 24 |
39180728600 ps |
T476 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_smoke_zero_delays.3009734163 |
|
|
Oct 02 06:41:20 PM UTC 24 |
Oct 02 06:41:25 PM UTC 24 |
40223642 ps |
T477 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_stress_all.263713281 |
|
|
Oct 02 06:39:41 PM UTC 24 |
Oct 02 06:41:25 PM UTC 24 |
2497642343 ps |
T347 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/7.xbar_access_same_device_slow_rsp.3373377649 |
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|
Oct 02 06:33:58 PM UTC 24 |
Oct 02 06:41:26 PM UTC 24 |
77876552191 ps |
T478 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_smoke.2252917654 |
|
|
Oct 02 06:41:19 PM UTC 24 |
Oct 02 06:41:26 PM UTC 24 |
211366343 ps |
T479 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_stress_all.1361953815 |
|
|
Oct 02 06:40:05 PM UTC 24 |
Oct 02 06:41:27 PM UTC 24 |
1597950843 ps |
T480 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_error_and_unmapped_addr.3014924366 |
|
|
Oct 02 06:41:13 PM UTC 24 |
Oct 02 06:41:29 PM UTC 24 |
331160665 ps |
T481 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_smoke_slow_rsp.3656386172 |
|
|
Oct 02 06:40:59 PM UTC 24 |
Oct 02 06:41:29 PM UTC 24 |
2563461648 ps |
T482 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_random.2033558836 |
|
|
Oct 02 06:41:02 PM UTC 24 |
Oct 02 06:41:31 PM UTC 24 |
564514081 ps |
T483 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_stress_all.3659720853 |
|
|
Oct 02 06:37:50 PM UTC 24 |
Oct 02 06:41:33 PM UTC 24 |
14630243109 ps |
T484 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_unmapped_addr.3765428024 |
|
|
Oct 02 06:41:13 PM UTC 24 |
Oct 02 06:41:35 PM UTC 24 |
203756461 ps |
T485 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_error_and_unmapped_addr.3829591242 |
|
|
Oct 02 06:41:37 PM UTC 24 |
Oct 02 06:41:44 PM UTC 24 |
123745292 ps |
T486 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_access_same_device_slow_rsp.4239299861 |
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|
Oct 02 06:38:08 PM UTC 24 |
Oct 02 06:41:46 PM UTC 24 |
52855566083 ps |
T487 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_same_source.3665213224 |
|
|
Oct 02 06:41:10 PM UTC 24 |
Oct 02 06:41:49 PM UTC 24 |
1712312680 ps |
T488 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_error_random.1445250756 |
|
|
Oct 02 06:41:33 PM UTC 24 |
Oct 02 06:41:52 PM UTC 24 |
1230274463 ps |
T489 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_random_slow_rsp.3072558630 |
|
|
Oct 02 06:38:08 PM UTC 24 |
Oct 02 06:41:52 PM UTC 24 |
25318192236 ps |
T490 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_access_same_device.1645305948 |
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|
Oct 02 06:41:30 PM UTC 24 |
Oct 02 06:41:53 PM UTC 24 |
1088638855 ps |
T65 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_smoke_large_delays.1363883332 |
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|
Oct 02 06:40:57 PM UTC 24 |
Oct 02 06:41:56 PM UTC 24 |
11299195113 ps |
T491 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_random_zero_delays.4180250706 |
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|
Oct 02 06:41:27 PM UTC 24 |
Oct 02 06:41:57 PM UTC 24 |
221788107 ps |
T492 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_smoke.4237231265 |
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|
Oct 02 06:41:53 PM UTC 24 |
Oct 02 06:41:58 PM UTC 24 |
36505119 ps |
T493 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_stress_all_with_error.390553870 |
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|
Oct 02 06:39:43 PM UTC 24 |
Oct 02 06:41:58 PM UTC 24 |
2442309742 ps |
T494 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_smoke_large_delays.1059440890 |
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|
Oct 02 06:41:20 PM UTC 24 |
Oct 02 06:41:59 PM UTC 24 |
5579285933 ps |
T495 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_smoke_zero_delays.1347864070 |
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|
Oct 02 06:41:54 PM UTC 24 |
Oct 02 06:41:59 PM UTC 24 |
114871497 ps |
T496 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_stress_all_with_error.83406955 |
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|
Oct 02 06:40:08 PM UTC 24 |
Oct 02 06:41:59 PM UTC 24 |
2012614582 ps |
T497 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_smoke_slow_rsp.4125178463 |
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|
Oct 02 06:41:27 PM UTC 24 |
Oct 02 06:42:01 PM UTC 24 |
5127596064 ps |
T174 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_access_same_device_slow_rsp.2034196617 |
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|
Oct 02 06:41:09 PM UTC 24 |
Oct 02 06:42:02 PM UTC 24 |
14928672944 ps |
T152 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/15.xbar_random_large_delays.2516622232 |
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|
Oct 02 06:37:19 PM UTC 24 |
Oct 02 06:42:02 PM UTC 24 |
40531964416 ps |
T306 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_access_same_device.375991650 |
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|
Oct 02 06:41:07 PM UTC 24 |
Oct 02 06:42:03 PM UTC 24 |
1127386166 ps |
T498 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_random.1414284705 |
|
|
Oct 02 06:41:59 PM UTC 24 |
Oct 02 06:42:08 PM UTC 24 |
156218366 ps |
T499 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_error_random.3450729836 |
|
|
Oct 02 06:42:03 PM UTC 24 |
Oct 02 06:42:09 PM UTC 24 |
111877603 ps |
T153 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_stress_all.2719105509 |
|
|
Oct 02 06:38:40 PM UTC 24 |
Oct 02 06:42:11 PM UTC 24 |
10730815769 ps |
T500 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_access_same_device_slow_rsp.2971567401 |
|
|
Oct 02 06:40:00 PM UTC 24 |
Oct 02 06:42:13 PM UTC 24 |
10836866124 ps |
T501 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_error_and_unmapped_addr.428453451 |
|
|
Oct 02 06:42:09 PM UTC 24 |
Oct 02 06:42:15 PM UTC 24 |
115178036 ps |
T502 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_random_slow_rsp.1349067995 |
|
|
Oct 02 06:38:32 PM UTC 24 |
Oct 02 06:42:15 PM UTC 24 |
32049579876 ps |
T503 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_same_source.2391525311 |
|
|
Oct 02 06:41:32 PM UTC 24 |
Oct 02 06:42:16 PM UTC 24 |
7113107939 ps |
T504 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_random_zero_delays.508512992 |
|
|
Oct 02 06:41:59 PM UTC 24 |
Oct 02 06:42:16 PM UTC 24 |
133066715 ps |
T358 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_stress_all_with_rand_reset.3474817073 |
|
|
Oct 02 06:37:52 PM UTC 24 |
Oct 02 06:42:16 PM UTC 24 |
1231466045 ps |
T505 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_unmapped_addr.3231892766 |
|
|
Oct 02 06:41:35 PM UTC 24 |
Oct 02 06:42:17 PM UTC 24 |
4221996665 ps |
T180 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_access_same_device.3214594910 |
|
|
Oct 02 06:42:00 PM UTC 24 |
Oct 02 06:42:17 PM UTC 24 |
958989137 ps |
T330 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_same_source.2940264338 |
|
|
Oct 02 06:42:03 PM UTC 24 |
Oct 02 06:42:19 PM UTC 24 |
924467207 ps |
T506 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_random_large_delays.2649726677 |
|
|
Oct 02 06:41:27 PM UTC 24 |
Oct 02 06:42:19 PM UTC 24 |
12100039965 ps |
T507 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_unmapped_addr.727414525 |
|
|
Oct 02 06:42:03 PM UTC 24 |
Oct 02 06:42:21 PM UTC 24 |
1106010481 ps |
T508 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_smoke_zero_delays.379443560 |
|
|
Oct 02 06:42:18 PM UTC 24 |
Oct 02 06:42:22 PM UTC 24 |
28058774 ps |
T509 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_smoke.1596316654 |
|
|
Oct 02 06:42:16 PM UTC 24 |
Oct 02 06:42:23 PM UTC 24 |
224564723 ps |
T510 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_stress_all_with_error.3309920991 |
|
|
Oct 02 06:40:25 PM UTC 24 |
Oct 02 06:42:24 PM UTC 24 |
2589061097 ps |
T154 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_stress_all.4051349322 |
|
|
Oct 02 06:38:16 PM UTC 24 |
Oct 02 06:42:25 PM UTC 24 |
5243919285 ps |
T511 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/13.xbar_random_large_delays.607169172 |
|
|
Oct 02 06:36:13 PM UTC 24 |
Oct 02 06:42:27 PM UTC 24 |
118508739903 ps |
T512 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_random_zero_delays.1221240351 |
|
|
Oct 02 06:42:19 PM UTC 24 |
Oct 02 06:42:29 PM UTC 24 |
129138503 ps |
T66 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_smoke_slow_rsp.2397757868 |
|
|
Oct 02 06:41:58 PM UTC 24 |
Oct 02 06:42:35 PM UTC 24 |
3250612723 ps |
T353 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_stress_all_with_reset_error.2272849273 |
|
|
Oct 02 06:38:20 PM UTC 24 |
Oct 02 06:42:37 PM UTC 24 |
12464336860 ps |
T513 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_error_and_unmapped_addr.3346750546 |
|
|
Oct 02 06:42:28 PM UTC 24 |
Oct 02 06:42:37 PM UTC 24 |
77156390 ps |
T67 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_smoke_large_delays.2709036835 |
|
|
Oct 02 06:41:56 PM UTC 24 |
Oct 02 06:42:39 PM UTC 24 |
3983834092 ps |
T514 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_error_random.3761048125 |
|
|
Oct 02 06:42:26 PM UTC 24 |
Oct 02 06:42:39 PM UTC 24 |
250448882 ps |
T515 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_random.2453420681 |
|
|
Oct 02 06:42:19 PM UTC 24 |
Oct 02 06:42:41 PM UTC 24 |
166769549 ps |
T516 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_smoke.1225156951 |
|
|
Oct 02 06:42:40 PM UTC 24 |
Oct 02 06:42:44 PM UTC 24 |
75804436 ps |
T517 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_smoke_zero_delays.3322072233 |
|
|
Oct 02 06:42:40 PM UTC 24 |
Oct 02 06:42:44 PM UTC 24 |
42672016 ps |
T155 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_access_same_device_slow_rsp.3427757464 |
|
|
Oct 02 06:38:34 PM UTC 24 |
Oct 02 06:42:46 PM UTC 24 |
21922590021 ps |
T518 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all_with_reset_error.3606545150 |
|
|
Oct 02 06:40:49 PM UTC 24 |
Oct 02 06:42:46 PM UTC 24 |
276331893 ps |
T519 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_random_slow_rsp.2514026286 |
|
|
Oct 02 06:38:52 PM UTC 24 |
Oct 02 06:42:49 PM UTC 24 |
34469768936 ps |
T520 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/0.xbar_access_same_device_slow_rsp.3643688568 |
|
|
Oct 02 06:32:52 PM UTC 24 |
Oct 02 06:42:49 PM UTC 24 |
83459977347 ps |
T521 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_same_source.92967767 |
|
|
Oct 02 06:42:24 PM UTC 24 |
Oct 02 06:42:51 PM UTC 24 |
220413645 ps |
T68 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_random_slow_rsp.2522864509 |
|
|
Oct 02 06:37:41 PM UTC 24 |
Oct 02 06:42:53 PM UTC 24 |
38826605037 ps |
T522 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_unmapped_addr.3730914002 |
|
|
Oct 02 06:42:27 PM UTC 24 |
Oct 02 06:42:53 PM UTC 24 |
996091824 ps |
T226 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_random.2128821164 |
|
|
Oct 02 06:42:45 PM UTC 24 |
Oct 02 06:42:54 PM UTC 24 |
291795599 ps |
T523 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_stress_all_with_reset_error.989462456 |
|
|
Oct 02 06:40:26 PM UTC 24 |
Oct 02 06:42:55 PM UTC 24 |
811441063 ps |
T524 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all.1606484009 |
|
|
Oct 02 06:40:44 PM UTC 24 |
Oct 02 06:42:56 PM UTC 24 |
5893150590 ps |
T525 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_smoke_slow_rsp.3334802063 |
|
|
Oct 02 06:42:18 PM UTC 24 |
Oct 02 06:42:57 PM UTC 24 |
3387495004 ps |
T526 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_smoke_large_delays.1263131190 |
|
|
Oct 02 06:42:18 PM UTC 24 |
Oct 02 06:43:01 PM UTC 24 |
4274001956 ps |
T156 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_access_same_device.1864741870 |
|
|
Oct 02 06:42:50 PM UTC 24 |
Oct 02 06:43:01 PM UTC 24 |
180929676 ps |
T51 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_stress_all_with_rand_reset.3256399353 |
|
|
Oct 02 06:39:11 PM UTC 24 |
Oct 02 06:43:07 PM UTC 24 |
718014703 ps |
T527 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_smoke_slow_rsp.3172546703 |
|
|
Oct 02 06:42:45 PM UTC 24 |
Oct 02 06:43:11 PM UTC 24 |
4132883197 ps |
T528 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_random_zero_delays.3991116110 |
|
|
Oct 02 06:42:46 PM UTC 24 |
Oct 02 06:43:12 PM UTC 24 |
291304263 ps |
T251 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_smoke.1349969006 |
|
|
Oct 02 06:43:08 PM UTC 24 |
Oct 02 06:43:13 PM UTC 24 |
30445986 ps |
T529 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_random_large_delays.212043746 |
|
|
Oct 02 06:42:20 PM UTC 24 |
Oct 02 06:43:16 PM UTC 24 |
13228660100 ps |
T530 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_access_same_device.1999718774 |
|
|
Oct 02 06:42:22 PM UTC 24 |
Oct 02 06:43:16 PM UTC 24 |
2799026958 ps |
T69 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_smoke_zero_delays.2734804316 |
|
|
Oct 02 06:43:12 PM UTC 24 |
Oct 02 06:43:17 PM UTC 24 |
64095321 ps |
T531 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_same_source.1484364398 |
|
|
Oct 02 06:42:53 PM UTC 24 |
Oct 02 06:43:20 PM UTC 24 |
378657274 ps |
T532 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_error_and_unmapped_addr.4078484357 |
|
|
Oct 02 06:42:56 PM UTC 24 |
Oct 02 06:43:20 PM UTC 24 |
690437471 ps |
T533 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_random_slow_rsp.3170360978 |
|
|
Oct 02 06:39:58 PM UTC 24 |
Oct 02 06:43:24 PM UTC 24 |
43735004917 ps |
T275 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_stress_all_with_rand_reset.1947031457 |
|
|
Oct 02 06:39:43 PM UTC 24 |
Oct 02 06:43:24 PM UTC 24 |
337940674 ps |
T534 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_unmapped_addr.2852429724 |
|
|
Oct 02 06:42:55 PM UTC 24 |
Oct 02 06:43:32 PM UTC 24 |
1076338424 ps |
T535 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_stress_all.3087710057 |
|
|
Oct 02 06:41:46 PM UTC 24 |
Oct 02 06:43:33 PM UTC 24 |
1074951040 ps |
T536 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_random_zero_delays.2459614385 |
|
|
Oct 02 06:43:18 PM UTC 24 |
Oct 02 06:43:38 PM UTC 24 |
341917326 ps |
T537 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_error_random.1671171610 |
|
|
Oct 02 06:43:33 PM UTC 24 |
Oct 02 06:43:39 PM UTC 24 |
38951442 ps |
T538 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_access_same_device.2378793782 |
|
|
Oct 02 06:43:21 PM UTC 24 |
Oct 02 06:43:40 PM UTC 24 |
671443501 ps |
T539 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all_with_error.445185425 |
|
|
Oct 02 06:43:01 PM UTC 24 |
Oct 02 06:43:40 PM UTC 24 |
2078096512 ps |
T540 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all_with_error.2314396724 |
|
|
Oct 02 06:40:48 PM UTC 24 |
Oct 02 06:43:42 PM UTC 24 |
7177934729 ps |
T541 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_stress_all_with_rand_reset.2491848491 |
|
|
Oct 02 06:40:24 PM UTC 24 |
Oct 02 06:43:44 PM UTC 24 |
398562785 ps |
T542 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_random.4286240434 |
|
|
Oct 02 06:43:17 PM UTC 24 |
Oct 02 06:43:48 PM UTC 24 |
1193646101 ps |
T157 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_random_slow_rsp.1436094326 |
|
|
Oct 02 06:43:21 PM UTC 24 |
Oct 02 06:43:48 PM UTC 24 |
1880837167 ps |
T543 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_smoke.3077737966 |
|
|
Oct 02 06:43:45 PM UTC 24 |
Oct 02 06:43:52 PM UTC 24 |
129122495 ps |
T544 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_error_random.1681303339 |
|
|
Oct 02 06:42:55 PM UTC 24 |
Oct 02 06:43:52 PM UTC 24 |
4378078705 ps |
T545 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all.2126040731 |
|
|
Oct 02 06:42:10 PM UTC 24 |
Oct 02 06:43:52 PM UTC 24 |
780200667 ps |
T546 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_smoke_zero_delays.3387679593 |
|
|
Oct 02 06:43:48 PM UTC 24 |
Oct 02 06:43:53 PM UTC 24 |
115307844 ps |
T547 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_smoke_large_delays.1965944250 |
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Oct 02 06:42:42 PM UTC 24 |
Oct 02 06:43:54 PM UTC 24 |
8778533834 ps |
T548 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_random_large_delays.571172143 |
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Oct 02 06:39:26 PM UTC 24 |
Oct 02 06:43:55 PM UTC 24 |
33764157148 ps |
T549 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_same_source.2197613296 |
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Oct 02 06:43:26 PM UTC 24 |
Oct 02 06:43:57 PM UTC 24 |
4364371858 ps |
T550 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_smoke_slow_rsp.1579275331 |
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Oct 02 06:43:14 PM UTC 24 |
Oct 02 06:44:01 PM UTC 24 |
7688024067 ps |
T551 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_unmapped_addr.1769956982 |
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Oct 02 06:43:35 PM UTC 24 |
Oct 02 06:44:01 PM UTC 24 |
504989050 ps |
T552 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_random_zero_delays.4173919295 |
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Oct 02 06:43:54 PM UTC 24 |
Oct 02 06:44:06 PM UTC 24 |
81380009 ps |
T553 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_error_and_unmapped_addr.524986171 |
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Oct 02 06:43:40 PM UTC 24 |
Oct 02 06:44:06 PM UTC 24 |
511872799 ps |
T554 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_access_same_device_slow_rsp.3899385159 |
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Oct 02 06:37:45 PM UTC 24 |
Oct 02 06:44:07 PM UTC 24 |
53877597211 ps |
T555 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_random_large_delays.2451086820 |
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Oct 02 06:39:58 PM UTC 24 |
Oct 02 06:44:14 PM UTC 24 |
46148771514 ps |
T556 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_random_slow_rsp.4103911775 |
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Oct 02 06:42:50 PM UTC 24 |
Oct 02 06:44:14 PM UTC 24 |
6115778179 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_same_source.2858772959 |
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Oct 02 06:44:02 PM UTC 24 |
Oct 02 06:44:15 PM UTC 24 |
368725383 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_smoke_large_delays.859727771 |
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Oct 02 06:43:14 PM UTC 24 |
Oct 02 06:44:18 PM UTC 24 |
6823916339 ps |
T559 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_random.2235781122 |
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Oct 02 06:43:54 PM UTC 24 |
Oct 02 06:44:18 PM UTC 24 |
145283773 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_error_and_unmapped_addr.2460016301 |
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Oct 02 06:44:07 PM UTC 24 |
Oct 02 06:44:18 PM UTC 24 |
64929747 ps |
T348 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/3.xbar_access_same_device_slow_rsp.3669080205 |
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Oct 02 06:33:03 PM UTC 24 |
Oct 02 06:44:21 PM UTC 24 |
73625595487 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_random_large_delays.514544046 |
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Oct 02 06:42:00 PM UTC 24 |
Oct 02 06:44:23 PM UTC 24 |
26031661080 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_10_02/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke_zero_delays.2218856664 |
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Oct 02 06:44:19 PM UTC 24 |
Oct 02 06:44:24 PM UTC 24 |
48131855 ps |