Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}
dashboard | hierarchy | modlist | groups | tests | asserts


Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 2327277 1 T1 184 T2 2258 T3 108
values[2] 164852 1 T1 15 T2 158 T3 14
values[3] 39884 1 T7 1 T9 12 T24 1
values[4] 24031 1 T9 20 T55 236 T92 57
values[5] 17048 1 T9 34 T55 219 T92 47
values[6] 13731 1 T9 24 T55 159 T92 52
values[7] 11414 1 T9 27 T55 167 T92 36
values[8] 9690 1 T9 18 T55 122 T92 54
values[9] 8514 1 T9 25 T55 111 T92 54
values[10] 7610 1 T9 10 T55 153 T92 48
values[11] 6810 1 T9 24 T55 158 T92 30
values[12] 6184 1 T9 32 T55 169 T92 50
values[13] 5601 1 T9 17 T55 115 T92 47
values[14] 5087 1 T9 9 T55 104 T92 62
values[15] 4619 1 T9 9 T55 66 T92 33
values[16] 4208 1 T9 4 T55 55 T92 19
values[17] 3830 1 T9 2 T55 64 T92 14
values[18] 3473 1 T9 1 T55 52 T92 9
values[19] 3420 1 T9 1 T55 65 T92 7
values[20] 3295 1 T9 1 T55 73 T92 5
values[21] 3178 1 T9 1 T55 53 T92 4
values[22] 3155 1 T9 2 T55 55 T92 4
values[23] 3139 1 T9 1 T55 60 T92 13
values[24] 2840 1 T9 3 T55 48 T92 12
values[25] 2588 1 T9 1 T55 45 T92 10
values[26] 2419 1 T9 1 T55 38 T92 15
values[27] 2377 1 T9 3 T55 11 T92 13
values[28] 2303 1 T9 1 T55 17 T92 8
values[29] 2420 1 T9 3 T55 27 T92 5
values[30] 2270 1 T9 11 T55 23 T92 3
values[31] 2125 1 T9 6 T55 29 T92 2
values[32] 2070 1 T9 3 T55 30 T92 3
values[33] 1835 1 T9 2 T55 24 T92 4
values[34] 1825 1 T9 6 T55 15 T94 16
values[35] 1768 1 T9 4 T55 13 T94 11
values[36] 1751 1 T9 2 T55 14 T94 20
values[37] 1696 1 T9 2 T55 8 T94 17
values[38] 1664 1 T9 1 T55 7 T94 14
values[39] 1554 1 T9 1 T55 9 T94 11
values[40] 1494 1 T9 1 T55 14 T94 14
values[41] 1478 1 T9 2 T55 10 T94 11
values[42] 1516 1 T9 2 T55 12 T94 9
values[43] 1421 1 T9 1 T55 22 T94 5
values[44] 1471 1 T9 1 T55 13 T94 5
values[45] 1459 1 T9 1 T55 17 T94 8
values[46] 1429 1 T9 1 T55 11 T94 8
values[47] 1383 1 T9 2 T55 10 T94 5
values[48] 1382 1 T9 1 T55 8 T94 11
values[49] 1311 1 T9 2 T55 12 T94 9
values[50] 1319 1 T9 4 T55 13 T94 7
values[51] 1279 1 T9 2 T55 15 T94 7
values[52] 1303 1 T9 1 T55 9 T94 3
values[53] 1314 1 T9 2 T55 8 T94 9
values[54] 1275 1 T9 1 T55 8 T94 9
values[55] 1327 1 T9 1 T55 11 T94 5
values[56] 1305 1 T9 3 T55 16 T94 5
values[57] 1256 1 T9 1 T55 13 T94 10
values[58] 1292 1 T9 2 T55 10 T94 13
values[59] 1324 1 T9 6 T55 7 T94 5
values[60] 1364 1 T9 1 T55 7 T94 6
values[61] 1540 1 T9 3 T55 7 T94 5
values[62] 2691 1 T9 14 T55 28 T94 26
values[63] 8300 1 T9 55 T55 120 T94 137
values[64] 113133 1 T9 78 T55 223 T94 250


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 2387692 1 T1 123 T2 1916 T3 104
values[2] 396786 1 T1 32 T2 492 T3 19
values[3] 43236 1 T1 1 T2 16 T10 1
values[4] 9281 1 T2 2 T9 14 T24 1
values[5] 4611 1 T2 1 T9 14 T5 3
values[6] 3398 1 T9 25 T55 11 T190 1
values[7] 2690 1 T9 26 T55 19 T94 11
values[8] 2361 1 T9 20 T55 10 T94 6
values[9] 2103 1 T9 16 T55 13 T94 3
values[10] 1857 1 T9 12 T55 11 T94 9
values[11] 1688 1 T9 18 T55 10 T94 28
values[12] 1412 1 T9 30 T55 5 T94 21
values[13] 1257 1 T9 24 T55 5 T94 15
values[14] 1178 1 T9 16 T55 5 T94 9
values[15] 1099 1 T9 3 T55 9 T94 9
values[16] 1041 1 T9 2 T55 13 T94 8
values[17] 960 1 T9 3 T55 4 T94 7
values[18] 951 1 T9 1 T55 2 T94 5
values[19] 938 1 T9 2 T55 2 T94 5
values[20] 928 1 T9 1 T55 2 T94 16
values[21] 964 1 T9 1 T55 2 T94 23
values[22] 857 1 T9 5 T55 2 T94 21
values[23] 788 1 T9 2 T55 5 T94 17
values[24] 738 1 T9 4 T55 6 T94 7
values[25] 693 1 T9 6 T55 5 T94 2
values[26] 642 1 T9 8 T55 5 T94 5
values[27] 686 1 T9 4 T55 7 T94 11
values[28] 664 1 T55 7 T94 8 T322 2
values[29] 632 1 T55 6 T94 3 T322 2
values[30] 591 1 T55 4 T322 2 T57 5
values[31] 579 1 T55 3 T322 2 T57 4
values[32] 566 1 T55 5 T322 2 T57 2
values[33] 540 1 T55 2 T322 2 T57 2
values[34] 503 1 T55 2 T322 2 T57 3
values[35] 534 1 T55 3 T322 2 T57 5
values[36] 531 1 T55 11 T322 2 T57 6
values[37] 570 1 T55 11 T322 2 T57 9
values[38] 572 1 T55 5 T322 2 T57 2
values[39] 541 1 T55 4 T322 2 T57 2
values[40] 536 1 T55 10 T322 2 T57 8
values[41] 482 1 T55 6 T322 2 T57 4
values[42] 460 1 T55 3 T322 2 T57 5
values[43] 466 1 T55 1 T322 2 T57 10
values[44] 457 1 T55 2 T322 2 T57 7
values[45] 468 1 T55 2 T322 2 T57 8
values[46] 417 1 T55 2 T322 2 T57 3
values[47] 403 1 T55 1 T322 2 T57 6
values[48] 411 1 T55 3 T322 2 T57 3
values[49] 408 1 T55 3 T322 2 T57 3
values[50] 368 1 T55 1 T322 2 T57 3
values[51] 385 1 T55 2 T322 2 T57 2
values[52] 410 1 T55 2 T322 2 T57 2
values[53] 409 1 T55 2 T322 2 T57 3
values[54] 368 1 T55 1 T322 2 T57 7
values[55] 391 1 T55 2 T322 2 T57 5
values[56] 397 1 T55 3 T322 2 T57 2
values[57] 373 1 T55 1 T322 2 T57 2
values[58] 394 1 T55 2 T322 2 T57 3
values[59] 395 1 T55 2 T322 2 T57 4
values[60] 390 1 T55 1 T322 3 T57 5
values[61] 415 1 T55 3 T322 2 T57 5
values[62] 750 1 T55 4 T322 2 T57 12
values[63] 2635 1 T55 29 T322 2 T57 15
values[64] 28524 1 T55 58 T322 302 T57 19


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 296271 1 T1 1 T2 16 T3 1
values[2] 1565873 1 T1 87 T2 2032 T3 158
values[3] 574683 1 T1 16 T2 137 T3 10
values[4] 55012 1 T7 1 T8 1 T9 21
values[5] 35229 1 T9 24 T208 1 T308 2
values[6] 26969 1 T9 26 T55 226 T92 75
values[7] 21915 1 T9 22 T55 236 T92 64
values[8] 18082 1 T9 25 T55 183 T92 60
values[9] 14996 1 T9 20 T55 171 T92 54
values[10] 12749 1 T9 24 T55 154 T92 62
values[11] 11110 1 T9 22 T55 204 T92 41
values[12] 9799 1 T9 17 T55 170 T92 53
values[13] 8909 1 T9 13 T55 117 T92 50
values[14] 8162 1 T9 24 T55 79 T92 39
values[15] 7408 1 T9 16 T55 67 T92 19
values[16] 6671 1 T9 16 T55 78 T92 24
values[17] 5975 1 T9 8 T55 84 T92 25
values[18] 5540 1 T9 8 T55 84 T92 19
values[19] 5132 1 T9 7 T55 78 T92 32
values[20] 4670 1 T9 2 T55 64 T92 40
values[21] 4369 1 T9 3 T55 65 T92 16
values[22] 3990 1 T9 1 T55 65 T92 9
values[23] 3721 1 T9 1 T55 59 T92 11
values[24] 3472 1 T9 2 T55 52 T92 10
values[25] 3183 1 T9 3 T55 62 T94 45
values[26] 2929 1 T9 1 T55 35 T94 44
values[27] 2683 1 T9 2 T55 28 T94 29
values[28] 2501 1 T9 2 T55 24 T94 33
values[29] 2309 1 T9 6 T55 24 T94 21
values[30] 2239 1 T9 7 T55 19 T94 21
values[31] 2170 1 T9 3 T55 20 T94 17
values[32] 2083 1 T9 8 T55 41 T94 17
values[33] 2010 1 T9 6 T55 38 T94 13
values[34] 1942 1 T9 1 T55 24 T94 18
values[35] 1898 1 T9 1 T55 23 T94 9
values[36] 1801 1 T9 1 T55 12 T94 16
values[37] 1773 1 T9 5 T55 12 T94 10
values[38] 1701 1 T9 4 T55 16 T94 9
values[39] 1674 1 T9 2 T55 19 T94 13
values[40] 1605 1 T9 1 T55 22 T94 24
values[41] 1627 1 T9 1 T55 8 T94 36
values[42] 1540 1 T9 4 T55 13 T94 25
values[43] 1524 1 T9 7 T55 10 T94 17
values[44] 1471 1 T9 8 T55 15 T94 10
values[45] 1457 1 T9 2 T55 17 T94 7
values[46] 1432 1 T9 1 T55 20 T94 9
values[47] 1452 1 T9 5 T55 22 T94 25
values[48] 1503 1 T9 7 T55 18 T94 25
values[49] 1324 1 T9 3 T55 12 T94 12
values[50] 1429 1 T9 8 T55 14 T94 5
values[51] 1407 1 T9 6 T55 9 T94 3
values[52] 1418 1 T9 3 T55 11 T94 5
values[53] 1432 1 T9 3 T55 6 T94 3
values[54] 1432 1 T9 2 T55 16 T94 4
values[55] 1419 1 T9 1 T55 15 T94 8
values[56] 1362 1 T9 1 T55 22 T94 11
values[57] 1334 1 T9 3 T55 22 T94 10
values[58] 1309 1 T9 1 T55 9 T94 5
values[59] 1336 1 T9 3 T55 7 T94 6
values[60] 1321 1 T9 3 T55 11 T94 11
values[61] 1437 1 T9 2 T55 18 T94 8
values[62] 2303 1 T9 4 T55 31 T94 23
values[63] 7460 1 T9 26 T55 149 T94 117
values[64] 115024 1 T9 49 T55 329 T94 227

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