T556 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_error_and_unmapped_addr.3751449492 |
|
|
Oct 09 04:59:23 AM UTC 24 |
Oct 09 04:59:37 AM UTC 24 |
97396294 ps |
T67 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_smoke_slow_rsp.954037828 |
|
|
Oct 09 04:59:05 AM UTC 24 |
Oct 09 04:59:37 AM UTC 24 |
3213514649 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_smoke_large_delays.3418390384 |
|
|
Oct 09 04:59:04 AM UTC 24 |
Oct 09 04:59:38 AM UTC 24 |
5282224468 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke.2248347507 |
|
|
Oct 09 04:59:31 AM UTC 24 |
Oct 09 04:59:38 AM UTC 24 |
224306297 ps |
T301 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_access_same_device_slow_rsp.1658009101 |
|
|
Oct 09 04:58:39 AM UTC 24 |
Oct 09 04:59:38 AM UTC 24 |
16241936545 ps |
T559 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_stress_all_with_error.2247478911 |
|
|
Oct 09 04:57:02 AM UTC 24 |
Oct 09 04:59:38 AM UTC 24 |
4083027896 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_random_large_delays.2222708552 |
|
|
Oct 09 04:53:05 AM UTC 24 |
Oct 09 04:59:45 AM UTC 24 |
145878927004 ps |
T68 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_random_slow_rsp.551681822 |
|
|
Oct 09 04:57:39 AM UTC 24 |
Oct 09 04:59:51 AM UTC 24 |
20316529877 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_error_random.738429988 |
|
|
Oct 09 04:59:40 AM UTC 24 |
Oct 09 04:59:53 AM UTC 24 |
376825954 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_unmapped_addr.3882593038 |
|
|
Oct 09 04:59:22 AM UTC 24 |
Oct 09 04:59:55 AM UTC 24 |
1945509917 ps |
T563 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_random_zero_delays.3906312139 |
|
|
Oct 09 04:59:37 AM UTC 24 |
Oct 09 05:00:00 AM UTC 24 |
336972722 ps |
T564 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke_large_delays.2550859278 |
|
|
Oct 09 04:59:31 AM UTC 24 |
Oct 09 05:00:01 AM UTC 24 |
4895816361 ps |
T145 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_access_same_device.1189045580 |
|
|
Oct 09 04:58:37 AM UTC 24 |
Oct 09 05:00:07 AM UTC 24 |
6618657730 ps |
T565 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_unmapped_addr.1106260335 |
|
|
Oct 09 04:59:46 AM UTC 24 |
Oct 09 05:00:07 AM UTC 24 |
305737068 ps |
T566 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke_slow_rsp.3949643734 |
|
|
Oct 09 04:59:31 AM UTC 24 |
Oct 09 05:00:12 AM UTC 24 |
3240912157 ps |
T567 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all_with_rand_reset.4142028209 |
|
|
Oct 09 04:59:56 AM UTC 24 |
Oct 09 05:00:12 AM UTC 24 |
87921702 ps |
T568 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all.4044027703 |
|
|
Oct 09 04:56:38 AM UTC 24 |
Oct 09 05:00:13 AM UTC 24 |
5927482195 ps |
T569 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke_zero_delays.354503616 |
|
|
Oct 09 05:00:10 AM UTC 24 |
Oct 09 05:00:13 AM UTC 24 |
31168811 ps |
T570 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_random_slow_rsp.4038519598 |
|
|
Oct 09 04:55:38 AM UTC 24 |
Oct 09 05:00:14 AM UTC 24 |
69899204634 ps |
T571 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke.3633684961 |
|
|
Oct 09 05:00:10 AM UTC 24 |
Oct 09 05:00:15 AM UTC 24 |
37108662 ps |
T572 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_stress_all_with_reset_error.2781542616 |
|
|
Oct 09 04:54:56 AM UTC 24 |
Oct 09 05:00:17 AM UTC 24 |
889643825 ps |
T573 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all.804491778 |
|
|
Oct 09 04:56:12 AM UTC 24 |
Oct 09 05:00:19 AM UTC 24 |
1849671729 ps |
T574 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_same_source.4197255285 |
|
|
Oct 09 04:59:40 AM UTC 24 |
Oct 09 05:00:20 AM UTC 24 |
1711448474 ps |
T575 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all_with_error.3744031618 |
|
|
Oct 09 04:57:29 AM UTC 24 |
Oct 09 05:00:21 AM UTC 24 |
2227149778 ps |
T576 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_random.3995568023 |
|
|
Oct 09 04:59:33 AM UTC 24 |
Oct 09 05:00:21 AM UTC 24 |
965963432 ps |
T180 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all_with_rand_reset.3698824711 |
|
|
Oct 09 04:59:26 AM UTC 24 |
Oct 09 05:00:23 AM UTC 24 |
578042726 ps |
T577 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/11.xbar_stress_all_with_reset_error.1399810622 |
|
|
Oct 09 04:50:18 AM UTC 24 |
Oct 09 05:00:24 AM UTC 24 |
3193942398 ps |
T146 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_stress_all.2983020755 |
|
|
Oct 09 04:57:44 AM UTC 24 |
Oct 09 05:00:25 AM UTC 24 |
4898288281 ps |
T578 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all_with_reset_error.1252151733 |
|
|
Oct 09 04:56:14 AM UTC 24 |
Oct 09 05:00:26 AM UTC 24 |
1527561457 ps |
T579 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_stress_all_with_reset_error.3072438284 |
|
|
Oct 09 04:55:30 AM UTC 24 |
Oct 09 05:00:33 AM UTC 24 |
1529988101 ps |
T580 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_random_zero_delays.2731270180 |
|
|
Oct 09 05:00:15 AM UTC 24 |
Oct 09 05:00:34 AM UTC 24 |
761943800 ps |
T581 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_error_and_unmapped_addr.4071682092 |
|
|
Oct 09 04:59:52 AM UTC 24 |
Oct 09 05:00:34 AM UTC 24 |
1551811152 ps |
T582 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/6.xbar_access_same_device_slow_rsp.905079245 |
|
|
Oct 09 04:47:28 AM UTC 24 |
Oct 09 05:00:36 AM UTC 24 |
112034903150 ps |
T583 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all_with_error.3379816521 |
|
|
Oct 09 04:56:41 AM UTC 24 |
Oct 09 05:00:39 AM UTC 24 |
11727896355 ps |
T584 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_error_random.1459941523 |
|
|
Oct 09 05:00:22 AM UTC 24 |
Oct 09 05:00:39 AM UTC 24 |
230014716 ps |
T585 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke.296619232 |
|
|
Oct 09 05:00:35 AM UTC 24 |
Oct 09 05:00:41 AM UTC 24 |
144434862 ps |
T586 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke_zero_delays.3109922178 |
|
|
Oct 09 05:00:36 AM UTC 24 |
Oct 09 05:00:41 AM UTC 24 |
63877957 ps |
T587 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_random_slow_rsp.483641166 |
|
|
Oct 09 04:56:00 AM UTC 24 |
Oct 09 05:00:43 AM UTC 24 |
26779260731 ps |
T47 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all_with_rand_reset.4032564134 |
|
|
Oct 09 04:58:16 AM UTC 24 |
Oct 09 05:00:45 AM UTC 24 |
384648320 ps |
T588 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_random.1247958442 |
|
|
Oct 09 05:00:14 AM UTC 24 |
Oct 09 05:00:48 AM UTC 24 |
294150119 ps |
T589 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_error_and_unmapped_addr.2481497161 |
|
|
Oct 09 05:00:24 AM UTC 24 |
Oct 09 05:00:48 AM UTC 24 |
565607619 ps |
T147 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/14.xbar_access_same_device_slow_rsp.563372497 |
|
|
Oct 09 04:51:36 AM UTC 24 |
Oct 09 05:00:49 AM UTC 24 |
43195526815 ps |
T289 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_random.3654309488 |
|
|
Oct 09 05:00:41 AM UTC 24 |
Oct 09 05:00:49 AM UTC 24 |
350406408 ps |
T148 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_access_same_device.2415983959 |
|
|
Oct 09 04:59:40 AM UTC 24 |
Oct 09 05:00:50 AM UTC 24 |
2136256485 ps |
T290 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_same_source.1094737354 |
|
|
Oct 09 05:00:22 AM UTC 24 |
Oct 09 05:00:51 AM UTC 24 |
1425168673 ps |
T291 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_access_same_device_slow_rsp.3543208741 |
|
|
Oct 09 04:56:31 AM UTC 24 |
Oct 09 05:00:52 AM UTC 24 |
27150339962 ps |
T292 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/22.xbar_stress_all_with_reset_error.33211320 |
|
|
Oct 09 04:55:50 AM UTC 24 |
Oct 09 05:00:52 AM UTC 24 |
1589706209 ps |
T69 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_random_slow_rsp.4072489909 |
|
|
Oct 09 05:00:17 AM UTC 24 |
Oct 09 05:00:54 AM UTC 24 |
4246651501 ps |
T293 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke_slow_rsp.2714076103 |
|
|
Oct 09 05:00:13 AM UTC 24 |
Oct 09 05:00:55 AM UTC 24 |
3585604171 ps |
T294 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_error_and_unmapped_addr.2818426114 |
|
|
Oct 09 05:00:52 AM UTC 24 |
Oct 09 05:00:59 AM UTC 24 |
121529510 ps |
T295 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_unmapped_addr.1719012707 |
|
|
Oct 09 05:00:22 AM UTC 24 |
Oct 09 05:00:59 AM UTC 24 |
678003764 ps |
T590 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_unmapped_addr.2747808966 |
|
|
Oct 09 05:00:50 AM UTC 24 |
Oct 09 05:01:01 AM UTC 24 |
255136590 ps |
T591 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_same_source.459234836 |
|
|
Oct 09 05:00:50 AM UTC 24 |
Oct 09 05:01:02 AM UTC 24 |
930117900 ps |
T276 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_random_slow_rsp.2085917277 |
|
|
Oct 09 04:58:06 AM UTC 24 |
Oct 09 05:01:04 AM UTC 24 |
33437219713 ps |
T256 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_access_same_device.1254528796 |
|
|
Oct 09 05:00:19 AM UTC 24 |
Oct 09 05:01:04 AM UTC 24 |
542561780 ps |
T592 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke_large_delays.757032244 |
|
|
Oct 09 05:00:13 AM UTC 24 |
Oct 09 05:01:05 AM UTC 24 |
16777912918 ps |
T593 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke_zero_delays.1383121846 |
|
|
Oct 09 05:01:01 AM UTC 24 |
Oct 09 05:01:05 AM UTC 24 |
27781294 ps |
T594 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke.2628473711 |
|
|
Oct 09 05:00:58 AM UTC 24 |
Oct 09 05:01:06 AM UTC 24 |
418393490 ps |
T595 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_random_large_delays.1034183756 |
|
|
Oct 09 04:57:39 AM UTC 24 |
Oct 09 05:01:09 AM UTC 24 |
76247816967 ps |
T596 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_random_large_delays.4245687354 |
|
|
Oct 09 05:00:43 AM UTC 24 |
Oct 09 05:01:10 AM UTC 24 |
3634241166 ps |
T597 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all_with_rand_reset.1970371549 |
|
|
Oct 09 05:00:54 AM UTC 24 |
Oct 09 05:01:11 AM UTC 24 |
92367448 ps |
T598 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_random_zero_delays.3053054021 |
|
|
Oct 09 05:00:43 AM UTC 24 |
Oct 09 05:01:12 AM UTC 24 |
445424110 ps |
T599 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/17.xbar_stress_all_with_reset_error.4180348607 |
|
|
Oct 09 04:53:28 AM UTC 24 |
Oct 09 05:01:13 AM UTC 24 |
2471095921 ps |
T600 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_random_zero_delays.3491860540 |
|
|
Oct 09 05:01:06 AM UTC 24 |
Oct 09 05:01:13 AM UTC 24 |
52425151 ps |
T277 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke_slow_rsp.1797068672 |
|
|
Oct 09 05:00:39 AM UTC 24 |
Oct 09 05:01:15 AM UTC 24 |
3990363572 ps |
T601 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_error_random.3730759157 |
|
|
Oct 09 05:00:50 AM UTC 24 |
Oct 09 05:01:16 AM UTC 24 |
1181856819 ps |
T602 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_access_same_device.728637392 |
|
|
Oct 09 05:01:08 AM UTC 24 |
Oct 09 05:01:16 AM UTC 24 |
28017814 ps |
T603 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_error_random.3958831976 |
|
|
Oct 09 05:01:13 AM UTC 24 |
Oct 09 05:01:21 AM UTC 24 |
124200884 ps |
T604 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke.3241127277 |
|
|
Oct 09 05:01:18 AM UTC 24 |
Oct 09 05:01:25 AM UTC 24 |
349967971 ps |
T70 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke_zero_delays.3109593257 |
|
|
Oct 09 05:01:23 AM UTC 24 |
Oct 09 05:01:28 AM UTC 24 |
29719733 ps |
T605 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_error_and_unmapped_addr.1315365725 |
|
|
Oct 09 05:01:16 AM UTC 24 |
Oct 09 05:01:28 AM UTC 24 |
179855850 ps |
T606 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_same_source.1799505366 |
|
|
Oct 09 05:01:10 AM UTC 24 |
Oct 09 05:01:29 AM UTC 24 |
571722534 ps |
T607 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all_with_error.3739911272 |
|
|
Oct 09 05:00:27 AM UTC 24 |
Oct 09 05:01:29 AM UTC 24 |
2245692051 ps |
T608 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke_large_delays.1259379984 |
|
|
Oct 09 05:00:38 AM UTC 24 |
Oct 09 05:01:32 AM UTC 24 |
10073553528 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke_slow_rsp.1644390215 |
|
|
Oct 09 05:01:03 AM UTC 24 |
Oct 09 05:01:36 AM UTC 24 |
16195386806 ps |
T610 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke_large_delays.3787407019 |
|
|
Oct 09 05:01:01 AM UTC 24 |
Oct 09 05:01:37 AM UTC 24 |
4956555814 ps |
T611 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all_with_reset_error.841394091 |
|
|
Oct 09 04:59:29 AM UTC 24 |
Oct 09 05:01:41 AM UTC 24 |
964059319 ps |
T612 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_random.2751206398 |
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|
Oct 09 05:01:03 AM UTC 24 |
Oct 09 05:01:43 AM UTC 24 |
1206986425 ps |
T613 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all.539613751 |
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Oct 09 05:00:25 AM UTC 24 |
Oct 09 05:01:46 AM UTC 24 |
630546494 ps |
T614 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_access_same_device_slow_rsp.3160647625 |
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|
Oct 09 04:57:42 AM UTC 24 |
Oct 09 05:01:46 AM UTC 24 |
20685049424 ps |
T149 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_access_same_device.2858064303 |
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|
Oct 09 05:00:46 AM UTC 24 |
Oct 09 05:01:48 AM UTC 24 |
1648130104 ps |
T615 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all.1805601441 |
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|
Oct 09 04:59:25 AM UTC 24 |
Oct 09 05:01:48 AM UTC 24 |
4034308107 ps |
T616 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_random_large_delays.1858570932 |
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|
Oct 09 04:59:08 AM UTC 24 |
Oct 09 05:01:49 AM UTC 24 |
20111503292 ps |
T617 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_unmapped_addr.3879830270 |
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|
Oct 09 05:01:13 AM UTC 24 |
Oct 09 05:01:50 AM UTC 24 |
1207555108 ps |
T618 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_random_zero_delays.1501949147 |
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|
Oct 09 05:01:31 AM UTC 24 |
Oct 09 05:01:55 AM UTC 24 |
265547077 ps |
T619 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all_with_error.2938165196 |
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|
Oct 09 04:58:56 AM UTC 24 |
Oct 09 05:02:02 AM UTC 24 |
1266211243 ps |
T620 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all.4099814475 |
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Oct 09 04:58:52 AM UTC 24 |
Oct 09 05:02:03 AM UTC 24 |
2228655183 ps |
T621 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke.2594712764 |
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Oct 09 05:01:56 AM UTC 24 |
Oct 09 05:02:04 AM UTC 24 |
235331129 ps |
T622 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_random.3379025981 |
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|
Oct 09 05:01:31 AM UTC 24 |
Oct 09 05:02:05 AM UTC 24 |
2455221443 ps |
T623 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_same_source.1788326704 |
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|
Oct 09 05:01:43 AM UTC 24 |
Oct 09 05:02:06 AM UTC 24 |
1181271845 ps |
T624 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke_zero_delays.2731987903 |
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|
Oct 09 05:02:03 AM UTC 24 |
Oct 09 05:02:07 AM UTC 24 |
45671255 ps |
T625 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all_with_error.3919365752 |
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|
Oct 09 05:00:54 AM UTC 24 |
Oct 09 05:02:08 AM UTC 24 |
1032151334 ps |
T626 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke_slow_rsp.1285562525 |
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|
Oct 09 05:01:31 AM UTC 24 |
Oct 09 05:02:09 AM UTC 24 |
3188944193 ps |
T627 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_random_large_delays.3220025296 |
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|
Oct 09 04:56:49 AM UTC 24 |
Oct 09 05:02:11 AM UTC 24 |
132459883440 ps |
T628 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all.3815881581 |
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|
Oct 09 04:59:54 AM UTC 24 |
Oct 09 05:02:12 AM UTC 24 |
5200246781 ps |
T629 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_error_and_unmapped_addr.3344041954 |
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|
Oct 09 05:01:47 AM UTC 24 |
Oct 09 05:02:12 AM UTC 24 |
3128121244 ps |
T630 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_error_random.1163162141 |
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|
Oct 09 05:01:44 AM UTC 24 |
Oct 09 05:02:16 AM UTC 24 |
2695404472 ps |
T631 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_same_source.2890442376 |
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Oct 09 05:02:13 AM UTC 24 |
Oct 09 05:02:18 AM UTC 24 |
55150879 ps |
T632 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_unmapped_addr.4044806380 |
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|
Oct 09 05:01:47 AM UTC 24 |
Oct 09 05:02:20 AM UTC 24 |
944933903 ps |
T633 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all_with_reset_error.3323549535 |
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|
Oct 09 04:59:00 AM UTC 24 |
Oct 09 05:02:20 AM UTC 24 |
2536846764 ps |
T634 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_access_same_device.831615863 |
|
|
Oct 09 05:02:10 AM UTC 24 |
Oct 09 05:02:22 AM UTC 24 |
420021605 ps |
T635 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_random.2407870606 |
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|
Oct 09 05:02:06 AM UTC 24 |
Oct 09 05:02:24 AM UTC 24 |
175894066 ps |
T636 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all_with_error.3960608980 |
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|
Oct 09 05:00:01 AM UTC 24 |
Oct 09 05:02:26 AM UTC 24 |
13062196621 ps |
T637 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_random_large_delays.939431055 |
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|
Oct 09 04:58:04 AM UTC 24 |
Oct 09 05:02:27 AM UTC 24 |
30559618280 ps |
T638 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke_large_delays.1472495237 |
|
|
Oct 09 05:01:27 AM UTC 24 |
Oct 09 05:02:27 AM UTC 24 |
6295473217 ps |
T639 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_random_slow_rsp.2369896551 |
|
|
Oct 09 04:59:40 AM UTC 24 |
Oct 09 05:02:27 AM UTC 24 |
25835849616 ps |
T640 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke_zero_delays.2832031681 |
|
|
Oct 09 05:02:28 AM UTC 24 |
Oct 09 05:02:31 AM UTC 24 |
39971744 ps |
T71 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke.4171695130 |
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|
Oct 09 05:02:28 AM UTC 24 |
Oct 09 05:02:32 AM UTC 24 |
36118350 ps |
T641 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all_with_reset_error.2575810576 |
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|
Oct 09 04:57:31 AM UTC 24 |
Oct 09 05:02:33 AM UTC 24 |
1077881337 ps |
T642 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke_slow_rsp.4014544561 |
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|
Oct 09 05:02:05 AM UTC 24 |
Oct 09 05:02:34 AM UTC 24 |
11411594739 ps |
T643 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_stress_all_with_rand_reset.2418942945 |
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|
Oct 09 04:53:50 AM UTC 24 |
Oct 09 05:02:35 AM UTC 24 |
11314792816 ps |
T644 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_error_and_unmapped_addr.3608867517 |
|
|
Oct 09 05:02:19 AM UTC 24 |
Oct 09 05:02:37 AM UTC 24 |
483769269 ps |
T174 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_access_same_device.189984170 |
|
|
Oct 09 05:01:37 AM UTC 24 |
Oct 09 05:02:41 AM UTC 24 |
2875490214 ps |
T264 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all_with_rand_reset.3320141804 |
|
|
Oct 09 04:57:26 AM UTC 24 |
Oct 09 05:02:42 AM UTC 24 |
626062577 ps |
T645 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_random_zero_delays.3708179757 |
|
|
Oct 09 05:02:07 AM UTC 24 |
Oct 09 05:02:43 AM UTC 24 |
185213622 ps |
T150 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all_with_rand_reset.4117515512 |
|
|
Oct 09 04:56:38 AM UTC 24 |
Oct 09 05:02:43 AM UTC 24 |
8368113116 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke_large_delays.4137364817 |
|
|
Oct 09 05:02:05 AM UTC 24 |
Oct 09 05:02:45 AM UTC 24 |
16757588103 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_unmapped_addr.680515000 |
|
|
Oct 09 05:02:17 AM UTC 24 |
Oct 09 05:02:46 AM UTC 24 |
1429035168 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_stress_all_with_reset_error.3660641291 |
|
|
Oct 09 04:57:56 AM UTC 24 |
Oct 09 05:02:47 AM UTC 24 |
954931619 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_random_large_delays.2134262552 |
|
|
Oct 09 05:02:09 AM UTC 24 |
Oct 09 05:02:48 AM UTC 24 |
7792082209 ps |
T267 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all.2961041534 |
|
|
Oct 09 05:01:49 AM UTC 24 |
Oct 09 05:02:51 AM UTC 24 |
3154043134 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_stress_all_with_reset_error.379505805 |
|
|
Oct 09 05:02:25 AM UTC 24 |
Oct 09 05:02:52 AM UTC 24 |
12061473 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_error_random.270021030 |
|
|
Oct 09 05:02:13 AM UTC 24 |
Oct 09 05:02:53 AM UTC 24 |
1096126951 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_random_zero_delays.1778884612 |
|
|
Oct 09 05:02:35 AM UTC 24 |
Oct 09 05:02:55 AM UTC 24 |
123273491 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke.2351943186 |
|
|
Oct 09 05:02:52 AM UTC 24 |
Oct 09 05:02:57 AM UTC 24 |
44393511 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke_zero_delays.1958043815 |
|
|
Oct 09 05:02:53 AM UTC 24 |
Oct 09 05:02:57 AM UTC 24 |
63904188 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_random.3514438406 |
|
|
Oct 09 05:02:33 AM UTC 24 |
Oct 09 05:02:59 AM UTC 24 |
179559920 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_error_and_unmapped_addr.25568546 |
|
|
Oct 09 05:02:45 AM UTC 24 |
Oct 09 05:02:59 AM UTC 24 |
336702229 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all_with_error.880212048 |
|
|
Oct 09 04:59:27 AM UTC 24 |
Oct 09 05:03:00 AM UTC 24 |
21938553153 ps |
T175 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all.2924448993 |
|
|
Oct 09 04:58:15 AM UTC 24 |
Oct 09 05:03:01 AM UTC 24 |
7020421948 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all_with_error.441180682 |
|
|
Oct 09 05:01:18 AM UTC 24 |
Oct 09 05:03:06 AM UTC 24 |
18936245284 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_unmapped_addr.1495264412 |
|
|
Oct 09 05:02:45 AM UTC 24 |
Oct 09 05:03:12 AM UTC 24 |
606139743 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke_slow_rsp.966070788 |
|
|
Oct 09 05:02:29 AM UTC 24 |
Oct 09 05:03:12 AM UTC 24 |
10523564138 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/15.xbar_stress_all_with_rand_reset.2965327727 |
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|
Oct 09 04:52:22 AM UTC 24 |
Oct 09 05:03:14 AM UTC 24 |
20523039945 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_stress_all_with_error.3659332201 |
|
|
Oct 09 04:57:51 AM UTC 24 |
Oct 09 05:03:14 AM UTC 24 |
10249820435 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke_large_delays.3848964197 |
|
|
Oct 09 05:02:28 AM UTC 24 |
Oct 09 05:03:19 AM UTC 24 |
18494408871 ps |
T72 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke_slow_rsp.468902267 |
|
|
Oct 09 05:02:56 AM UTC 24 |
Oct 09 05:03:19 AM UTC 24 |
6387649803 ps |
T151 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all.2022786762 |
|
|
Oct 09 05:01:16 AM UTC 24 |
Oct 09 05:03:19 AM UTC 24 |
9584698899 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_same_source.1046768805 |
|
|
Oct 09 05:02:43 AM UTC 24 |
Oct 09 05:03:20 AM UTC 24 |
2137296644 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_same_source.3901449421 |
|
|
Oct 09 05:03:07 AM UTC 24 |
Oct 09 05:03:21 AM UTC 24 |
757453164 ps |
T212 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_access_same_device.2009363272 |
|
|
Oct 09 05:02:37 AM UTC 24 |
Oct 09 05:03:22 AM UTC 24 |
1354102272 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_random_large_delays.1448420646 |
|
|
Oct 09 04:59:38 AM UTC 24 |
Oct 09 05:03:23 AM UTC 24 |
55211986241 ps |
T152 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_random_slow_rsp.377028119 |
|
|
Oct 09 04:58:36 AM UTC 24 |
Oct 09 05:03:27 AM UTC 24 |
30937283368 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all_with_reset_error.2976667719 |
|
|
Oct 09 05:00:34 AM UTC 24 |
Oct 09 05:03:27 AM UTC 24 |
2741963828 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_random.2263878671 |
|
|
Oct 09 05:02:58 AM UTC 24 |
Oct 09 05:03:28 AM UTC 24 |
259810293 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_error_random.2836861559 |
|
|
Oct 09 05:02:45 AM UTC 24 |
Oct 09 05:03:28 AM UTC 24 |
1144931744 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke_zero_delays.1029049242 |
|
|
Oct 09 05:03:24 AM UTC 24 |
Oct 09 05:03:28 AM UTC 24 |
37344713 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_unmapped_addr.1958878041 |
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|
Oct 09 05:03:14 AM UTC 24 |
Oct 09 05:03:28 AM UTC 24 |
106331597 ps |
T672 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke.3381813683 |
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|
Oct 09 05:03:22 AM UTC 24 |
Oct 09 05:03:28 AM UTC 24 |
232384100 ps |
T42 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all_with_reset_error.1164994588 |
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|
Oct 09 04:58:19 AM UTC 24 |
Oct 09 05:03:28 AM UTC 24 |
2310651688 ps |
T673 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_error_and_unmapped_addr.1353524336 |
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|
Oct 09 05:03:16 AM UTC 24 |
Oct 09 05:03:30 AM UTC 24 |
620575692 ps |
T674 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_random_zero_delays.2221868536 |
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|
Oct 09 05:02:59 AM UTC 24 |
Oct 09 05:03:31 AM UTC 24 |
294105523 ps |
T73 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_random_large_delays.3046020810 |
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|
Oct 09 04:58:34 AM UTC 24 |
Oct 09 05:03:31 AM UTC 24 |
49515920057 ps |
T675 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_same_source.368540429 |
|
|
Oct 09 05:03:30 AM UTC 24 |
Oct 09 05:03:34 AM UTC 24 |
95958862 ps |
T676 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_error_and_unmapped_addr.3167374093 |
|
|
Oct 09 05:03:32 AM UTC 24 |
Oct 09 05:03:36 AM UTC 24 |
114684488 ps |
T677 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_access_same_device.55085765 |
|
|
Oct 09 05:03:30 AM UTC 24 |
Oct 09 05:03:38 AM UTC 24 |
32790828 ps |
T678 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all_with_reset_error.2671071449 |
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|
Oct 09 05:01:18 AM UTC 24 |
Oct 09 05:03:40 AM UTC 24 |
377681062 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_error_random.2510795222 |
|
|
Oct 09 05:03:14 AM UTC 24 |
Oct 09 05:03:42 AM UTC 24 |
3658618921 ps |
T43 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all_with_rand_reset.3898451362 |
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|
Oct 09 04:56:12 AM UTC 24 |
Oct 09 05:03:43 AM UTC 24 |
1474117151 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_error_random.3176815532 |
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|
Oct 09 05:03:32 AM UTC 24 |
Oct 09 05:03:43 AM UTC 24 |
92974169 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke.342033152 |
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|
Oct 09 05:03:42 AM UTC 24 |
Oct 09 05:03:47 AM UTC 24 |
34454472 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke_zero_delays.1143617146 |
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|
Oct 09 05:03:44 AM UTC 24 |
Oct 09 05:03:48 AM UTC 24 |
30530033 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all_with_rand_reset.4143400672 |
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|
Oct 09 05:03:35 AM UTC 24 |
Oct 09 05:03:50 AM UTC 24 |
12869252 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke_large_delays.3301879935 |
|
|
Oct 09 05:02:55 AM UTC 24 |
Oct 09 05:03:52 AM UTC 24 |
23473385742 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_random_zero_delays.848145460 |
|
|
Oct 09 05:03:29 AM UTC 24 |
Oct 09 05:03:53 AM UTC 24 |
264032749 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all_with_reset_error.3527509091 |
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|
Oct 09 05:00:02 AM UTC 24 |
Oct 09 05:03:54 AM UTC 24 |
1175501713 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all_with_error.4001660078 |
|
|
Oct 09 05:01:52 AM UTC 24 |
Oct 09 05:03:57 AM UTC 24 |
1223054050 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_access_same_device.3464376570 |
|
|
Oct 09 05:03:02 AM UTC 24 |
Oct 09 05:03:59 AM UTC 24 |
1221156866 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all_with_reset_error.1794033748 |
|
|
Oct 09 05:01:52 AM UTC 24 |
Oct 09 05:03:59 AM UTC 24 |
3622961422 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke_slow_rsp.342827261 |
|
|
Oct 09 05:03:25 AM UTC 24 |
Oct 09 05:04:00 AM UTC 24 |
12293435194 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_unmapped_addr.1434469895 |
|
|
Oct 09 05:03:32 AM UTC 24 |
Oct 09 05:04:02 AM UTC 24 |
3038162143 ps |
T213 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_random.971606078 |
|
|
Oct 09 05:03:29 AM UTC 24 |
Oct 09 05:04:05 AM UTC 24 |
1882369872 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_random_large_delays.3684055500 |
|
|
Oct 09 05:00:17 AM UTC 24 |
Oct 09 05:04:07 AM UTC 24 |
42676117165 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all_with_rand_reset.3578998390 |
|
|
Oct 09 04:58:56 AM UTC 24 |
Oct 09 05:04:09 AM UTC 24 |
714620961 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke_large_delays.985980773 |
|
|
Oct 09 05:03:24 AM UTC 24 |
Oct 09 05:04:11 AM UTC 24 |
4987903065 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_random_zero_delays.2499226388 |
|
|
Oct 09 05:03:50 AM UTC 24 |
Oct 09 05:04:12 AM UTC 24 |
153203700 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_random_large_delays.2527683047 |
|
|
Oct 09 05:03:51 AM UTC 24 |
Oct 09 05:04:15 AM UTC 24 |
2392641122 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_error_random.802221418 |
|
|
Oct 09 05:04:01 AM UTC 24 |
Oct 09 05:04:15 AM UTC 24 |
355763070 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_unmapped_addr.1812277102 |
|
|
Oct 09 05:04:01 AM UTC 24 |
Oct 09 05:04:16 AM UTC 24 |
924490496 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke.3069027051 |
|
|
Oct 09 05:04:12 AM UTC 24 |
Oct 09 05:04:16 AM UTC 24 |
22864632 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_error_and_unmapped_addr.2773408821 |
|
|
Oct 09 05:04:03 AM UTC 24 |
Oct 09 05:04:17 AM UTC 24 |
106768189 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_same_source.1792127313 |
|
|
Oct 09 05:03:58 AM UTC 24 |
Oct 09 05:04:16 AM UTC 24 |
347026502 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_stress_all.3635335097 |
|
|
Oct 09 05:02:47 AM UTC 24 |
Oct 09 05:04:17 AM UTC 24 |
4151950413 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke_zero_delays.2437035732 |
|
|
Oct 09 05:04:13 AM UTC 24 |
Oct 09 05:04:18 AM UTC 24 |
44384332 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all_with_reset_error.2118188869 |
|
|
Oct 09 05:04:11 AM UTC 24 |
Oct 09 05:04:20 AM UTC 24 |
20072924 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_stress_all_with_error.1558328457 |
|
|
Oct 09 05:03:20 AM UTC 24 |
Oct 09 05:04:21 AM UTC 24 |
422606668 ps |
T74 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke_large_delays.3717489801 |
|
|
Oct 09 05:03:44 AM UTC 24 |
Oct 09 05:04:21 AM UTC 24 |
6641473034 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_random_zero_delays.1014524619 |
|
|
Oct 09 05:04:19 AM UTC 24 |
Oct 09 05:04:23 AM UTC 24 |
21784602 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke_slow_rsp.82584396 |
|
|
Oct 09 05:03:44 AM UTC 24 |
Oct 09 05:04:28 AM UTC 24 |
5402673563 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_stress_all_with_error.4220400845 |
|
|
Oct 09 05:02:22 AM UTC 24 |
Oct 09 05:04:29 AM UTC 24 |
3208496208 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_unmapped_addr.3912164135 |
|
|
Oct 09 05:04:23 AM UTC 24 |
Oct 09 05:04:29 AM UTC 24 |
102542240 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_error_and_unmapped_addr.985436212 |
|
|
Oct 09 05:04:25 AM UTC 24 |
Oct 09 05:04:32 AM UTC 24 |
125782549 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_random.991749314 |
|
|
Oct 09 05:03:48 AM UTC 24 |
Oct 09 05:04:33 AM UTC 24 |
1003751450 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_random_slow_rsp.3998776346 |
|
|
Oct 09 05:00:45 AM UTC 24 |
Oct 09 05:04:39 AM UTC 24 |
20807630647 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_error_random.1723546673 |
|
|
Oct 09 05:04:22 AM UTC 24 |
Oct 09 05:04:40 AM UTC 24 |
429761274 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke.3824532237 |
|
|
Oct 09 05:04:35 AM UTC 24 |
Oct 09 05:04:41 AM UTC 24 |
244224176 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all.3730244087 |
|
|
Oct 09 05:00:52 AM UTC 24 |
Oct 09 05:04:42 AM UTC 24 |
1915143590 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_random_slow_rsp.1994501657 |
|
|
Oct 09 05:03:01 AM UTC 24 |
Oct 09 05:04:45 AM UTC 24 |
54099392672 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke_zero_delays.1401264033 |
|
|
Oct 09 05:04:41 AM UTC 24 |
Oct 09 05:04:45 AM UTC 24 |
35896890 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_random_large_delays.1432603734 |
|
|
Oct 09 05:01:06 AM UTC 24 |
Oct 09 05:04:48 AM UTC 24 |
37729676135 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke_large_delays.363582117 |
|
|
Oct 09 05:04:16 AM UTC 24 |
Oct 09 05:04:50 AM UTC 24 |
7178482296 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_random.3672701297 |
|
|
Oct 09 05:04:44 AM UTC 24 |
Oct 09 05:04:52 AM UTC 24 |
165113955 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_access_same_device.1472212226 |
|
|
Oct 09 05:04:20 AM UTC 24 |
Oct 09 05:04:54 AM UTC 24 |
199458719 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_random.3980448734 |
|
|
Oct 09 05:04:18 AM UTC 24 |
Oct 09 05:04:55 AM UTC 24 |
365246780 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all_with_error.81869406 |
|
|
Oct 09 05:03:38 AM UTC 24 |
Oct 09 05:04:58 AM UTC 24 |
844368439 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_same_source.4157265682 |
|
|
Oct 09 05:04:22 AM UTC 24 |
Oct 09 05:04:58 AM UTC 24 |
1493151818 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_access_same_device.2338675918 |
|
|
Oct 09 05:04:51 AM UTC 24 |
Oct 09 05:05:01 AM UTC 24 |
405042084 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_access_same_device.3145086829 |
|
|
Oct 09 05:03:55 AM UTC 24 |
Oct 09 05:05:02 AM UTC 24 |
2250316447 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_random_slow_rsp.4252423110 |
|
|
Oct 09 05:01:06 AM UTC 24 |
Oct 09 05:05:06 AM UTC 24 |
25086811000 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke_slow_rsp.3307532662 |
|
|
Oct 09 05:04:18 AM UTC 24 |
Oct 09 05:05:06 AM UTC 24 |
6979691662 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_unmapped_addr.3175206405 |
|
|
Oct 09 05:05:00 AM UTC 24 |
Oct 09 05:05:07 AM UTC 24 |
760890942 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all_with_rand_reset.1991210003 |
|
|
Oct 09 05:04:06 AM UTC 24 |
Oct 09 05:05:07 AM UTC 24 |
144627617 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_access_same_device_slow_rsp.1592250052 |
|
|
Oct 09 05:02:12 AM UTC 24 |
Oct 09 05:05:08 AM UTC 24 |
62653212738 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_random_zero_delays.1222521202 |
|
|
Oct 09 05:04:46 AM UTC 24 |
Oct 09 05:05:10 AM UTC 24 |
124239277 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke.2889104086 |
|
|
Oct 09 05:05:09 AM UTC 24 |
Oct 09 05:05:13 AM UTC 24 |
38380383 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke_zero_delays.1246993410 |
|
|
Oct 09 05:05:09 AM UTC 24 |
Oct 09 05:05:13 AM UTC 24 |
27238844 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_error_and_unmapped_addr.452344913 |
|
|
Oct 09 05:05:00 AM UTC 24 |
Oct 09 05:05:15 AM UTC 24 |
136975639 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_random_slow_rsp.1150396058 |
|
|
Oct 09 05:02:35 AM UTC 24 |
Oct 09 05:05:21 AM UTC 24 |
23400618479 ps |
T297 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all.2425606339 |
|
|
Oct 09 05:05:02 AM UTC 24 |
Oct 09 05:05:22 AM UTC 24 |
476632499 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke_large_delays.1117168450 |
|
|
Oct 09 05:04:41 AM UTC 24 |
Oct 09 05:05:22 AM UTC 24 |
8129360502 ps |
T153 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all.168160687 |
|
|
Oct 09 05:03:33 AM UTC 24 |
Oct 09 05:05:24 AM UTC 24 |
4317861973 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_random_zero_delays.1318992828 |
|
|
Oct 09 05:05:14 AM UTC 24 |
Oct 09 05:05:26 AM UTC 24 |
87685776 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_same_source.466192218 |
|
|
Oct 09 05:04:55 AM UTC 24 |
Oct 09 05:05:27 AM UTC 24 |
2803717505 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke_slow_rsp.737829678 |
|
|
Oct 09 05:04:42 AM UTC 24 |
Oct 09 05:05:27 AM UTC 24 |
2897992532 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_random_large_delays.802037469 |
|
|
Oct 09 05:01:33 AM UTC 24 |
Oct 09 05:05:29 AM UTC 24 |
34412621365 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all_with_reset_error.1456619588 |
|
|
Oct 09 05:00:56 AM UTC 24 |
Oct 09 05:05:30 AM UTC 24 |
3278649751 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_error_random.1865948767 |
|
|
Oct 09 05:04:57 AM UTC 24 |
Oct 09 05:05:33 AM UTC 24 |
882141845 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_same_source.67933535 |
|
|
Oct 09 05:05:25 AM UTC 24 |
Oct 09 05:05:33 AM UTC 24 |
48083907 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_stress_all_with_error.1340306539 |
|
|
Oct 09 05:05:34 AM UTC 24 |
Oct 09 05:05:40 AM UTC 24 |
226293901 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_error_random.92280952 |
|
|
Oct 09 05:05:29 AM UTC 24 |
Oct 09 05:05:44 AM UTC 24 |
362628678 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all_with_error.267495905 |
|
|
Oct 09 05:05:07 AM UTC 24 |
Oct 09 05:05:46 AM UTC 24 |
403830985 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke_large_delays.2716230572 |
|
|
Oct 09 05:05:10 AM UTC 24 |
Oct 09 05:05:46 AM UTC 24 |
4219828875 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_error_and_unmapped_addr.2397539407 |
|
|
Oct 09 05:05:29 AM UTC 24 |
Oct 09 05:05:47 AM UTC 24 |
646676781 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke.546491686 |
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Oct 09 05:05:41 AM UTC 24 |
Oct 09 05:05:48 AM UTC 24 |
175874389 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_random.1719834892 |
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Oct 09 05:05:14 AM UTC 24 |
Oct 09 05:05:48 AM UTC 24 |
713402373 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke_zero_delays.3434506343 |
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|
Oct 09 05:05:45 AM UTC 24 |
Oct 09 05:05:50 AM UTC 24 |
29773582 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_unmapped_addr.233534296 |
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Oct 09 05:05:29 AM UTC 24 |
Oct 09 05:05:53 AM UTC 24 |
448057988 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_access_same_device_slow_rsp.306376446 |
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Oct 09 05:02:39 AM UTC 24 |
Oct 09 05:05:53 AM UTC 24 |
25938770916 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_stress_all_with_rand_reset.1772466926 |
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Oct 09 05:04:31 AM UTC 24 |
Oct 09 05:05:59 AM UTC 24 |
208424060 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_stress_all.1992599460 |
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|
Oct 09 05:02:21 AM UTC 24 |
Oct 09 05:06:01 AM UTC 24 |
6393840714 ps |
T176 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all.1125393894 |
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Oct 09 05:04:03 AM UTC 24 |
Oct 09 05:06:05 AM UTC 24 |
3313404103 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_access_same_device_slow_rsp.188858290 |
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Oct 09 04:59:40 AM UTC 24 |
Oct 09 05:06:07 AM UTC 24 |
96099505331 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/44.xbar_random_zero_delays.852827886 |
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|
Oct 09 05:05:48 AM UTC 24 |
Oct 09 05:06:07 AM UTC 24 |
165049876 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_access_same_device.926494761 |
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Oct 09 05:05:24 AM UTC 24 |
Oct 09 05:06:10 AM UTC 24 |
1525700733 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_random_slow_rsp.4164928996 |
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Oct 09 05:01:33 AM UTC 24 |
Oct 09 05:06:12 AM UTC 24 |
28965635569 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/44.xbar_same_source.2296721704 |
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Oct 09 05:05:59 AM UTC 24 |
Oct 09 05:06:13 AM UTC 24 |
267590702 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_stress_all.741004201 |
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|
Oct 09 05:03:16 AM UTC 24 |
Oct 09 05:06:15 AM UTC 24 |
7651377678 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_random_slow_rsp.863443339 |
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|
Oct 09 05:03:30 AM UTC 24 |
Oct 09 05:06:15 AM UTC 24 |
69907848955 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_stress_all_with_reset_error.1716484917 |
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|
Oct 09 05:02:49 AM UTC 24 |
Oct 09 05:06:15 AM UTC 24 |
11700809437 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_10_08/xbar_main-sim-vcs/coverage/xbar_build_mode/44.xbar_error_and_unmapped_addr.293883875 |
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Oct 09 05:06:08 AM UTC 24 |
Oct 09 05:06:18 AM UTC 24 |
428795486 ps |