Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}
dashboard | hierarchy | modlist | groups | tests | asserts


Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 2508775 1 T1 87 T2 100 T3 388
values[2] 179068 1 T1 13 T2 11 T3 27
values[3] 37913 1 T3 4 T7 2 T12 1
values[4] 22970 1 T157 1 T53 87 T54 228
values[5] 16075 1 T53 107 T54 224 T20 46
values[6] 12267 1 T53 104 T54 174 T20 41
values[7] 9768 1 T53 107 T54 154 T20 31
values[8] 8246 1 T53 114 T54 146 T20 43
values[9] 7565 1 T53 128 T54 128 T20 62
values[10] 6594 1 T53 135 T54 98 T20 53
values[11] 5871 1 T53 109 T54 77 T20 54
values[12] 5067 1 T53 83 T54 97 T20 48
values[13] 4576 1 T53 54 T54 86 T20 46
values[14] 4218 1 T53 81 T54 58 T20 27
values[15] 3980 1 T53 73 T54 47 T20 35
values[16] 3720 1 T53 91 T54 42 T20 35
values[17] 3531 1 T53 49 T54 34 T20 41
values[18] 3121 1 T53 42 T54 16 T20 32
values[19] 2830 1 T53 22 T54 18 T20 22
values[20] 2850 1 T53 25 T54 13 T20 30
values[21] 2874 1 T53 29 T54 13 T20 31
values[22] 2698 1 T53 27 T54 15 T20 35
values[23] 2556 1 T53 32 T54 17 T20 13
values[24] 2398 1 T53 24 T54 16 T20 15
values[25] 2340 1 T53 36 T54 21 T20 19
values[26] 2434 1 T53 51 T54 24 T20 31
values[27] 2144 1 T53 35 T54 10 T20 31
values[28] 2164 1 T53 23 T54 6 T20 31
values[29] 2029 1 T53 22 T54 12 T20 36
values[30] 1934 1 T53 19 T54 5 T20 22
values[31] 1898 1 T53 16 T54 7 T20 21
values[32] 1851 1 T53 16 T54 7 T20 25
values[33] 1713 1 T53 20 T54 6 T20 32
values[34] 1664 1 T53 28 T54 10 T20 32
values[35] 1632 1 T53 27 T54 8 T20 10
values[36] 1591 1 T53 13 T54 4 T20 16
values[37] 1544 1 T53 18 T54 4 T20 23
values[38] 1428 1 T53 32 T54 7 T20 22
values[39] 1311 1 T53 19 T54 9 T20 16
values[40] 1394 1 T53 18 T54 7 T20 17
values[41] 1431 1 T53 9 T54 3 T20 26
values[42] 1296 1 T53 10 T54 6 T20 14
values[43] 1333 1 T53 19 T54 9 T20 19
values[44] 1312 1 T53 24 T54 8 T20 29
values[45] 1201 1 T53 10 T54 4 T20 8
values[46] 1240 1 T53 9 T54 5 T20 9
values[47] 1231 1 T53 11 T54 6 T20 21
values[48] 1225 1 T53 16 T54 11 T20 20
values[49] 1127 1 T53 13 T54 8 T20 12
values[50] 1125 1 T53 20 T54 10 T20 10
values[51] 1130 1 T53 16 T54 14 T20 13
values[52] 1108 1 T53 21 T54 7 T20 13
values[53] 1107 1 T53 12 T54 8 T20 19
values[54] 1113 1 T53 22 T54 5 T20 11
values[55] 1060 1 T53 13 T54 6 T20 6
values[56] 1046 1 T53 11 T54 7 T20 6
values[57] 1076 1 T53 13 T54 6 T20 7
values[58] 1078 1 T53 12 T54 8 T20 10
values[59] 1068 1 T53 10 T54 8 T20 12
values[60] 1113 1 T53 8 T54 10 T20 7
values[61] 1410 1 T53 11 T54 18 T20 15
values[62] 2550 1 T53 15 T54 27 T20 36
values[63] 7732 1 T53 89 T54 63 T20 102
values[64] 70571 1 T53 189 T54 100 T20 137


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 2532954 1 T1 141 T2 153 T3 406
values[2] 411763 1 T1 32 T2 36 T3 112
values[3] 36394 1 T1 4 T3 19 T8 4
values[4] 6935 1 T3 1 T8 1 T7 1
values[5] 3521 1 T25 1 T54 5 T56 1
values[6] 2538 1 T54 8 T20 8 T283 1
values[7] 2167 1 T54 15 T20 11 T283 2
values[8] 1997 1 T54 11 T20 4 T283 1
values[9] 1799 1 T54 8 T20 6 T83 1
values[10] 1679 1 T54 7 T20 9 T83 1
values[11] 1567 1 T54 24 T20 10 T83 3
values[12] 1389 1 T54 18 T20 14 T83 3
values[13] 1152 1 T54 13 T20 12 T83 2
values[14] 1103 1 T54 10 T20 7 T83 1
values[15] 1050 1 T54 7 T20 5 T83 2
values[16] 1042 1 T54 10 T20 6 T83 5
values[17] 1069 1 T54 10 T20 13 T83 1
values[18] 1041 1 T54 8 T20 10 T83 1
values[19] 1040 1 T54 5 T20 3 T83 2
values[20] 955 1 T54 3 T20 3 T83 1
values[21] 968 1 T20 7 T83 2 T123 3
values[22] 905 1 T20 5 T83 8 T123 2
values[23] 855 1 T20 7 T83 4 T123 2
values[24] 804 1 T20 3 T83 3 T123 2
values[25] 759 1 T83 1 T123 2 T178 3
values[26] 725 1 T83 1 T123 1 T178 2
values[27] 644 1 T83 1 T123 1 T178 5
values[28] 606 1 T83 1 T123 2 T178 5
values[29] 656 1 T83 1 T123 2 T178 10
values[30] 622 1 T83 1 T123 1 T178 12
values[31] 597 1 T83 2 T123 2 T178 7
values[32] 580 1 T83 3 T123 3 T178 2
values[33] 594 1 T83 1 T123 2 T178 3
values[34] 588 1 T83 1 T123 2 T178 3
values[35] 519 1 T83 2 T123 2 T178 3
values[36] 548 1 T83 2 T123 2 T178 4
values[37] 478 1 T83 1 T123 2 T178 4
values[38] 474 1 T83 1 T123 2 T178 3
values[39] 503 1 T83 2 T123 1 T178 3
values[40] 516 1 T83 1 T123 1 T178 4
values[41] 451 1 T83 1 T123 2 T178 6
values[42] 452 1 T83 1 T123 3 T178 4
values[43] 442 1 T83 2 T123 2 T178 5
values[44] 444 1 T83 2 T123 2 T178 6
values[45] 445 1 T83 1 T123 2 T178 3
values[46] 430 1 T83 2 T123 2 T178 2
values[47] 410 1 T83 1 T123 2 T178 3
values[48] 423 1 T83 2 T123 2 T178 3
values[49] 376 1 T83 2 T123 1 T178 3
values[50] 412 1 T83 1 T123 1 T178 2
values[51] 409 1 T83 1 T123 2 T178 4
values[52] 392 1 T83 1 T123 3 T178 4
values[53] 370 1 T83 1 T123 2 T178 4
values[54] 368 1 T83 1 T123 2 T178 2
values[55] 358 1 T83 1 T123 2 T178 2
values[56] 352 1 T83 1 T123 2 T178 2
values[57] 381 1 T83 1 T123 2 T178 5
values[58] 388 1 T83 1 T123 2 T178 6
values[59] 382 1 T83 2 T123 2 T178 9
values[60] 361 1 T83 2 T123 2 T178 3
values[61] 369 1 T83 2 T123 2 T178 2
values[62] 643 1 T83 17 T123 2 T178 2
values[63] 2682 1 T83 42 T123 4 T178 10
values[64] 19888 1 T83 76 T123 142 T178 171


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 316322 1 T1 3 T2 1 T3 4
values[2] 1809293 1 T1 41 T2 175 T3 365
values[3] 526620 1 T1 98 T2 19 T3 87
values[4] 51362 1 T1 4 T7 6 T10 2
values[5] 33981 1 T53 112 T54 199 T20 48
values[6] 25241 1 T53 98 T54 184 T20 45
values[7] 19511 1 T53 117 T54 183 T20 32
values[8] 15415 1 T53 105 T54 157 T20 47
values[9] 12846 1 T53 84 T54 166 T20 58
values[10] 10899 1 T53 60 T54 148 T20 47
values[11] 9733 1 T53 53 T54 142 T20 31
values[12] 8550 1 T53 72 T54 120 T20 29
values[13] 7756 1 T53 79 T54 58 T20 40
values[14] 6934 1 T53 81 T54 41 T20 54
values[15] 6117 1 T53 97 T54 45 T20 44
values[16] 5469 1 T53 105 T54 51 T20 37
values[17] 5179 1 T53 108 T54 70 T20 25
values[18] 4693 1 T53 82 T54 53 T20 25
values[19] 4127 1 T53 62 T54 35 T20 36
values[20] 3695 1 T53 57 T54 26 T20 61
values[21] 3216 1 T53 73 T54 15 T20 69
values[22] 3141 1 T53 70 T54 24 T20 62
values[23] 2844 1 T53 44 T54 21 T20 52
values[24] 2635 1 T53 58 T54 15 T20 34
values[25] 2436 1 T53 76 T54 8 T20 32
values[26] 2273 1 T53 79 T54 5 T20 22
values[27] 2252 1 T53 54 T54 12 T20 33
values[28] 2065 1 T53 57 T54 10 T20 31
values[29] 1957 1 T53 38 T54 16 T20 25
values[30] 1845 1 T53 28 T54 20 T20 19
values[31] 1820 1 T53 33 T54 15 T20 17
values[32] 1838 1 T53 28 T54 17 T20 28
values[33] 1666 1 T53 38 T54 7 T20 17
values[34] 1586 1 T53 30 T54 11 T20 14
values[35] 1460 1 T53 14 T54 8 T20 15
values[36] 1500 1 T53 10 T54 7 T20 12
values[37] 1477 1 T53 12 T54 4 T20 14
values[38] 1434 1 T53 10 T54 6 T20 14
values[39] 1436 1 T53 10 T54 6 T20 15
values[40] 1399 1 T53 18 T54 7 T20 19
values[41] 1415 1 T53 25 T54 9 T20 17
values[42] 1406 1 T53 18 T54 10 T20 18
values[43] 1397 1 T53 10 T54 6 T20 25
values[44] 1376 1 T53 9 T54 9 T20 9
values[45] 1324 1 T53 11 T54 20 T20 13
values[46] 1279 1 T53 11 T54 9 T20 12
values[47] 1292 1 T53 9 T54 4 T20 14
values[48] 1298 1 T53 3 T54 6 T20 13
values[49] 1358 1 T53 3 T54 9 T20 14
values[50] 1291 1 T53 5 T54 5 T20 14
values[51] 1254 1 T53 7 T54 5 T20 22
values[52] 1224 1 T53 13 T54 5 T20 22
values[53] 1173 1 T53 12 T54 5 T20 15
values[54] 1158 1 T53 10 T54 6 T20 8
values[55] 1124 1 T53 7 T54 4 T20 11
values[56] 1100 1 T53 4 T54 5 T20 10
values[57] 1161 1 T53 2 T54 8 T20 12
values[58] 1136 1 T53 6 T54 6 T20 10
values[59] 1096 1 T53 2 T54 3 T20 10
values[60] 1125 1 T53 8 T54 7 T20 12
values[61] 1295 1 T53 5 T54 14 T20 20
values[62] 2157 1 T53 9 T54 9 T20 24
values[63] 7111 1 T53 44 T54 41 T20 65
values[64] 71570 1 T53 151 T54 107 T20 108

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%