Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	164897	1			T1	6		T2	8		T3	13
values[2]	9356	1			T7	2		T22	6		T26	1
values[3]	3503	1			T189	67		T50	1		T81	2
values[4]	2360	1			T189	29		T89	1		T124	1
values[5]	1773	1			T189	8		T345	30		T200	99
values[6]	1170	1			T189	1		T345	13		T200	46
values[7]	840	1			T345	8		T200	7		T55	32
values[8]	635	1			T345	11		T55	5		T242	33
values[9]	558	1			T345	4		T55	14		T242	15
values[10]	579	1			T345	15		T55	5		T242	29
values[11]	501	1			T345	7		T242	27		T333	2
values[12]	461	1			T345	10		T242	17		T333	3
values[13]	445	1			T345	32		T242	10		T333	7
values[14]	473	1			T345	12		T242	20		T333	1
values[15]	421	1			T345	7		T242	32		T333	11
values[16]	406	1			T345	22		T242	19		T333	4
values[17]	377	1			T345	31		T242	12		T333	12
values[18]	338	1			T345	6		T242	25		T333	16
values[19]	397	1			T345	12		T242	32		T333	17
values[20]	272	1			T345	18		T242	16		T333	11
values[21]	172	1			T345	4		T242	9		T333	10
values[22]	194	1			T345	10		T242	32		T333	5
values[23]	180	1			T345	7		T242	12		T333	11
values[24]	179	1			T345	26		T242	12		T333	5
values[25]	188	1			T345	9		T242	25		T333	13
values[26]	192	1			T345	5		T242	13		T333	18
values[27]	183	1			T345	16		T242	42		T333	13
values[28]	141	1			T345	16		T242	10		T333	9
values[29]	141	1			T345	10		T242	10		T333	8
values[30]	155	1			T345	19		T242	17		T333	4
values[31]	200	1			T345	31		T242	27		T333	7
values[32]	171	1			T345	12		T242	39		T333	7
values[33]	186	1			T345	14		T242	28		T333	7
values[34]	150	1			T345	5		T242	9		T333	9
values[35]	172	1			T345	6		T242	20		T333	6
values[36]	160	1			T345	11		T242	14		T333	13
values[37]	154	1			T345	6		T242	15		T333	11
values[38]	167	1			T345	21		T242	11		T333	7
values[39]	175	1			T345	19		T242	16		T333	2
values[40]	145	1			T242	26		T333	4		T346	1
values[41]	167	1			T242	23		T333	12		T346	2
values[42]	131	1			T242	23		T333	12		T346	1
values[43]	157	1			T242	9		T333	10		T346	1
values[44]	118	1			T242	15		T333	4		T346	1
values[45]	131	1			T242	13		T333	6		T346	1
values[46]	124	1			T242	4		T333	3		T346	1
values[47]	136	1			T242	13		T333	10		T346	1
values[48]	121	1			T242	8		T333	4		T346	1
values[49]	171	1			T242	11		T333	5		T346	1
values[50]	146	1			T242	8		T333	8		T346	1
values[51]	114	1			T242	2		T333	11		T346	1
values[52]	137	1			T333	14		T346	1		T336	1
values[53]	115	1			T333	16		T346	1		T336	1
values[54]	109	1			T333	6		T346	1		T336	1
values[55]	114	1			T333	2		T346	1		T336	1
values[56]	119	1			T333	2		T346	1		T336	1
values[57]	117	1			T333	5		T346	1		T336	1
values[58]	114	1			T333	4		T346	1		T336	1
values[59]	93	1			T333	3		T346	1		T336	1
values[60]	98	1			T333	15		T346	1		T336	1
values[61]	96	1			T333	7		T346	1		T336	1
values[62]	84	1			T346	1		T336	1		T172	1
values[63]	90	1			T346	1		T336	1		T172	1
values[64]	75	1			T346	1		T336	1		T172	1
values[65]	59	1			T346	1		T336	1		T172	1
values[66]	56	1			T346	1		T336	1		T172	1
values[67]	70	1			T346	1		T336	1		T172	1
values[68]	55	1			T346	1		T336	1		T172	1
values[69]	65	1			T346	1		T336	1		T172	1
values[70]	57	1			T346	1		T336	1		T172	1
values[71]	40	1			T346	1		T336	1		T172	1
values[72]	39	1			T346	1		T336	1		T172	1
values[73]	37	1			T346	1		T336	1		T172	1
values[74]	43	1			T346	1		T336	1		T172	1
values[75]	38	1			T346	1		T336	1		T172	1
values[76]	33	1			T346	1		T336	1		T172	1
values[77]	33	1			T346	1		T336	1		T172	1
values[78]	29	1			T346	1		T336	1		T172	1
values[79]	24	1			T346	1		T336	1		T172	1
values[80]	22	1			T346	1		T336	1		T172	1
values[81]	26	1			T346	1		T336	2		T172	1
values[82]	24	1			T346	1		T336	1		T172	1
values[83]	22	1			T346	1		T336	1		T172	1
values[84]	26	1			T346	1		T336	1		T172	1
values[85]	25	1			T346	1		T336	1		T172	1
values[86]	28	1			T346	2		T336	1		T172	1
values[87]	39	1			T346	7		T336	1		T172	1
values[88]	39	1			T346	8		T336	1		T172	1
values[89]	35	1			T346	2		T336	1		T172	1
values[90]	40	1			T346	3		T336	3		T172	1
values[91]	40	1			T346	1		T336	6		T172	1
values[92]	34	1			T346	2		T336	2		T172	1
values[93]	34	1			T346	1		T336	2		T172	1
values[94]	39	1			T346	2		T336	3		T172	1
values[95]	36	1			T346	5		T336	4		T172	1
values[96]	28	1			T346	4		T336	1		T172	1
values[97]	28	1			T346	2		T336	2		T172	1
values[98]	23	1			T346	2		T336	1		T172	1
values[99]	26	1			T346	1		T336	1		T172	1
values[100]	27	1			T346	2		T336	4		T172	1
values[101]	27	1			T346	1		T336	1		T172	1
values[102]	26	1			T346	2		T336	1		T172	1
values[103]	26	1			T346	1		T336	1		T172	1
values[104]	33	1			T346	4		T336	4		T172	1
values[105]	27	1			T346	2		T336	4		T172	1
values[106]	25	1			T346	1		T336	2		T172	1
values[107]	31	1			T346	1		T336	3		T172	1
values[108]	29	1			T346	1		T336	2		T172	1
values[109]	30	1			T346	1		T336	1		T172	1
values[110]	34	1			T346	2		T336	3		T172	1
values[111]	31	1			T346	2		T336	1		T172	2
values[112]	25	1			T346	3		T336	1		T172	1
values[113]	26	1			T346	1		T336	1		T172	3
values[114]	34	1			T346	2		T336	2		T172	1
values[115]	33	1			T346	4		T336	1		T172	3
values[116]	33	1			T346	4		T336	2		T172	3
values[117]	34	1			T346	1		T336	3		T172	2
values[118]	34	1			T346	2		T336	2		T172	1
values[119]	28	1			T346	2		T336	2		T172	1
values[120]	34	1			T346	3		T336	1		T172	4
values[121]	27	1			T346	1		T336	1		T172	1
values[122]	29	1			T346	2		T336	2		T172	2
values[123]	26	1			T346	2		T336	1		T172	2
values[124]	22	1			T346	2		T336	1		T172	1
values[125]	25	1			T346	3		T336	1		T172	1
values[126]	325	1			T346	48		T336	9		T172	6
values[127]	1618	1			T346	135		T336	97		T172	41
values[128]	2676	1			T346	124		T336	174		T172	237