Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.hmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	171083	1			T1	15		T2	13		T3	9
values[2]	5102	1			T2	1		T7	2		T8	1
values[3]	1971	1			T177	1		T81	1		T85	1
values[4]	1499	1			T120	1		T33	2		T338	62
values[5]	1285	1			T33	5		T338	65		T102	2
values[6]	1094	1			T33	1		T338	28		T102	4
values[7]	846	1			T33	2		T338	7		T102	2
values[8]	669	1			T33	3		T338	9		T102	2
values[9]	603	1			T33	2		T338	2		T102	4
values[10]	505	1			T33	3		T102	1		T104	36
values[11]	440	1			T33	1		T102	5		T104	33
values[12]	447	1			T33	1		T102	4		T104	58
values[13]	436	1			T33	4		T102	1		T104	53
values[14]	359	1			T33	2		T102	1		T104	28
values[15]	323	1			T33	2		T102	3		T104	33
values[16]	241	1			T33	4		T102	2		T104	27
values[17]	226	1			T33	7		T102	1		T104	38
values[18]	218	1			T33	7		T102	1		T104	40
values[19]	220	1			T33	2		T102	1		T104	65
values[20]	189	1			T33	2		T102	2		T104	61
values[21]	179	1			T33	4		T102	1		T104	18
values[22]	170	1			T33	3		T102	1		T104	15
values[23]	162	1			T33	2		T102	3		T104	7
values[24]	176	1			T33	2		T102	2		T104	6
values[25]	189	1			T33	2		T102	8		T104	1
values[26]	160	1			T33	1		T102	6		T336	1
values[27]	121	1			T33	3		T102	4		T336	1
values[28]	142	1			T33	2		T102	3		T336	1
values[29]	150	1			T33	2		T102	4		T336	1
values[30]	160	1			T33	1		T102	6		T336	1
values[31]	128	1			T33	4		T102	2		T336	1
values[32]	124	1			T33	1		T102	3		T336	1
values[33]	107	1			T33	2		T102	2		T336	1
values[34]	99	1			T33	2		T102	2		T336	1
values[35]	88	1			T33	3		T102	2		T336	1
values[36]	96	1			T33	2		T102	2		T336	1
values[37]	101	1			T33	1		T102	3		T336	1
values[38]	126	1			T33	1		T102	4		T336	1
values[39]	133	1			T33	3		T102	2		T336	1
values[40]	113	1			T33	1		T102	1		T336	1
values[41]	86	1			T33	3		T102	1		T336	1
values[42]	86	1			T33	6		T102	4		T336	1
values[43]	104	1			T33	4		T102	1		T336	1
values[44]	79	1			T33	5		T102	2		T336	1
values[45]	82	1			T33	7		T102	1		T336	1
values[46]	80	1			T33	2		T102	1		T336	1
values[47]	67	1			T33	4		T102	4		T336	1
values[48]	66	1			T33	4		T102	4		T336	1
values[49]	52	1			T33	4		T102	10		T336	1
values[50]	38	1			T33	2		T102	5		T336	1
values[51]	29	1			T33	1		T102	3		T336	1
values[52]	29	1			T33	2		T102	1		T336	1
values[53]	27	1			T33	1		T102	1		T336	1
values[54]	29	1			T33	2		T102	3		T336	1
values[55]	30	1			T33	3		T102	1		T336	1
values[56]	42	1			T33	9		T102	4		T336	1
values[57]	42	1			T33	4		T102	5		T336	1
values[58]	40	1			T33	2		T102	9		T336	1
values[59]	37	1			T33	4		T102	5		T336	2
values[60]	33	1			T33	2		T102	5		T336	2
values[61]	35	1			T33	1		T102	5		T336	1
values[62]	29	1			T33	2		T102	3		T336	1
values[63]	28	1			T33	2		T102	1		T336	1
values[64]	29	1			T33	2		T102	1		T336	1
values[65]	26	1			T33	2		T102	1		T336	1
values[66]	30	1			T33	1		T102	3		T336	1
values[67]	29	1			T33	1		T102	3		T336	1
values[68]	31	1			T33	3		T102	3		T336	1
values[69]	33	1			T33	1		T102	2		T336	1
values[70]	30	1			T33	1		T102	1		T336	1
values[71]	37	1			T33	7		T102	2		T336	1
values[72]	31	1			T33	1		T102	2		T336	1
values[73]	38	1			T33	2		T102	4		T336	1
values[74]	40	1			T33	4		T102	3		T336	1
values[75]	42	1			T33	1		T102	1		T336	1
values[76]	50	1			T33	6		T102	1		T336	1
values[77]	44	1			T33	3		T102	2		T336	1
values[78]	41	1			T33	3		T102	3		T336	2
values[79]	50	1			T33	5		T102	6		T336	2
values[80]	62	1			T33	8		T102	1		T336	3
values[81]	56	1			T33	5		T102	1		T336	5
values[82]	52	1			T33	4		T102	1		T336	8
values[83]	47	1			T33	8		T102	3		T336	4
values[84]	56	1			T33	10		T102	1		T336	5
values[85]	52	1			T33	12		T102	1		T336	2
values[86]	47	1			T33	6		T102	2		T336	5
values[87]	43	1			T33	4		T102	4		T336	6
values[88]	51	1			T33	3		T102	2		T336	6
values[89]	53	1			T33	3		T102	3		T336	9
values[90]	48	1			T33	3		T102	5		T336	5
values[91]	58	1			T33	3		T102	5		T336	7
values[92]	51	1			T33	3		T102	1		T336	2
values[93]	47	1			T33	4		T102	2		T336	1
values[94]	49	1			T33	11		T102	2		T336	1
values[95]	58	1			T33	6		T102	4		T336	3
values[96]	53	1			T33	5		T102	2		T336	6
values[97]	57	1			T33	8		T102	9		T336	8
values[98]	46	1			T33	4		T102	2		T336	2
values[99]	57	1			T33	6		T102	4		T336	2
values[100]	60	1			T33	4		T102	5		T336	4
values[101]	53	1			T33	1		T102	6		T336	5
values[102]	63	1			T33	4		T102	8		T336	2
values[103]	38	1			T33	3		T102	6		T336	1
values[104]	44	1			T33	1		T102	1		T336	3
values[105]	45	1			T33	3		T102	5		T336	1
values[106]	45	1			T33	4		T102	7		T336	2
values[107]	53	1			T33	4		T102	4		T336	1
values[108]	58	1			T33	4		T102	9		T336	1
values[109]	67	1			T33	6		T102	11		T336	3
values[110]	55	1			T33	5		T102	5		T336	3
values[111]	52	1			T33	7		T102	2		T336	1
values[112]	49	1			T33	7		T102	1		T336	1
values[113]	58	1			T33	2		T102	2		T336	2
values[114]	76	1			T33	7		T102	4		T336	1
values[115]	69	1			T33	10		T102	6		T336	2
values[116]	68	1			T33	11		T102	5		T336	2
values[117]	68	1			T33	7		T102	3		T336	2
values[118]	70	1			T33	5		T102	3		T336	1
values[119]	61	1			T33	3		T102	8		T336	1
values[120]	64	1			T33	3		T102	6		T336	1
values[121]	67	1			T33	6		T102	3		T336	2
values[122]	76	1			T33	2		T102	7		T336	2
values[123]	93	1			T33	2		T102	12		T336	1
values[124]	101	1			T33	5		T102	6		T336	1
values[125]	208	1			T33	16		T102	27		T336	1
values[126]	485	1			T33	12		T102	56		T336	10
values[127]	1437	1			T33	4		T102	35		T336	94
values[128]	2311	1			T33	1		T102	3		T336	171