Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 431 1 T14 3 T24 1 T25 1
all_values[1] 504 1 T13 1 T14 5 T28 1
all_values[2] 499 1 T13 2 T14 5 T24 1
all_values[3] 470 1 T14 1 T25 1 T46 1
all_values[4] 470 1 T21 1 T14 2 T28 2
all_values[5] 468 1 T14 2 T25 1 T46 2
all_values[6] 496 1 T14 1 T28 1 T46 1
all_values[7] 513 1 T14 2 T24 1 T46 1
all_values[8] 485 1 T24 1 T25 1 T203 2
all_values[9] 515 1 T21 1 T14 3 T25 1
all_values[10] 484 1 T13 1 T14 1 T28 2
all_values[11] 458 1 T14 3 T25 1 T45 1
all_values[12] 463 1 T14 3 T24 1 T46 1
all_values[13] 461 1 T14 2 T24 1 T28 2
all_values[14] 433 1 T14 2 T203 2 T58 1
all_values[15] 471 1 T21 1 T14 1 T24 1
all_values[16] 470 1 T14 3 T25 1 T28 1
all_values[17] 480 1 T13 1 T21 1 T14 5
all_values[18] 484 1 T21 2 T14 2 T25 2
all_values[19] 477 1 T14 1 T46 1 T43 1
all_values[20] 438 1 T13 1 T21 1 T14 4
all_values[21] 465 1 T14 3 T25 1 T46 1
all_values[22] 439 1 T14 6 T24 1 T28 1
all_values[23] 481 1 T14 1 T24 1 T46 1
all_values[24] 473 1 T13 1 T14 1 T25 1
all_values[25] 473 1 T14 3 T25 1 T46 1
all_values[26] 497 1 T21 1 T14 2 T25 2

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