Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 441 1 T15 1 T16 1 T22 2
all_values[1] 463 1 T15 2 T22 3 T23 6
all_values[2] 462 1 T15 7 T22 3 T23 7
all_values[3] 445 1 T15 2 T22 3 T23 10
all_values[4] 501 1 T15 3 T16 2 T22 2
all_values[5] 417 1 T22 4 T23 6 T38 1
all_values[6] 498 1 T15 3 T16 1 T22 2
all_values[7] 421 1 T15 3 T22 1 T23 2
all_values[8] 474 1 T22 3 T23 9 T39 3
all_values[9] 475 1 T15 5 T23 7 T39 8
all_values[10] 470 1 T22 2 T23 8 T38 1
all_values[11] 470 1 T15 3 T22 1 T23 5
all_values[12] 533 1 T15 3 T23 8 T38 1
all_values[13] 460 1 T15 7 T22 1 T23 4
all_values[14] 459 1 T15 2 T22 3 T23 3
all_values[15] 473 1 T15 4 T16 1 T22 5
all_values[16] 457 1 T23 9 T38 3 T39 2
all_values[17] 446 1 T15 1 T22 1 T23 4
all_values[18] 503 1 T15 3 T22 4 T23 13
all_values[19] 460 1 T15 3 T16 1 T22 2
all_values[20] 478 1 T15 6 T16 1 T22 4
all_values[21] 468 1 T15 2 T16 1 T22 2
all_values[22] 458 1 T15 3 T16 1 T22 4
all_values[23] 438 1 T15 3 T23 6 T39 2
all_values[24] 404 1 T15 2 T16 1 T22 1
all_values[25] 454 1 T15 6 T22 1 T23 5
all_values[26] 485 1 T15 3 T16 1 T22 2

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