Module Definition
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Module Instance : tb.dut.u_s1n_28.gen_err_resp.err_resp.u_intg_gen.gen_data_intg.u_tlul_data_integ_enc.u_data_gen

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
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Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
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Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
gen_data_intg.u_tlul_data_integ_enc


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : prim_secded_inv_39_32_enc
Line No.TotalCoveredPercent
TOTAL99100.00
ALWAYS1399100.00

12 always_comb begin : p_encode 13 1/1 data_o = 39'(data_i); Tests: T1 T2 T3  14 1/1 data_o[32] = ^(data_o & 39'h002606BD25); Tests: T1 T2 T3  15 1/1 data_o[33] = ^(data_o & 39'h00DEBA8050); Tests: T1 T2 T3  16 1/1 data_o[34] = ^(data_o & 39'h00413D89AA); Tests: T1 T2 T3  17 1/1 data_o[35] = ^(data_o & 39'h0031234ED1); Tests: T1 T2 T3  18 1/1 data_o[36] = ^(data_o & 39'h00C2C1323B); Tests: T1 T2 T3  19 1/1 data_o[37] = ^(data_o & 39'h002DCC624C); Tests: T1 T2 T3  20 1/1 data_o[38] = ^(data_o & 39'h0098505586); Tests: T1 T2 T3  21 1/1 data_o ^= 39'h2A00000000; Tests: T1 T2 T3 
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