Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
93.22	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	4	40	90.91

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	4	40	90.91	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	201	1			T26	1		T55	1		T18	1
index[0x1]	219	1			T8	1		T6	1		T26	2
index[0x2]	202	1			T9	1		T56	1		T12	1
index[0x3]	204	1			T8	1		T9	1		T26	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	254	1			T6	1		T26	1		T56	1
lens_less_than_1000[1]	143	1			T8	1		T26	2		T56	1
lens_less_than_1000[2]	108	1			T9	2		T78	1		T39	1
lens_less_than_1000[3]	100	1			T38	2		T39	3		T83	1
lens_less_than_1000[4]	99	1			T8	1		T18	1		T75	2
lens_less_than_1000[5]	45	1			T39	1		T59	1		T44	2
lens_less_than_1000[6]	34	1			T26	1		T55	1		T78	1
lens_less_than_1000[7]	19	1			T12	1		T45	1		T92	2
lens_less_than_1000[8]	17	1			T59	2		T63	1		T50	1
lens_less_than_1000[9]	2	1			T59	2		-	-		-	-
len_2	5	1			T63	1		T261	1		T262	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	4	40	90.91	4

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0] , index[0x1] , index[0x2]]	[lens_less_than_1000[9]]	--	--	3
[index[0x3]]	[len_2]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	63	1			T26	1		T38	1		T39	1
index[0x0]	lens_less_than_1000[1]	33	1			T43	2		T263	1		T61	1
index[0x0]	lens_less_than_1000[2]	19	1			T87	1		T44	1		T60	1
index[0x0]	lens_less_than_1000[3]	28	1			T39	3		T91	1		T106	1
index[0x0]	lens_less_than_1000[4]	27	1			T18	1		T225	4		T106	1
index[0x0]	lens_less_than_1000[5]	14	1			T44	1		T136	1		T264	2
index[0x0]	lens_less_than_1000[6]	9	1			T55	1		T83	4		T68	1
index[0x0]	lens_less_than_1000[7]	4	1			T92	2		T265	1		T266	1
index[0x0]	lens_less_than_1000[8]	3	1			T59	2		T63	1		-	-
index[0x0]	len_2	1	1			T267	1		-	-		-	-
index[0x1]	lens_less_than_1000[0]	67	1			T6	1		T38	2		T39	1
index[0x1]	lens_less_than_1000[1]	47	1			T8	1		T26	1		T39	2
index[0x1]	lens_less_than_1000[2]	34	1			T78	1		T39	1		T88	1
index[0x1]	lens_less_than_1000[3]	22	1			T38	1		T268	1		T269	1
index[0x1]	lens_less_than_1000[4]	24	1			T75	2		T257	1		T100	1
index[0x1]	lens_less_than_1000[5]	9	1			T39	1		T270	1		T271	1
index[0x1]	lens_less_than_1000[6]	6	1			T26	1		T83	2		T272	1
index[0x1]	lens_less_than_1000[7]	4	1			T59	1		T62	1		T273	1
index[0x1]	lens_less_than_1000[8]	4	1			T50	1		T274	1		T275	1
index[0x1]	len_2	2	1			T262	1		T276	1		-	-
index[0x2]	lens_less_than_1000[0]	51	1			T38	1		T39	1		T81	1
index[0x2]	lens_less_than_1000[1]	29	1			T56	1		T38	1		T277	1
index[0x2]	lens_less_than_1000[2]	30	1			T9	1		T268	1		T44	1
index[0x2]	lens_less_than_1000[3]	29	1			T38	1		T61	1		T140	2
index[0x2]	lens_less_than_1000[4]	21	1			T43	1		T97	1		T92	1
index[0x2]	lens_less_than_1000[5]	13	1			T44	1		T134	1		T108	2
index[0x2]	lens_less_than_1000[6]	11	1			T118	1		T245	1		T71	1
index[0x2]	lens_less_than_1000[7]	7	1			T12	1		T45	1		T140	1
index[0x2]	lens_less_than_1000[8]	9	1			T251	1		T278	1		T279	1
index[0x2]	len_2	2	1			T63	1		T261	1		-	-
index[0x3]	lens_less_than_1000[0]	73	1			T56	1		T57	1		T39	1
index[0x3]	lens_less_than_1000[1]	34	1			T26	1		T39	1		T91	1
index[0x3]	lens_less_than_1000[2]	25	1			T9	1		T45	1		T140	2
index[0x3]	lens_less_than_1000[3]	21	1			T83	1		T58	1		T270	2
index[0x3]	lens_less_than_1000[4]	27	1			T8	1		T45	8		T97	1
index[0x3]	lens_less_than_1000[5]	9	1			T59	1		T280	1		T281	1
index[0x3]	lens_less_than_1000[6]	8	1			T78	1		T282	1		T265	1
index[0x3]	lens_less_than_1000[7]	4	1			T59	1		T70	1		T283	1
index[0x3]	lens_less_than_1000[8]	1	1			T284	1		-	-		-	-
index[0x3]	lens_less_than_1000[9]	2	1			T59	2		-	-		-	-