Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
96.61	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	2	42	95.45

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	2	42	95.45	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	186	1			T22	1		T6	1		T72	1
index[0x1]	180	1			T3	1		T4	1		T24	1
index[0x2]	197	1			T1	1		T4	1		T26	1
index[0x3]	154	1			T3	1		T24	1		T72	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	208	1			T53	1		T19	1		T7	1
lens_less_than_1000[1]	145	1			T3	1		T6	1		T53	1
lens_less_than_1000[2]	97	1			T4	2		T27	1		T50	1
lens_less_than_1000[3]	59	1			T1	1		T3	1		T24	1
lens_less_than_1000[4]	61	1			T22	1		T24	1		T72	1
lens_less_than_1000[5]	46	1			T7	1		T61	2		T266	1
lens_less_than_1000[6]	41	1			T26	1		T109	1		T126	1
lens_less_than_1000[7]	29	1			T5	1		T57	1		T267	1
lens_less_than_1000[8]	14	1			T75	1		T120	1		T89	1
lens_less_than_1000[9]	3	1			T21	1		T75	1		T241	1
len_2	14	1			T82	1		T268	1		T269	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	2	42	95.45	2

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x1]]	[lens_less_than_1000[9]]	0	1	1
[index[0x3]]	[lens_less_than_1000[9]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	56	1			T57	2		T58	1		T270	1
index[0x0]	lens_less_than_1000[1]	34	1			T6	1		T76	1		T271	1
index[0x0]	lens_less_than_1000[2]	21	1			T272	1		T91	1		T121	1
index[0x0]	lens_less_than_1000[3]	17	1			T72	1		T20	1		T273	1
index[0x0]	lens_less_than_1000[4]	12	1			T22	1		T274	1		T44	1
index[0x0]	lens_less_than_1000[5]	8	1			T61	1		T87	1		T275	1
index[0x0]	lens_less_than_1000[6]	20	1			T61	2		T276	1		T277	1
index[0x0]	lens_less_than_1000[7]	8	1			T278	1		T279	1		T280	1
index[0x0]	lens_less_than_1000[8]	2	1			T75	1		T241	1		-	-
index[0x0]	lens_less_than_1000[9]	2	1			T21	1		T75	1		-	-
index[0x0]	len_2	6	1			T82	1		T281	5		-	-
index[0x1]	lens_less_than_1000[0]	48	1			T58	1		T271	1		T82	1
index[0x1]	lens_less_than_1000[1]	47	1			T51	1		T43	1		T282	1
index[0x1]	lens_less_than_1000[2]	24	1			T4	1		T50	1		T283	1
index[0x1]	lens_less_than_1000[3]	13	1			T3	1		T56	2		T91	1
index[0x1]	lens_less_than_1000[4]	13	1			T24	1		T8	1		T110	1
index[0x1]	lens_less_than_1000[5]	7	1			T7	1		T65	1		T246	1
index[0x1]	lens_less_than_1000[6]	12	1			T126	1		T65	4		T277	1
index[0x1]	lens_less_than_1000[7]	9	1			T5	1		T57	1		T284	1
index[0x1]	lens_less_than_1000[8]	4	1			T285	2		T286	1		T248	1
index[0x1]	len_2	3	1			T269	1		T287	1		T288	1
index[0x2]	lens_less_than_1000[0]	62	1			T53	1		T19	1		T7	1
index[0x2]	lens_less_than_1000[1]	30	1			T53	1		T19	1		T51	1
index[0x2]	lens_less_than_1000[2]	32	1			T4	1		T81	1		T289	1
index[0x2]	lens_less_than_1000[3]	13	1			T1	1		T42	1		T110	2
index[0x2]	lens_less_than_1000[4]	21	1			T47	1		T43	1		T57	1
index[0x2]	lens_less_than_1000[5]	19	1			T269	1		T67	1		T279	1
index[0x2]	lens_less_than_1000[6]	5	1			T26	1		T106	1		T284	1
index[0x2]	lens_less_than_1000[7]	9	1			T267	1		T42	1		T290	1
index[0x2]	lens_less_than_1000[8]	2	1			T291	1		T241	1		-	-
index[0x2]	lens_less_than_1000[9]	1	1			T241	1		-	-		-	-
index[0x2]	len_2	3	1			T268	1		T292	1		T293	1
index[0x3]	lens_less_than_1000[0]	42	1			T40	1		T274	1		T294	1
index[0x3]	lens_less_than_1000[1]	34	1			T3	1		T41	2		T59	1
index[0x3]	lens_less_than_1000[2]	20	1			T27	1		T274	1		T82	1
index[0x3]	lens_less_than_1000[3]	16	1			T24	1		T20	1		T108	1
index[0x3]	lens_less_than_1000[4]	15	1			T72	1		T76	1		T42	1
index[0x3]	lens_less_than_1000[5]	12	1			T61	1		T266	1		T272	1
index[0x3]	lens_less_than_1000[6]	4	1			T109	1		T271	1		T295	1
index[0x3]	lens_less_than_1000[7]	3	1			T69	1		T296	1		T297	1
index[0x3]	lens_less_than_1000[8]	6	1			T120	1		T89	1		T298	3
index[0x3]	len_2	2	1			T299	1		T248	1		-	-