Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	61797228	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

29898831

1

T1

626

T2

112526

T3

1526

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	13874566	1			T1	260		T2	45000		T3	617
values[0x0]	38004668	1			T1	853		T2	155091		T3	2006
values[0x1]	39816825	1			T1	847		T2	155309		T3	1948

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	52847599	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

38848460

1

T1

781

T2

142153

T3

1872

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	287545	1			T1	17		T3	11		T5	752
valid_sources[0x01]	267406	1			T3	26		T5	1041		T6	1775
valid_sources[0x02]	271689	1			T1	4		T3	9		T5	968
valid_sources[0x03]	281487	1			T3	32		T5	820		T6	1823
valid_sources[0x04]	295033	1			T1	2		T3	11		T5	1216
valid_sources[0x05]	323334	1			T3	19		T5	1486		T6	1851
valid_sources[0x06]	292473	1			T1	13		T3	16		T5	1592
valid_sources[0x07]	271043	1			T1	26		T3	25		T5	772
valid_sources[0x08]	270053	1			T3	10		T5	684		T6	1736
valid_sources[0x09]	494568	1			T1	8		T3	14		T5	940
valid_sources[0x0a]	288276	1			T1	3		T3	7		T5	1095
valid_sources[0x0b]	292696	1			T3	13		T5	804		T6	1779
valid_sources[0x0c]	273964	1			T3	11		T5	1268		T6	1792
valid_sources[0x0d]	276388	1			T1	6		T3	11		T5	861
valid_sources[0x0e]	294359	1			T1	30		T3	13		T5	1160
valid_sources[0x0f]	286042	1			T1	2		T3	26		T5	751
valid_sources[0x10]	269613	1			T3	12		T5	1437		T6	1785
valid_sources[0x11]	275937	1			T1	3		T3	6		T5	1086
valid_sources[0x12]	288759	1			T1	2		T3	13		T5	1114
valid_sources[0x13]	273401	1			T1	16		T3	25		T5	770
valid_sources[0x14]	281448	1			T1	8		T3	7		T5	816
valid_sources[0x15]	289839	1			T1	2		T3	3		T5	978
valid_sources[0x16]	661208	1			T1	2		T3	13		T5	1310
valid_sources[0x17]	284834	1			T3	27		T5	1390		T6	1802
valid_sources[0x18]	277207	1			T3	35		T5	904		T6	1865
valid_sources[0x19]	273703	1			T3	23		T5	1436		T6	1794
valid_sources[0x1a]	279491	1			T1	26		T3	11		T5	1425
valid_sources[0x1b]	270878	1			T3	4		T5	1058		T6	1786
valid_sources[0x1c]	282665	1			T1	24		T3	12		T5	964
valid_sources[0x1d]	302911	1			T3	15		T5	1042		T6	1877
valid_sources[0x1e]	275748	1			T1	15		T3	7		T5	895
valid_sources[0x1f]	267077	1			T1	21		T3	10		T5	1323
valid_sources[0x20]	292379	1			T1	9		T3	38		T5	887
valid_sources[0x21]	289525	1			T1	9		T3	9		T5	1011
valid_sources[0x22]	279126	1			T1	10		T3	30		T5	1173
valid_sources[0x23]	274259	1			T1	8		T3	27		T5	1155
valid_sources[0x24]	276164	1			T3	6		T5	561		T6	1851
valid_sources[0x25]	281977	1			T3	9		T5	841		T6	1783
valid_sources[0x26]	281459	1			T1	2		T3	21		T5	1117
valid_sources[0x27]	272088	1			T1	14		T3	9		T5	1340
valid_sources[0x28]	274505	1			T1	7		T3	15		T5	781
valid_sources[0x29]	273373	1			T1	6		T3	24		T5	779
valid_sources[0x2a]	280911	1			T1	10		T3	17		T5	504
valid_sources[0x2b]	593176	1			T1	13		T3	28		T5	1271
valid_sources[0x2c]	277735	1			T3	29		T5	893		T6	1763
valid_sources[0x2d]	277562	1			T1	9		T3	16		T5	851
valid_sources[0x2e]	530940	1			T1	3		T3	8		T5	739
valid_sources[0x2f]	816140	1			T3	8		T5	1316		T6	1700
valid_sources[0x30]	632550	1			T2	355400		T3	15		T5	1493
valid_sources[0x31]	292266	1			T3	23		T5	646		T6	1788
valid_sources[0x32]	286447	1			T3	23		T5	1307		T6	1781
valid_sources[0x33]	280243	1			T1	7		T3	16		T5	865
valid_sources[0x34]	503261	1			T1	14		T3	11		T5	840
valid_sources[0x35]	294362	1			T1	14		T3	27		T5	839
valid_sources[0x36]	297816	1			T1	16		T3	36		T5	1115
valid_sources[0x37]	274663	1			T1	14		T3	28		T5	1047
valid_sources[0x38]	1172541	1			T1	15		T3	28		T5	747
valid_sources[0x39]	312427	1			T5	878		T6	1829		T7	21
valid_sources[0x3a]	721712	1			T1	28		T3	12		T5	1172
valid_sources[0x3b]	293849	1			T3	8		T5	788		T6	1770
valid_sources[0x3c]	278078	1			T1	2		T3	35		T5	690
valid_sources[0x3d]	274824	1			T1	8		T3	17		T5	900
valid_sources[0x3e]	285470	1			T1	34		T3	13		T5	1009
valid_sources[0x3f]	282382	1			T1	7		T3	30		T5	1101
valid_sources[0x40]	288296	1			T1	9		T3	9		T5	1115
valid_sources[0x41]	666470	1			T1	15		T3	30		T5	1052
valid_sources[0x42]	675009	1			T1	29		T3	21		T5	807
valid_sources[0x43]	280078	1			T3	15		T5	1336		T6	1882
valid_sources[0x44]	672129	1			T1	8		T3	11		T5	748
valid_sources[0x45]	278102	1			T1	12		T3	13		T5	1065
valid_sources[0x46]	288157	1			T1	8		T3	13		T5	676
valid_sources[0x47]	326182	1			T1	29		T3	17		T5	948
valid_sources[0x48]	283678	1			T1	8		T3	11		T5	749
valid_sources[0x49]	272371	1			T1	5		T3	13		T5	680
valid_sources[0x4a]	298101	1			T1	20		T3	27		T5	1118
valid_sources[0x4b]	313308	1			T1	1		T3	42		T5	1342
valid_sources[0x4c]	291632	1			T3	11		T5	851		T6	1819
valid_sources[0x4d]	634362	1			T1	14		T3	6		T5	779
valid_sources[0x4e]	289794	1			T3	19		T5	1471		T6	1789
valid_sources[0x4f]	278334	1			T1	7		T3	9		T5	791
valid_sources[0x50]	274916	1			T3	16		T5	1315		T6	1873
valid_sources[0x51]	280320	1			T1	2		T3	22		T5	1078
valid_sources[0x52]	272055	1			T3	12		T5	875		T6	1754
valid_sources[0x53]	276912	1			T1	36		T3	28		T5	1161
valid_sources[0x54]	278624	1			T3	7		T5	1068		T6	1795
valid_sources[0x55]	745864	1			T1	1		T3	13		T5	907
valid_sources[0x56]	282186	1			T1	13		T3	9		T5	783
valid_sources[0x57]	744225	1			T3	17		T5	718		T6	1822
valid_sources[0x58]	282356	1			T1	19		T3	30		T5	924
valid_sources[0x59]	268797	1			T1	10		T3	43		T5	1074
valid_sources[0x5a]	283497	1			T1	7		T3	13		T5	1501
valid_sources[0x5b]	288615	1			T1	8		T3	19		T5	644
valid_sources[0x5c]	292068	1			T1	13		T3	13		T5	850
valid_sources[0x5d]	268369	1			T3	2		T5	1058		T6	1820
valid_sources[0x5e]	276837	1			T1	3		T3	18		T5	1009
valid_sources[0x5f]	272893	1			T1	7		T3	8		T5	770
valid_sources[0x60]	280217	1			T1	5		T3	13		T5	1234
valid_sources[0x61]	271920	1			T1	13		T3	28		T5	1156
valid_sources[0x62]	281866	1			T3	27		T5	823		T6	1857
valid_sources[0x63]	279928	1			T3	21		T5	532		T6	1820
valid_sources[0x64]	723471	1			T1	48		T3	9		T5	717
valid_sources[0x65]	606675	1			T3	29		T5	960		T6	1811
valid_sources[0x66]	274672	1			T1	11		T3	33		T5	857
valid_sources[0x67]	273142	1			T1	16		T3	10		T5	941
valid_sources[0x68]	272290	1			T1	7		T3	22		T5	1018
valid_sources[0x69]	285427	1			T1	4		T3	19		T5	801
valid_sources[0x6a]	651240	1			T1	3		T3	11		T5	1179
valid_sources[0x6b]	616719	1			T1	6		T3	15		T5	839
valid_sources[0x6c]	286363	1			T3	2		T5	917		T6	1760
valid_sources[0x6d]	277420	1			T1	2		T3	27		T5	939
valid_sources[0x6e]	273575	1			T1	1		T3	2		T5	624
valid_sources[0x6f]	274115	1			T1	26		T3	7		T5	1131
valid_sources[0x70]	269928	1			T3	4		T5	701		T6	1851
valid_sources[0x71]	670527	1			T1	23		T3	12		T5	723
valid_sources[0x72]	280648	1			T1	21		T3	22		T5	754
valid_sources[0x73]	276491	1			T1	10		T3	27		T5	1004
valid_sources[0x74]	270360	1			T1	12		T3	9		T5	1015
valid_sources[0x75]	326232	1			T1	1		T3	23		T5	777
valid_sources[0x76]	321696	1			T3	11		T5	1415		T6	1745
valid_sources[0x77]	282870	1			T3	29		T5	1033		T6	1698
valid_sources[0x78]	270455	1			T3	19		T5	971		T6	1743
valid_sources[0x79]	278518	1			T1	4		T3	19		T5	1112
valid_sources[0x7a]	271475	1			T3	16		T5	850		T6	1837
valid_sources[0x7b]	283679	1			T1	12		T3	28		T5	949
valid_sources[0x7c]	607693	1			T1	9		T3	22		T5	1440
valid_sources[0x7d]	505083	1			T1	11		T3	21		T5	1199
valid_sources[0x7e]	287220	1			T1	8		T3	27		T5	988
valid_sources[0x7f]	282757	1			T1	22		T3	7		T5	1029
valid_sources[0x80]	270130	1			T3	18		T5	875		T6	1785

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6891772

1

T1

146

T2

22502

T3

305

values[0x0]

all_enables

biggest_size

14529418

1

T1

322

T2

57608

T3

794

values[0x1]

all_enables

biggest_size

8477641

1

T1

158

T2

32416

T3

427