Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
94.92	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	3	41	93.18

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	3	41	93.18	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	164	1			T1	1		T19	1		T5	1
index[0x1]	158	1			T19	1		T17	1		T43	1
index[0x2]	138	1			T4	1		T5	1		T28	1
index[0x3]	145	1			T12	1		T26	3		T120	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	178	1			T42	1		T26	2		T23	1
lens_less_than_1000[1]	105	1			T1	1		T26	1		T43	1
lens_less_than_1000[2]	110	1			T31	2		T12	1		T17	1
lens_less_than_1000[3]	56	1			T17	1		T120	1		T23	2
lens_less_than_1000[4]	45	1			T5	1		T28	1		T23	2
lens_less_than_1000[5]	47	1			T19	1		T28	1		T45	1
lens_less_than_1000[6]	34	1			T48	1		T27	2		T270	8
lens_less_than_1000[7]	15	1			T19	1		T5	1		T37	2
lens_less_than_1000[8]	6	1			T4	1		T271	1		T119	1
lens_less_than_1000[9]	1	1			T272	1		-	-		-	-
len_2	8	1			T273	1		T104	1		T274	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	3	41	93.18	3

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0] , index[0x1] , index[0x2]]	[lens_less_than_1000[9]]	--	--	3

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	49	1			T42	1		T26	1		T23	1
index[0x0]	lens_less_than_1000[1]	26	1			T1	1		T64	1		T37	1
index[0x0]	lens_less_than_1000[2]	35	1			T31	2		T17	1		T28	1
index[0x0]	lens_less_than_1000[3]	6	1			T275	1		T118	2		T234	1
index[0x0]	lens_less_than_1000[4]	9	1			T62	1		T116	1		T82	1
index[0x0]	lens_less_than_1000[5]	17	1			T19	1		T28	1		T25	1
index[0x0]	lens_less_than_1000[6]	13	1			T270	8		T57	1		T118	1
index[0x0]	lens_less_than_1000[7]	3	1			T5	1		T276	2		-	-
index[0x0]	lens_less_than_1000[8]	1	1			T119	1		-	-		-	-
index[0x0]	len_2	5	1			T273	1		T104	1		T274	1
index[0x1]	lens_less_than_1000[0]	45	1			T45	1		T46	1		T48	1
index[0x1]	lens_less_than_1000[1]	33	1			T43	1		T48	1		T277	1
index[0x1]	lens_less_than_1000[2]	25	1			T37	1		T278	1		T108	1
index[0x1]	lens_less_than_1000[3]	20	1			T17	1		T23	1		T50	1
index[0x1]	lens_less_than_1000[4]	12	1			T82	2		T25	1		T279	1
index[0x1]	lens_less_than_1000[5]	11	1			T95	1		T238	1		T29	1
index[0x1]	lens_less_than_1000[6]	5	1			T27	2		T280	1		T249	1
index[0x1]	lens_less_than_1000[7]	5	1			T19	1		T37	1		T40	1
index[0x1]	lens_less_than_1000[8]	1	1			T257	1		-	-		-	-
index[0x1]	len_2	1	1			T281	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	37	1			T44	1		T69	1		T49	1
index[0x2]	lens_less_than_1000[1]	18	1			T29	1		T122	1		T58	2
index[0x2]	lens_less_than_1000[2]	23	1			T23	1		T49	3		T246	1
index[0x2]	lens_less_than_1000[3]	17	1			T69	1		T91	1		T27	1
index[0x2]	lens_less_than_1000[4]	10	1			T5	1		T28	1		T23	1
index[0x2]	lens_less_than_1000[5]	12	1			T282	1		T270	1		T58	1
index[0x2]	lens_less_than_1000[6]	13	1			T48	1		T283	1		T284	1
index[0x2]	lens_less_than_1000[7]	5	1			T37	1		T60	1		T285	1
index[0x2]	lens_less_than_1000[8]	2	1			T4	1		T286	1		-	-
index[0x2]	len_2	1	1			T252	1		-	-		-	-
index[0x3]	lens_less_than_1000[0]	47	1			T26	1		T48	1		T76	2
index[0x3]	lens_less_than_1000[1]	28	1			T26	1		T126	1		T287	1
index[0x3]	lens_less_than_1000[2]	27	1			T12	1		T26	1		T66	1
index[0x3]	lens_less_than_1000[3]	13	1			T120	1		T23	1		T116	1
index[0x3]	lens_less_than_1000[4]	14	1			T23	1		T40	1		T41	1
index[0x3]	lens_less_than_1000[5]	7	1			T45	1		T288	1		T289	1
index[0x3]	lens_less_than_1000[6]	3	1			T245	1		T290	2		-	-
index[0x3]	lens_less_than_1000[7]	2	1			T291	1		T119	1		-	-
index[0x3]	lens_less_than_1000[8]	2	1			T271	1		T292	1		-	-
index[0x3]	lens_less_than_1000[9]	1	1			T272	1		-	-		-	-
index[0x3]	len_2	1	1			T293	1		-	-		-	-