Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
89.83	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	6	38	86.36

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	6	38	86.36	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	183	1			T5	1		T6	1		T31	1
index[0x1]	157	1			T5	2		T6	2		T32	1
index[0x2]	152	1			T18	1		T4	1		T26	1
index[0x3]	150	1			T2	1		T7	1		T21	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	192	1			T2	1		T18	1		T7	1
lens_less_than_1000[1]	125	1			T32	1		T33	6		T27	1
lens_less_than_1000[2]	110	1			T33	1		T27	1		T110	1
lens_less_than_1000[3]	56	1			T27	1		T53	1		T54	1
lens_less_than_1000[4]	59	1			T6	2		T21	1		T32	3
lens_less_than_1000[5]	36	1			T6	1		T227	1		T53	1
lens_less_than_1000[6]	23	1			T31	1		T33	1		T55	1
lens_less_than_1000[7]	25	1			T33	1		T71	1		T228	1
lens_less_than_1000[8]	5	1			T34	1		T229	1		T81	1
lens_less_than_1000[9]	2	1			T230	1		T15	1		-	-
len_2	9	1			T121	4		T77	1		T120	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	6	38	86.36	6

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x1]]	[lens_less_than_1000[9] , len_2]	--	--	2
[index[0x2]]	[lens_less_than_1000[8] , lens_less_than_1000[9]]	--	--	2
[index[0x3]]	[lens_less_than_1000[8]]	0	1	1
[index[0x3]]	[len_2]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	43	1			T5	1		T33	4		T117	1
index[0x0]	lens_less_than_1000[1]	41	1			T33	4		T34	1		T52	1
index[0x0]	lens_less_than_1000[2]	25	1			T27	1		T53	1		T231	1
index[0x0]	lens_less_than_1000[3]	22	1			T53	1		T54	1		T232	1
index[0x0]	lens_less_than_1000[4]	21	1			T6	1		T56	1		T15	1
index[0x0]	lens_less_than_1000[5]	9	1			T188	1		T233	2		T13	1
index[0x0]	lens_less_than_1000[6]	6	1			T31	1		T234	1		T104	1
index[0x0]	lens_less_than_1000[7]	9	1			T86	6		T120	1		T235	1
index[0x0]	lens_less_than_1000[8]	3	1			T34	1		T229	1		T236	1
index[0x0]	lens_less_than_1000[9]	1	1			T15	1		-	-		-	-
index[0x0]	len_2	3	1			T77	1		T120	1		T237	1
index[0x1]	lens_less_than_1000[0]	40	1			T5	2		T49	1		T52	1
index[0x1]	lens_less_than_1000[1]	28	1			T27	1		T35	2		T49	1
index[0x1]	lens_less_than_1000[2]	36	1			T33	1		T110	1		T34	1
index[0x1]	lens_less_than_1000[3]	13	1			T27	1		T238	2		T239	1
index[0x1]	lens_less_than_1000[4]	9	1			T6	1		T32	1		T34	1
index[0x1]	lens_less_than_1000[5]	17	1			T6	1		T227	1		T240	1
index[0x1]	lens_less_than_1000[6]	7	1			T241	1		T61	1		T242	1
index[0x1]	lens_less_than_1000[7]	5	1			T71	1		T243	1		T105	1
index[0x1]	lens_less_than_1000[8]	2	1			T81	1		T244	1		-	-
index[0x2]	lens_less_than_1000[0]	51	1			T18	1		T4	1		T26	1
index[0x2]	lens_less_than_1000[1]	26	1			T32	1		T33	2		T53	1
index[0x2]	lens_less_than_1000[2]	28	1			T64	1		T65	1		T52	1
index[0x2]	lens_less_than_1000[3]	14	1			T245	1		T246	1		T247	1
index[0x2]	lens_less_than_1000[4]	14	1			T117	1		T53	2		T55	1
index[0x2]	lens_less_than_1000[5]	5	1			T53	1		T248	1		T249	1
index[0x2]	lens_less_than_1000[6]	5	1			T55	1		T250	1		T251	1
index[0x2]	lens_less_than_1000[7]	3	1			T33	1		T252	1		T253	1
index[0x2]	len_2	6	1			T121	4		T254	1		T255	1
index[0x3]	lens_less_than_1000[0]	58	1			T2	1		T7	1		T25	1
index[0x3]	lens_less_than_1000[1]	30	1			T35	2		T43	1		T77	1
index[0x3]	lens_less_than_1000[2]	21	1			T34	1		T53	1		T256	1
index[0x3]	lens_less_than_1000[3]	7	1			T83	1		T257	1		T258	1
index[0x3]	lens_less_than_1000[4]	15	1			T21	1		T32	2		T59	1
index[0x3]	lens_less_than_1000[5]	5	1			T59	1		T259	1		T244	1
index[0x3]	lens_less_than_1000[6]	5	1			T33	1		T260	1		T261	1
index[0x3]	lens_less_than_1000[7]	8	1			T228	1		T55	1		T262	1
index[0x3]	lens_less_than_1000[9]	1	1			T230	1		-	-		-	-