Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	62070268	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

30134658

1

T1

2971

T2

70308

T3

89613

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14002206	1			T1	1097		T2	28513		T3	35138
values[0x0]	38076691	1			T1	4112		T2	97499		T3	124207
values[0x1]	40126029	1			T1	4040		T2	97011		T3	123977

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	52934133	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

39270793

1

T1

3733

T2

88700

T3

113255

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	311629	1			T1	32		T2	460		T3	1049
valid_sources[0x01]	305129	1			T1	44		T2	788		T3	1029
valid_sources[0x02]	294163	1			T1	38		T2	1108		T3	1096
valid_sources[0x03]	306237	1			T1	31		T2	1081		T3	1150
valid_sources[0x04]	293509	1			T1	49		T2	1338		T3	1362
valid_sources[0x05]	302898	1			T1	31		T2	1809		T3	977
valid_sources[0x06]	298919	1			T1	34		T2	445		T3	976
valid_sources[0x07]	291660	1			T1	31		T2	502		T3	987
valid_sources[0x08]	296582	1			T1	38		T2	522		T3	1051
valid_sources[0x09]	292500	1			T1	42		T2	877		T3	1119
valid_sources[0x0a]	307727	1			T1	43		T2	739		T3	1259
valid_sources[0x0b]	302847	1			T1	30		T2	797		T3	1122
valid_sources[0x0c]	289921	1			T1	31		T2	676		T3	1258
valid_sources[0x0d]	313967	1			T1	33		T2	761		T3	1037
valid_sources[0x0e]	372176	1			T1	38		T2	1287		T3	870
valid_sources[0x0f]	294875	1			T1	33		T2	625		T3	967
valid_sources[0x10]	307185	1			T1	38		T2	670		T3	1172
valid_sources[0x11]	292687	1			T1	49		T2	715		T3	1058
valid_sources[0x12]	296333	1			T1	35		T2	1178		T3	1176
valid_sources[0x13]	311145	1			T1	46		T2	1030		T3	975
valid_sources[0x14]	296343	1			T1	40		T2	639		T3	1103
valid_sources[0x15]	527842	1			T1	33		T2	454		T3	1049
valid_sources[0x16]	294839	1			T1	37		T2	572		T3	1195
valid_sources[0x17]	298749	1			T1	33		T2	1354		T3	1233
valid_sources[0x18]	300223	1			T1	33		T2	722		T3	984
valid_sources[0x19]	323203	1			T1	36		T2	1339		T3	1022
valid_sources[0x1a]	705228	1			T1	35		T2	322		T3	1060
valid_sources[0x1b]	301132	1			T1	51		T2	466		T3	970
valid_sources[0x1c]	294396	1			T1	24		T2	1024		T3	1059
valid_sources[0x1d]	297601	1			T1	44		T2	1430		T3	1019
valid_sources[0x1e]	728425	1			T1	46		T2	1308		T3	1019
valid_sources[0x1f]	299894	1			T1	35		T2	486		T3	1137
valid_sources[0x20]	310402	1			T1	22		T2	768		T3	1103
valid_sources[0x21]	306965	1			T1	41		T2	476		T3	1060
valid_sources[0x22]	302188	1			T1	37		T2	971		T3	1147
valid_sources[0x23]	577778	1			T1	36		T2	935		T3	1114
valid_sources[0x24]	301639	1			T1	30		T2	988		T3	1194
valid_sources[0x25]	291664	1			T1	34		T2	596		T3	1227
valid_sources[0x26]	294093	1			T1	36		T2	765		T3	1186
valid_sources[0x27]	295028	1			T1	45		T2	1009		T3	1042
valid_sources[0x28]	598544	1			T1	33		T2	932		T3	1164
valid_sources[0x29]	304464	1			T1	40		T2	690		T3	1133
valid_sources[0x2a]	292158	1			T1	27		T2	638		T3	1093
valid_sources[0x2b]	609085	1			T1	29		T2	579		T3	1094
valid_sources[0x2c]	569384	1			T1	38		T2	750		T3	1150
valid_sources[0x2d]	298211	1			T1	29		T2	281		T3	1130
valid_sources[0x2e]	300422	1			T1	40		T2	410		T3	1179
valid_sources[0x2f]	636753	1			T1	33		T2	995		T3	1169
valid_sources[0x30]	295237	1			T1	33		T2	891		T3	1199
valid_sources[0x31]	290403	1			T1	39		T2	1446		T3	1162
valid_sources[0x32]	294512	1			T1	41		T2	931		T3	920
valid_sources[0x33]	711701	1			T1	44		T2	989		T3	1231
valid_sources[0x34]	295691	1			T1	29		T2	796		T3	1061
valid_sources[0x35]	307542	1			T1	24		T2	1675		T3	1139
valid_sources[0x36]	305698	1			T1	33		T2	534		T3	1132
valid_sources[0x37]	512695	1			T1	47		T2	553		T3	1098
valid_sources[0x38]	532134	1			T1	36		T2	871		T3	1247
valid_sources[0x39]	291152	1			T1	50		T2	612		T3	1087
valid_sources[0x3a]	539846	1			T1	37		T2	1198		T3	1184
valid_sources[0x3b]	756230	1			T1	29		T2	809		T3	1173
valid_sources[0x3c]	298223	1			T1	37		T2	1178		T3	1115
valid_sources[0x3d]	302527	1			T1	37		T2	1519		T3	1173
valid_sources[0x3e]	300699	1			T1	30		T2	1177		T3	1084
valid_sources[0x3f]	293749	1			T1	36		T2	781		T3	1059
valid_sources[0x40]	298542	1			T1	39		T2	857		T3	997
valid_sources[0x41]	302401	1			T1	37		T2	887		T3	1013
valid_sources[0x42]	292849	1			T1	37		T2	610		T3	1081
valid_sources[0x43]	344674	1			T1	32		T2	926		T3	1116
valid_sources[0x44]	770183	1			T1	35		T2	1186		T3	1106
valid_sources[0x45]	303596	1			T1	43		T2	1192		T3	1117
valid_sources[0x46]	445876	1			T1	32		T2	721		T3	1053
valid_sources[0x47]	304460	1			T1	34		T2	946		T3	1107
valid_sources[0x48]	673730	1			T1	41		T2	618		T3	999
valid_sources[0x49]	301373	1			T1	25		T2	916		T3	1044
valid_sources[0x4a]	295731	1			T1	35		T2	1375		T3	1151
valid_sources[0x4b]	292884	1			T1	43		T2	942		T3	962
valid_sources[0x4c]	518414	1			T1	37		T2	736		T3	1232
valid_sources[0x4d]	300946	1			T1	38		T2	849		T3	1147
valid_sources[0x4e]	295709	1			T1	36		T2	472		T3	1340
valid_sources[0x4f]	306101	1			T1	33		T2	1038		T3	952
valid_sources[0x50]	553544	1			T1	34		T2	607		T3	1194
valid_sources[0x51]	676093	1			T1	38		T2	936		T3	1172
valid_sources[0x52]	297229	1			T1	27		T2	1639		T3	1034
valid_sources[0x53]	556286	1			T1	33		T2	919		T3	1164
valid_sources[0x54]	296317	1			T1	38		T2	600		T3	1286
valid_sources[0x55]	562088	1			T1	32		T2	806		T3	971
valid_sources[0x56]	303368	1			T1	34		T2	848		T3	1060
valid_sources[0x57]	955057	1			T1	43		T2	1384		T3	1015
valid_sources[0x58]	968069	1			T1	44		T2	1064		T3	1036
valid_sources[0x59]	288986	1			T1	31		T2	888		T3	1193
valid_sources[0x5a]	297446	1			T1	43		T2	1397		T3	1160
valid_sources[0x5b]	492433	1			T1	36		T2	881		T3	1065
valid_sources[0x5c]	294027	1			T1	30		T2	653		T3	1055
valid_sources[0x5d]	294741	1			T1	29		T2	604		T3	1044
valid_sources[0x5e]	306456	1			T1	43		T2	890		T3	1112
valid_sources[0x5f]	320991	1			T1	28		T2	1366		T3	1230
valid_sources[0x60]	302497	1			T1	33		T2	1208		T3	879
valid_sources[0x61]	301584	1			T1	56		T2	502		T3	1206
valid_sources[0x62]	296023	1			T1	37		T2	1120		T3	1093
valid_sources[0x63]	293425	1			T1	42		T2	1314		T3	1218
valid_sources[0x64]	374639	1			T1	35		T2	424		T3	1187
valid_sources[0x65]	295191	1			T1	43		T2	974		T3	1409
valid_sources[0x66]	295611	1			T1	30		T2	434		T3	1133
valid_sources[0x67]	308874	1			T1	36		T2	1069		T3	1268
valid_sources[0x68]	297496	1			T1	47		T2	962		T3	1133
valid_sources[0x69]	289918	1			T1	46		T2	600		T3	1139
valid_sources[0x6a]	299382	1			T1	42		T2	231		T3	1100
valid_sources[0x6b]	290506	1			T1	32		T2	962		T3	1116
valid_sources[0x6c]	307656	1			T1	37		T2	990		T3	1165
valid_sources[0x6d]	303916	1			T1	38		T2	1061		T3	1249
valid_sources[0x6e]	297548	1			T1	46		T2	1037		T3	1121
valid_sources[0x6f]	288867	1			T1	23		T2	504		T3	1056
valid_sources[0x70]	294423	1			T1	39		T2	1063		T3	1113
valid_sources[0x71]	300587	1			T1	34		T2	1032		T3	1064
valid_sources[0x72]	298151	1			T1	39		T2	936		T3	967
valid_sources[0x73]	332378	1			T1	42		T2	1085		T3	1073
valid_sources[0x74]	292812	1			T1	36		T2	728		T3	1143
valid_sources[0x75]	303433	1			T1	35		T2	612		T3	1242
valid_sources[0x76]	351468	1			T1	34		T2	912		T3	1147
valid_sources[0x77]	296147	1			T1	41		T2	676		T3	989
valid_sources[0x78]	306804	1			T1	41		T2	541		T3	1072
valid_sources[0x79]	359285	1			T1	35		T2	1210		T3	933
valid_sources[0x7a]	296061	1			T1	42		T2	409		T3	1011
valid_sources[0x7b]	306895	1			T1	38		T2	616		T3	1123
valid_sources[0x7c]	294706	1			T1	45		T2	1243		T3	1222
valid_sources[0x7d]	298101	1			T1	36		T2	795		T3	1107
valid_sources[0x7e]	311932	1			T1	29		T2	670		T3	1024
valid_sources[0x7f]	330110	1			T1	39		T2	1075		T3	1066
valid_sources[0x80]	289597	1			T1	37		T2	1196		T3	941

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6969772

1

T1

549

T2

14325

T3

17487

values[0x0]

all_enables

biggest_size

14608452

1

T1

1558

T2

35896

T3

46193

values[0x1]

all_enables

biggest_size

8556434

1

T1

864

T2

20087

T3

25933