Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	61762689	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

29971247

1

T1

625

T2

474

T3

3027

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14094863	1			T1	233		T2	171		T3	1154
values[0x0]	37864217	1			T1	862		T2	635		T3	4090
values[0x1]	39774856	1			T1	842		T2	669		T3	4056

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	52735412	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

38998524

1

T1

775

T2

612

T3

3773

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	294480	1			T1	7		T2	7		T4	889
valid_sources[0x01]	506252	1			T2	4		T4	884		T5	1314
valid_sources[0x02]	285482	1			T1	5		T2	3		T4	873
valid_sources[0x03]	287224	1			T1	29		T2	6		T4	899
valid_sources[0x04]	293906	1			T2	5		T4	844		T5	1308
valid_sources[0x05]	297796	1			T1	41		T2	3		T4	928
valid_sources[0x06]	290834	1			T1	18		T2	7		T4	930
valid_sources[0x07]	290197	1			T1	16		T2	9		T4	918
valid_sources[0x08]	299456	1			T2	6		T4	962		T5	1345
valid_sources[0x09]	688120	1			T2	7		T4	972		T5	1421
valid_sources[0x0a]	286290	1			T2	7		T4	948		T5	1203
valid_sources[0x0b]	293461	1			T1	20		T2	5		T4	839
valid_sources[0x0c]	294050	1			T2	5		T4	930		T5	1303
valid_sources[0x0d]	292128	1			T2	8		T4	919		T5	1202
valid_sources[0x0e]	287955	1			T1	2		T2	7		T4	923
valid_sources[0x0f]	289784	1			T1	12		T2	3		T4	969
valid_sources[0x10]	842765	1			T2	4		T4	878		T5	1312
valid_sources[0x11]	319007	1			T2	8		T4	898		T5	1386
valid_sources[0x12]	286866	1			T2	6		T4	820		T5	1249
valid_sources[0x13]	312196	1			T2	2		T4	856		T5	1273
valid_sources[0x14]	541138	1			T1	19		T2	9		T4	794
valid_sources[0x15]	285057	1			T2	4		T4	820		T5	1324
valid_sources[0x16]	603535	1			T2	8		T4	888		T5	1467
valid_sources[0x17]	288697	1			T1	27		T2	5		T4	978
valid_sources[0x18]	285989	1			T2	5		T4	1030		T5	1425
valid_sources[0x19]	324897	1			T1	13		T2	7		T4	980
valid_sources[0x1a]	293123	1			T1	47		T2	8		T4	921
valid_sources[0x1b]	297478	1			T1	36		T2	9		T4	868
valid_sources[0x1c]	296017	1			T1	24		T2	4		T4	944
valid_sources[0x1d]	286073	1			T1	6		T2	5		T4	937
valid_sources[0x1e]	728844	1			T2	5		T4	788		T5	1235
valid_sources[0x1f]	297694	1			T1	23		T2	7		T4	912
valid_sources[0x20]	296197	1			T2	7		T4	996		T5	1305
valid_sources[0x21]	302095	1			T1	60		T2	5		T4	925
valid_sources[0x22]	287642	1			T2	8		T4	938		T5	1317
valid_sources[0x23]	289822	1			T2	6		T4	933		T5	1459
valid_sources[0x24]	292929	1			T2	7		T4	1025		T5	1433
valid_sources[0x25]	290194	1			T1	10		T2	2		T4	879
valid_sources[0x26]	295159	1			T1	19		T2	7		T4	769
valid_sources[0x27]	288885	1			T2	7		T4	956		T5	1327
valid_sources[0x28]	299466	1			T1	3		T2	8		T4	924
valid_sources[0x29]	285342	1			T2	4		T4	1028		T5	1348
valid_sources[0x2a]	313203	1			T2	4		T4	899		T5	1275
valid_sources[0x2b]	288637	1			T1	5		T2	6		T4	913
valid_sources[0x2c]	636332	1			T1	4		T2	4		T4	948
valid_sources[0x2d]	287311	1			T1	6		T2	6		T4	935
valid_sources[0x2e]	293204	1			T1	9		T2	8		T4	918
valid_sources[0x2f]	519275	1			T2	6		T4	925		T5	1316
valid_sources[0x30]	287876	1			T2	5		T4	928		T5	1273
valid_sources[0x31]	291319	1			T2	2		T4	814		T5	1375
valid_sources[0x32]	290516	1			T2	6		T4	903		T5	1497
valid_sources[0x33]	291330	1			T2	2		T4	954		T5	1345
valid_sources[0x34]	305513	1			T2	8		T4	1020		T5	1230
valid_sources[0x35]	294171	1			T2	3		T4	823		T5	1291
valid_sources[0x36]	317524	1			T1	20		T2	3		T4	929
valid_sources[0x37]	289475	1			T2	7		T4	891		T5	1285
valid_sources[0x38]	298079	1			T2	3		T4	1023		T5	1506
valid_sources[0x39]	289374	1			T1	35		T2	6		T4	938
valid_sources[0x3a]	288613	1			T2	6		T4	1000		T5	1400
valid_sources[0x3b]	290075	1			T2	3		T4	797		T5	1298
valid_sources[0x3c]	283510	1			T2	7		T4	932		T5	1411
valid_sources[0x3d]	294740	1			T2	9		T4	977		T5	1372
valid_sources[0x3e]	295755	1			T2	4		T4	892		T5	1149
valid_sources[0x3f]	297671	1			T2	2		T4	885		T5	1272
valid_sources[0x40]	296958	1			T1	43		T2	5		T4	921
valid_sources[0x41]	303315	1			T2	4		T4	873		T5	1352
valid_sources[0x42]	420236	1			T2	6		T4	864		T5	1461
valid_sources[0x43]	290707	1			T1	15		T2	6		T4	919
valid_sources[0x44]	302788	1			T1	7		T2	2		T4	959
valid_sources[0x45]	291844	1			T2	8		T4	1003		T5	1236
valid_sources[0x46]	575089	1			T2	4		T4	950		T5	1394
valid_sources[0x47]	296734	1			T2	4		T4	812		T5	1406
valid_sources[0x48]	1334024	1			T2	4		T4	807		T5	1308
valid_sources[0x49]	291487	1			T2	3		T4	867		T5	1347
valid_sources[0x4a]	712893	1			T2	7		T4	1010		T5	1226
valid_sources[0x4b]	284531	1			T1	22		T2	12		T4	907
valid_sources[0x4c]	669320	1			T2	5		T4	1040		T5	1239
valid_sources[0x4d]	297537	1			T2	6		T4	834		T5	1295
valid_sources[0x4e]	291616	1			T2	5		T4	945		T5	1371
valid_sources[0x4f]	303483	1			T2	13		T4	906		T5	1441
valid_sources[0x50]	287540	1			T2	2		T4	909		T5	1378
valid_sources[0x51]	300425	1			T2	6		T4	950		T5	1286
valid_sources[0x52]	296738	1			T1	13		T2	4		T4	900
valid_sources[0x53]	296621	1			T2	7		T4	857		T5	1344
valid_sources[0x54]	295550	1			T2	1		T4	917		T5	1446
valid_sources[0x55]	293797	1			T2	7		T4	870		T5	1360
valid_sources[0x56]	288717	1			T1	46		T2	6		T4	925
valid_sources[0x57]	283173	1			T2	11		T4	958		T5	1360
valid_sources[0x58]	299175	1			T2	6		T4	1144		T5	1327
valid_sources[0x59]	301572	1			T2	6		T4	887		T5	1342
valid_sources[0x5a]	281429	1			T1	7		T2	6		T4	869
valid_sources[0x5b]	286135	1			T2	8		T4	957		T5	1311
valid_sources[0x5c]	692285	1			T2	2		T4	822		T5	1297
valid_sources[0x5d]	777859	1			T2	7		T4	964		T5	1297
valid_sources[0x5e]	569561	1			T1	7		T2	5		T4	859
valid_sources[0x5f]	289588	1			T1	6		T2	3		T4	869
valid_sources[0x60]	317712	1			T2	7		T4	842		T5	1467
valid_sources[0x61]	764909	1			T2	13		T4	945		T5	1301
valid_sources[0x62]	823143	1			T1	11		T2	2		T4	967
valid_sources[0x63]	295878	1			T2	5		T4	957		T5	1386
valid_sources[0x64]	286908	1			T1	22		T2	9		T4	936
valid_sources[0x65]	293785	1			T2	6		T4	955		T5	1340
valid_sources[0x66]	579878	1			T1	14		T2	7		T4	914
valid_sources[0x67]	300364	1			T2	6		T4	877		T5	1378
valid_sources[0x68]	693840	1			T2	5		T4	1006		T5	1257
valid_sources[0x69]	312863	1			T1	20		T2	8		T4	940
valid_sources[0x6a]	293299	1			T1	23		T2	3		T4	947
valid_sources[0x6b]	299326	1			T2	5		T4	871		T5	1308
valid_sources[0x6c]	303672	1			T1	14		T2	4		T4	956
valid_sources[0x6d]	554567	1			T2	8		T4	962		T5	1332
valid_sources[0x6e]	288011	1			T1	7		T2	1		T4	1002
valid_sources[0x6f]	297313	1			T2	9		T4	1020		T5	1297
valid_sources[0x70]	629859	1			T1	17		T2	2		T4	963
valid_sources[0x71]	286973	1			T2	6		T4	974		T5	1219
valid_sources[0x72]	286546	1			T2	6		T4	843		T5	1391
valid_sources[0x73]	292912	1			T1	2		T2	5		T4	913
valid_sources[0x74]	296969	1			T2	7		T4	886		T5	1344
valid_sources[0x75]	295405	1			T1	25		T2	8		T4	985
valid_sources[0x76]	295497	1			T2	2		T4	866		T5	1320
valid_sources[0x77]	291929	1			T1	25		T2	6		T4	949
valid_sources[0x78]	299035	1			T2	6		T4	959		T5	1401
valid_sources[0x79]	287385	1			T1	56		T2	4		T4	878
valid_sources[0x7a]	299820	1			T1	31		T2	6		T4	934
valid_sources[0x7b]	295547	1			T2	4		T4	933		T5	1339
valid_sources[0x7c]	290364	1			T2	5		T4	953		T5	1333
valid_sources[0x7d]	294048	1			T1	21		T2	6		T4	952
valid_sources[0x7e]	297468	1			T2	5		T4	892		T5	1331
valid_sources[0x7f]	292472	1			T2	7		T4	838		T5	1306
valid_sources[0x80]	291140	1			T2	4		T4	886		T5	1321

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6993309

1

T1

108

T2

85

T3

584

values[0x0]

all_enables

biggest_size

14498255

1

T1

324

T2

227

T3

1587

values[0x1]

all_enables

biggest_size

8479683

1

T1

193

T2

162

T3

856