Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
91.53	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	5	39	88.64

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	5	39	88.64	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	145	1			T3	1		T4	2		T12	1
index[0x1]	177	1			T1	1		T4	1		T20	1
index[0x2]	174	1			T4	2		T42	1		T43	1
index[0x3]	168	1			T3	1		T4	2		T45	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	214	1			T4	2		T20	1		T45	1
lens_less_than_1000[1]	122	1			T3	1		T4	1		T5	1
lens_less_than_1000[2]	94	1			T4	2		T42	1		T63	1
lens_less_than_1000[3]	77	1			T1	1		T3	1		T12	1
lens_less_than_1000[4]	45	1			T4	1		T45	1		T64	1
lens_less_than_1000[5]	42	1			T16	1		T29	1		T47	1
lens_less_than_1000[6]	26	1			T71	1		T51	1		T52	2
lens_less_than_1000[7]	22	1			T4	1		T29	1		T37	1
lens_less_than_1000[8]	11	1			T37	1		T47	1		T101	1
lens_less_than_1000[9]	7	1			T31	2		T253	1		T27	1
len_2	4	1			T110	1		T254	1		T255	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	5	39	88.64	5

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0]]	[lens_less_than_1000[7]]	0	1	1
[index[0x1]]	[len_2]	0	1	1
[index[0x3]]	[lens_less_than_1000[8] , lens_less_than_1000[9] , len_2]	--	--	3

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	41	1			T4	1		T6	1		T32	1
index[0x0]	lens_less_than_1000[1]	34	1			T3	1		T31	1		T256	1
index[0x0]	lens_less_than_1000[2]	20	1			T257	1		T258	1		T92	1
index[0x0]	lens_less_than_1000[3]	18	1			T12	1		T43	1		T84	1
index[0x0]	lens_less_than_1000[4]	10	1			T4	1		T73	1		T259	1
index[0x0]	lens_less_than_1000[5]	7	1			T250	1		T118	1		T260	1
index[0x0]	lens_less_than_1000[6]	4	1			T261	1		T262	1		T22	1
index[0x0]	lens_less_than_1000[8]	7	1			T47	1		T101	1		T120	1
index[0x0]	lens_less_than_1000[9]	2	1			T31	1		T27	1		-	-
index[0x0]	len_2	2	1			T110	1		T254	1		-	-
index[0x1]	lens_less_than_1000[0]	68	1			T4	1		T20	1		T45	1
index[0x1]	lens_less_than_1000[1]	26	1			T74	1		T122	1		T245	1
index[0x1]	lens_less_than_1000[2]	25	1			T125	2		T263	1		T101	1
index[0x1]	lens_less_than_1000[3]	24	1			T1	1		T16	1		T35	1
index[0x1]	lens_less_than_1000[4]	11	1			T37	1		T79	1		T115	1
index[0x1]	lens_less_than_1000[5]	5	1			T120	1		T264	1		T265	1
index[0x1]	lens_less_than_1000[6]	8	1			T71	1		T52	2		T266	1
index[0x1]	lens_less_than_1000[7]	6	1			T29	1		T110	1		T267	1
index[0x1]	lens_less_than_1000[8]	3	1			T37	1		T268	1		T269	1
index[0x1]	lens_less_than_1000[9]	1	1			T270	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	42	1			T23	1		T37	1		T31	1
index[0x2]	lens_less_than_1000[1]	35	1			T4	1		T43	1		T25	1
index[0x2]	lens_less_than_1000[2]	30	1			T42	1		T29	1		T78	4
index[0x2]	lens_less_than_1000[3]	19	1			T44	1		T16	2		T271	1
index[0x2]	lens_less_than_1000[4]	17	1			T95	1		T267	1		T253	1
index[0x2]	lens_less_than_1000[5]	16	1			T29	1		T47	1		T84	1
index[0x2]	lens_less_than_1000[6]	5	1			T51	1		T263	1		T93	1
index[0x2]	lens_less_than_1000[7]	3	1			T4	1		T37	1		T272	1
index[0x2]	lens_less_than_1000[8]	1	1			T21	1		-	-		-	-
index[0x2]	lens_less_than_1000[9]	4	1			T31	1		T253	1		T119	1
index[0x2]	len_2	2	1			T255	1		T273	1		-	-
index[0x3]	lens_less_than_1000[0]	63	1			T46	1		T31	1		T242	1
index[0x3]	lens_less_than_1000[1]	27	1			T5	1		T62	1		T25	1
index[0x3]	lens_less_than_1000[2]	19	1			T4	2		T63	1		T31	1
index[0x3]	lens_less_than_1000[3]	16	1			T3	1		T77	1		T53	1
index[0x3]	lens_less_than_1000[4]	7	1			T45	1		T64	1		T37	1
index[0x3]	lens_less_than_1000[5]	14	1			T16	1		T123	1		T117	1
index[0x3]	lens_less_than_1000[6]	9	1			T274	1		T275	1		T276	2
index[0x3]	lens_less_than_1000[7]	13	1			T31	6		T77	1		T113	1