Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64942303	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

31608427

1

T1

2191

T2

2555

T3

1974

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14507646	1			T1	861		T2	1418		T3	1215
values[0x0]	39869548	1			T1	3059		T2	3190		T3	2339
values[0x1]	42173536	1			T1	2979		T2	3210		T3	2355

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	55305258	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

41245472

1

T1

2772

T2

3240

T3

2489

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	285932	1			T1	35		T2	25		T3	16
valid_sources[0x01]	287899	1			T1	33		T2	20		T3	29
valid_sources[0x02]	283724	1			T1	29		T2	18		T3	30
valid_sources[0x03]	290920	1			T1	23		T2	41		T3	29
valid_sources[0x04]	331846	1			T1	33		T2	21		T3	23
valid_sources[0x05]	506883	1			T1	33		T2	42		T3	20
valid_sources[0x06]	284675	1			T1	27		T2	31		T3	24
valid_sources[0x07]	287768	1			T1	15		T2	47		T3	20
valid_sources[0x08]	285780	1			T1	35		T2	21		T3	21
valid_sources[0x09]	284155	1			T1	32		T2	33		T3	14
valid_sources[0x0a]	611613	1			T1	13		T2	26		T3	13
valid_sources[0x0b]	290889	1			T1	34		T2	46		T3	20
valid_sources[0x0c]	716675	1			T1	18		T2	35		T3	29
valid_sources[0x0d]	442275	1			T1	27		T2	28		T3	14
valid_sources[0x0e]	292381	1			T1	29		T2	21		T3	34
valid_sources[0x0f]	290113	1			T1	31		T2	19		T3	20
valid_sources[0x10]	284074	1			T1	38		T2	29		T3	42
valid_sources[0x11]	297102	1			T1	20		T2	33		T3	26
valid_sources[0x12]	279042	1			T1	35		T2	47		T3	14
valid_sources[0x13]	689887	1			T1	30		T2	54		T3	30
valid_sources[0x14]	567109	1			T1	21		T2	39		T3	22
valid_sources[0x15]	284851	1			T1	21		T2	29		T3	20
valid_sources[0x16]	307782	1			T1	36		T2	19		T3	20
valid_sources[0x17]	691007	1			T1	29		T2	29		T3	43
valid_sources[0x18]	287761	1			T1	25		T2	11		T3	39
valid_sources[0x19]	656436	1			T1	26		T2	28		T3	20
valid_sources[0x1a]	287088	1			T1	41		T2	16		T3	23
valid_sources[0x1b]	286670	1			T1	25		T2	19		T3	13
valid_sources[0x1c]	305570	1			T1	22		T2	59		T3	16
valid_sources[0x1d]	292341	1			T1	26		T2	21		T3	37
valid_sources[0x1e]	287613	1			T1	24		T2	12		T3	14
valid_sources[0x1f]	624880	1			T1	31		T2	25		T3	30
valid_sources[0x20]	779164	1			T1	28		T2	29		T3	30
valid_sources[0x21]	284964	1			T1	34		T2	24		T3	19
valid_sources[0x22]	282192	1			T1	19		T2	20		T3	23
valid_sources[0x23]	285675	1			T1	30		T2	18		T3	18
valid_sources[0x24]	285088	1			T1	28		T2	31		T3	20
valid_sources[0x25]	289909	1			T1	30		T2	36		T3	10
valid_sources[0x26]	286731	1			T1	34		T2	27		T3	12
valid_sources[0x27]	290815	1			T1	25		T2	40		T3	14
valid_sources[0x28]	282610	1			T1	16		T2	12		T3	16
valid_sources[0x29]	284833	1			T1	31		T2	29		T3	30
valid_sources[0x2a]	767427	1			T1	24		T2	45		T3	30
valid_sources[0x2b]	280407	1			T1	30		T2	20		T3	15
valid_sources[0x2c]	315183	1			T1	29		T2	29		T3	29
valid_sources[0x2d]	324574	1			T1	22		T2	43		T3	25
valid_sources[0x2e]	288771	1			T1	26		T2	23		T3	20
valid_sources[0x2f]	290191	1			T1	31		T2	22		T3	21
valid_sources[0x30]	282680	1			T1	22		T2	20		T3	21
valid_sources[0x31]	282635	1			T1	30		T2	28		T3	11
valid_sources[0x32]	295038	1			T1	16		T2	22		T3	19
valid_sources[0x33]	292667	1			T1	22		T2	35		T3	31
valid_sources[0x34]	1005917	1			T1	22		T2	26		T3	21
valid_sources[0x35]	730122	1			T1	28		T2	36		T3	22
valid_sources[0x36]	285745	1			T1	23		T2	65		T3	30
valid_sources[0x37]	280836	1			T1	35		T2	33		T3	26
valid_sources[0x38]	583523	1			T1	17		T2	16		T3	19
valid_sources[0x39]	283926	1			T1	21		T2	20		T3	21
valid_sources[0x3a]	292554	1			T1	31		T2	30		T3	23
valid_sources[0x3b]	297238	1			T1	33		T2	46		T3	24
valid_sources[0x3c]	604626	1			T1	26		T2	23		T3	22
valid_sources[0x3d]	281283	1			T1	27		T2	11		T3	29
valid_sources[0x3e]	525757	1			T1	23		T2	80		T3	11
valid_sources[0x3f]	281272	1			T1	32		T2	36		T3	31
valid_sources[0x40]	300528	1			T1	27		T2	56		T3	17
valid_sources[0x41]	512369	1			T1	31		T2	20		T3	22
valid_sources[0x42]	288835	1			T1	29		T2	59		T3	26
valid_sources[0x43]	283531	1			T1	19		T2	30		T3	25
valid_sources[0x44]	303861	1			T1	27		T2	21		T3	20
valid_sources[0x45]	282046	1			T1	34		T2	33		T3	21
valid_sources[0x46]	747213	1			T1	32		T2	29		T3	18
valid_sources[0x47]	282946	1			T1	33		T2	29		T3	25
valid_sources[0x48]	311325	1			T1	27		T2	50		T3	24
valid_sources[0x49]	277296	1			T1	36		T2	29		T3	29
valid_sources[0x4a]	289571	1			T1	19		T2	18		T3	22
valid_sources[0x4b]	287817	1			T1	33		T2	20		T3	19
valid_sources[0x4c]	287958	1			T1	25		T2	26		T3	12
valid_sources[0x4d]	280569	1			T1	18		T2	26		T3	22
valid_sources[0x4e]	282806	1			T1	27		T2	16		T3	27
valid_sources[0x4f]	627881	1			T1	23		T2	66		T3	12
valid_sources[0x50]	287905	1			T1	24		T2	28		T3	27
valid_sources[0x51]	310484	1			T1	33		T2	18		T3	17
valid_sources[0x52]	282779	1			T1	36		T2	44		T3	23
valid_sources[0x53]	287075	1			T1	25		T2	51		T3	19
valid_sources[0x54]	289684	1			T1	27		T2	19		T3	19
valid_sources[0x55]	286480	1			T1	30		T2	28		T3	18
valid_sources[0x56]	483333	1			T1	43		T2	48		T3	19
valid_sources[0x57]	279140	1			T1	18		T2	59		T3	25
valid_sources[0x58]	285645	1			T1	26		T2	16		T3	11
valid_sources[0x59]	676517	1			T1	32		T2	39		T3	21
valid_sources[0x5a]	285941	1			T1	28		T2	41		T3	39
valid_sources[0x5b]	285997	1			T1	35		T2	24		T3	34
valid_sources[0x5c]	298300	1			T1	24		T2	21		T3	17
valid_sources[0x5d]	298171	1			T1	30		T2	19		T3	28
valid_sources[0x5e]	278424	1			T1	35		T2	33		T3	23
valid_sources[0x5f]	282432	1			T1	31		T2	18		T3	32
valid_sources[0x60]	283576	1			T1	24		T2	27		T3	19
valid_sources[0x61]	287534	1			T1	19		T2	16		T3	22
valid_sources[0x62]	279725	1			T1	18		T2	29		T3	28
valid_sources[0x63]	284960	1			T1	32		T2	12		T3	16
valid_sources[0x64]	293296	1			T1	26		T2	32		T3	31
valid_sources[0x65]	284495	1			T1	30		T2	55		T3	28
valid_sources[0x66]	279643	1			T1	23		T2	20		T3	26
valid_sources[0x67]	279511	1			T1	22		T2	29		T3	17
valid_sources[0x68]	282493	1			T1	19		T2	25		T3	33
valid_sources[0x69]	768829	1			T1	32		T2	30		T3	29
valid_sources[0x6a]	286011	1			T1	23		T2	47		T3	30
valid_sources[0x6b]	279699	1			T1	26		T2	38		T3	26
valid_sources[0x6c]	277797	1			T1	32		T2	33		T3	17
valid_sources[0x6d]	946152	1			T1	31		T2	19		T3	27
valid_sources[0x6e]	278482	1			T1	32		T2	28		T3	21
valid_sources[0x6f]	293069	1			T1	32		T2	19		T3	20
valid_sources[0x70]	279814	1			T1	30		T2	39		T3	23
valid_sources[0x71]	881129	1			T1	37		T2	23		T3	15
valid_sources[0x72]	293954	1			T1	23		T2	25		T3	13
valid_sources[0x73]	479146	1			T1	23		T2	29		T3	24
valid_sources[0x74]	279969	1			T1	24		T2	25		T3	17
valid_sources[0x75]	312001	1			T1	21		T2	28		T3	24
valid_sources[0x76]	753759	1			T1	18		T2	22		T3	22
valid_sources[0x77]	290828	1			T1	32		T2	36		T3	29
valid_sources[0x78]	285097	1			T1	29		T2	36		T3	26
valid_sources[0x79]	283289	1			T1	27		T2	32		T3	18
valid_sources[0x7a]	283263	1			T1	27		T2	36		T3	20
valid_sources[0x7b]	289024	1			T1	30		T2	32		T3	20
valid_sources[0x7c]	281353	1			T1	37		T2	27		T3	23
valid_sources[0x7d]	984939	1			T1	12		T2	25		T3	25
valid_sources[0x7e]	672671	1			T1	24		T2	41		T3	28
valid_sources[0x7f]	284348	1			T1	33		T2	30		T3	34
valid_sources[0x80]	277884	1			T1	31		T2	34		T3	20

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7267946

1

T1

400

T2

699

T3

613

values[0x0]

all_enables

biggest_size

15333370

1

T1

1131

T2

1176

T3

858

values[0x1]

all_enables

biggest_size

9007111

1

T1

660

T2

680

T3

503