Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	71666676	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

35145473

1

T1

8618

T2

1538

T3

73471

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	15709355	1			T1	4200		T2	594		T3	28561
values[0x0]	43990300	1			T1	11060		T2	2180		T3	101516
values[0x1]	47112494	1			T1	10837		T2	2116		T3	102320

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	60716131	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

46096018

1

T1

10735

T2

1935

T3

92785

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	365853	1			T1	89		T2	20		T3	1100
valid_sources[0x01]	354897	1			T1	105		T2	24		T3	943
valid_sources[0x02]	352766	1			T1	85		T2	11		T3	829
valid_sources[0x03]	351912	1			T1	93		T2	21		T3	908
valid_sources[0x04]	351174	1			T1	101		T2	16		T3	879
valid_sources[0x05]	1091458	1			T1	109		T2	22		T3	914
valid_sources[0x06]	363080	1			T1	96		T2	26		T3	950
valid_sources[0x07]	381451	1			T1	120		T2	14		T3	955
valid_sources[0x08]	358135	1			T1	89		T2	12		T3	935
valid_sources[0x09]	352301	1			T1	93		T2	23		T3	893
valid_sources[0x0a]	354480	1			T1	99		T2	18		T3	935
valid_sources[0x0b]	353495	1			T1	111		T2	25		T3	860
valid_sources[0x0c]	713389	1			T1	96		T2	19		T3	986
valid_sources[0x0d]	359247	1			T1	99		T2	21		T3	819
valid_sources[0x0e]	358694	1			T1	107		T2	15		T3	1002
valid_sources[0x0f]	362435	1			T1	81		T2	8		T3	843
valid_sources[0x10]	359355	1			T1	102		T2	13		T3	908
valid_sources[0x11]	354243	1			T1	62		T2	11		T3	965
valid_sources[0x12]	357309	1			T1	128		T2	28		T3	956
valid_sources[0x13]	351500	1			T1	101		T2	21		T3	992
valid_sources[0x14]	354483	1			T1	126		T2	16		T3	882
valid_sources[0x15]	383702	1			T1	131		T2	25		T3	859
valid_sources[0x16]	351721	1			T1	82		T2	15		T3	955
valid_sources[0x17]	354394	1			T1	115		T2	15		T3	995
valid_sources[0x18]	353575	1			T1	109		T2	21		T3	909
valid_sources[0x19]	349444	1			T1	113		T2	10		T3	950
valid_sources[0x1a]	356266	1			T1	96		T2	13		T3	890
valid_sources[0x1b]	363232	1			T1	87		T2	18		T3	903
valid_sources[0x1c]	362801	1			T1	63		T2	13		T3	890
valid_sources[0x1d]	353379	1			T1	90		T2	22		T3	886
valid_sources[0x1e]	359659	1			T1	119		T2	31		T3	922
valid_sources[0x1f]	814737	1			T1	118		T2	22		T3	805
valid_sources[0x20]	362887	1			T1	96		T2	20		T3	845
valid_sources[0x21]	355367	1			T1	85		T2	17		T3	909
valid_sources[0x22]	781611	1			T1	98		T2	13		T3	934
valid_sources[0x23]	356427	1			T1	103		T2	20		T3	805
valid_sources[0x24]	361768	1			T1	80		T2	15		T3	716
valid_sources[0x25]	358727	1			T1	108		T2	29		T3	941
valid_sources[0x26]	356425	1			T1	127		T2	18		T3	935
valid_sources[0x27]	359793	1			T1	93		T2	15		T3	843
valid_sources[0x28]	351768	1			T1	102		T2	23		T3	810
valid_sources[0x29]	359086	1			T1	111		T2	15		T3	972
valid_sources[0x2a]	351361	1			T1	98		T2	12		T3	959
valid_sources[0x2b]	360831	1			T1	110		T2	14		T3	734
valid_sources[0x2c]	755099	1			T1	115		T2	15		T3	847
valid_sources[0x2d]	348382	1			T1	93		T2	13		T3	859
valid_sources[0x2e]	360310	1			T1	98		T2	18		T3	874
valid_sources[0x2f]	357145	1			T1	121		T2	24		T3	964
valid_sources[0x30]	353848	1			T1	110		T2	17		T3	973
valid_sources[0x31]	350321	1			T1	125		T2	15		T3	966
valid_sources[0x32]	393078	1			T1	100		T2	20		T3	964
valid_sources[0x33]	556061	1			T1	123		T2	16		T3	813
valid_sources[0x34]	354088	1			T1	113		T2	9		T3	893
valid_sources[0x35]	795795	1			T1	128		T2	11		T3	797
valid_sources[0x36]	353089	1			T1	98		T2	17		T3	915
valid_sources[0x37]	592581	1			T1	94		T2	16		T3	921
valid_sources[0x38]	565157	1			T1	99		T2	28		T3	770
valid_sources[0x39]	358938	1			T1	94		T2	31		T3	808
valid_sources[0x3a]	356099	1			T1	109		T2	25		T3	779
valid_sources[0x3b]	360477	1			T1	120		T2	25		T3	923
valid_sources[0x3c]	393858	1			T1	109		T2	14		T3	1041
valid_sources[0x3d]	422795	1			T1	113		T2	21		T3	806
valid_sources[0x3e]	587033	1			T1	91		T2	21		T3	973
valid_sources[0x3f]	384550	1			T1	92		T2	19		T3	812
valid_sources[0x40]	356516	1			T1	79		T2	23		T3	993
valid_sources[0x41]	349004	1			T1	98		T2	23		T3	835
valid_sources[0x42]	351800	1			T1	125		T2	25		T3	992
valid_sources[0x43]	366700	1			T1	109		T2	27		T3	944
valid_sources[0x44]	357686	1			T1	96		T2	24		T3	887
valid_sources[0x45]	353676	1			T1	114		T2	17		T3	876
valid_sources[0x46]	352538	1			T1	87		T2	15		T3	916
valid_sources[0x47]	620920	1			T1	82		T2	13		T3	963
valid_sources[0x48]	608524	1			T1	100		T2	18		T3	852
valid_sources[0x49]	351038	1			T1	96		T2	18		T3	994
valid_sources[0x4a]	350888	1			T1	87		T2	18		T3	923
valid_sources[0x4b]	662012	1			T1	127		T2	17		T3	925
valid_sources[0x4c]	357074	1			T1	84		T2	12		T3	890
valid_sources[0x4d]	353503	1			T1	81		T2	20		T3	909
valid_sources[0x4e]	371682	1			T1	103		T2	21		T3	1012
valid_sources[0x4f]	364537	1			T1	83		T2	17		T3	946
valid_sources[0x50]	354170	1			T1	101		T2	16		T3	961
valid_sources[0x51]	1191713	1			T1	112		T2	25		T3	974
valid_sources[0x52]	358825	1			T1	80		T2	30		T3	947
valid_sources[0x53]	830665	1			T1	98		T2	12		T3	922
valid_sources[0x54]	353006	1			T1	100		T2	18		T3	887
valid_sources[0x55]	347965	1			T1	97		T2	10		T3	955
valid_sources[0x56]	356612	1			T1	118		T2	5		T3	930
valid_sources[0x57]	351705	1			T1	89		T2	18		T3	889
valid_sources[0x58]	349522	1			T1	91		T2	9		T3	837
valid_sources[0x59]	349606	1			T1	93		T2	32		T3	944
valid_sources[0x5a]	355694	1			T1	99		T2	12		T3	951
valid_sources[0x5b]	358389	1			T1	106		T2	14		T3	897
valid_sources[0x5c]	371582	1			T1	111		T2	20		T3	963
valid_sources[0x5d]	779196	1			T1	92		T2	29		T3	915
valid_sources[0x5e]	360038	1			T1	98		T2	18		T3	939
valid_sources[0x5f]	357352	1			T1	105		T2	18		T3	792
valid_sources[0x60]	360286	1			T1	98		T2	14		T3	833
valid_sources[0x61]	356692	1			T1	95		T2	21		T3	795
valid_sources[0x62]	359853	1			T1	104		T2	15		T3	1033
valid_sources[0x63]	351366	1			T1	93		T2	19		T3	965
valid_sources[0x64]	363712	1			T1	92		T2	17		T3	930
valid_sources[0x65]	805242	1			T1	119		T2	20		T3	944
valid_sources[0x66]	357935	1			T1	125		T2	13		T3	948
valid_sources[0x67]	363325	1			T1	111		T2	20		T3	962
valid_sources[0x68]	362068	1			T1	106		T2	12		T3	884
valid_sources[0x69]	363878	1			T1	96		T2	17		T3	814
valid_sources[0x6a]	358586	1			T1	100		T2	18		T3	955
valid_sources[0x6b]	353591	1			T1	97		T2	16		T3	990
valid_sources[0x6c]	357967	1			T1	88		T2	25		T3	897
valid_sources[0x6d]	361676	1			T1	120		T2	22		T3	877
valid_sources[0x6e]	354529	1			T1	67		T2	12		T3	878
valid_sources[0x6f]	358283	1			T1	84		T2	24		T3	880
valid_sources[0x70]	363657	1			T1	119		T2	15		T3	840
valid_sources[0x71]	354749	1			T1	117		T2	18		T3	927
valid_sources[0x72]	351164	1			T1	107		T2	27		T3	925
valid_sources[0x73]	368576	1			T1	82		T2	15		T3	860
valid_sources[0x74]	360403	1			T1	92		T2	16		T3	776
valid_sources[0x75]	673112	1			T1	101		T2	24		T3	889
valid_sources[0x76]	352842	1			T1	87		T2	26		T3	905
valid_sources[0x77]	362854	1			T1	99		T2	26		T3	936
valid_sources[0x78]	352347	1			T1	99		T2	12		T3	815
valid_sources[0x79]	356416	1			T1	100		T2	24		T3	903
valid_sources[0x7a]	364140	1			T1	88		T2	18		T3	901
valid_sources[0x7b]	355649	1			T1	103		T2	13		T3	946
valid_sources[0x7c]	360588	1			T1	83		T2	15		T3	878
valid_sources[0x7d]	369537	1			T1	97		T2	15		T3	907
valid_sources[0x7e]	390096	1			T1	65		T2	26		T3	790
valid_sources[0x7f]	351725	1			T1	107		T2	22		T3	933
valid_sources[0x80]	348944	1			T1	107		T2	34		T3	843

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7986241

1

T1

2135

T2

302

T3

14242

values[0x0]

all_enables

biggest_size

17054680

1

T1

4134

T2

790

T3

37641

values[0x1]

all_enables

biggest_size

10104552

1

T1

2349

T2

446

T3

21588