Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_lockable_field_cov.sv

218 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_13.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_14.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_15.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_16.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_17.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_18.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_19.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_2.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_20.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_21.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_22.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_23.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_24.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_25.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_26.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_27.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_28.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_29.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_3.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_30.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_31.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_32.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_33.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_34.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_35.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_36.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_37.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_38.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_39.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_4.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_40.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_41.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_42.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_43.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_44.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_45.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_46.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_47.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_48.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_49.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_5.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_50.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_51.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_52.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_53.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_54.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_55.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_56.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_57.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_59.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_6.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_60.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_61.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_62.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_63.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_64.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_7.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_8.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_9.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_accum_thresh_shadowed.classa_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_clr_shadowed.classa_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_crashdump_trigger_shadowed.classa_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_phase0_cyc_shadowed.classa_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_phase1_cyc_shadowed.classa_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_phase2_cyc_shadowed.classa_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_phase3_cyc_shadowed.classa_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_timeout_cyc_shadowed.classa_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_accum_thresh_shadowed.classb_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_clr_shadowed.classb_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_crashdump_trigger_shadowed.classb_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase0_cyc_shadowed.classb_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase1_cyc_shadowed.classb_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase2_cyc_shadowed.classb_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase3_cyc_shadowed.classb_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_timeout_cyc_shadowed.classb_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_accum_thresh_shadowed.classc_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_clr_shadowed.classc_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_crashdump_trigger_shadowed.classc_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase0_cyc_shadowed.classc_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase1_cyc_shadowed.classc_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase2_cyc_shadowed.classc_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase3_cyc_shadowed.classc_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_timeout_cyc_shadowed.classc_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_accum_thresh_shadowed.classd_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_clr_shadowed.classd_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_crashdump_trigger_shadowed.classd_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase0_cyc_shadowed.classd_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase1_cyc_shadowed.classd_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase2_cyc_shadowed.classd_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase3_cyc_shadowed.classd_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_timeout_cyc_shadowed.classd_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_0.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_1.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_2.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_3.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_4.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_5.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_6.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_0.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_1.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_2.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_3.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_4.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_5.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_6.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.ping_timeout_cyc_shadowed.ping_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.ping_timer_en_shadowed.ping_timer_en_shadowed 100.00 1 100 1 64 64




Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 244 1 T202 128 T141 4 T171 3
auto[1] 603 1 T133 3 T136 2 T209 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 495 1 T202 128 T135 3 T139 4
auto[1] 697 1 T203 1 T135 2 T206 222


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 306 1 T202 64 T141 1 T142 1
auto[1] 621 1 T202 64 T136 4 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 379 1 T202 128 T209 1 T141 3
auto[1] 261 1 T133 5 T209 1 T141 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 301 1 T134 4 T202 128 T141 1
auto[1] 334 1 T134 3 T209 1 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 600 1 T202 64 T141 4 T139 3
auto[1] 406 1 T133 7 T202 64 T209 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 304 1 T202 128 T209 1 T135 3
auto[1] 343 1 T133 5 T209 1 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 240 1 T202 64 T144 1 T142 3
auto[1] 404 1 T202 64 T209 1 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 364 1 T202 128 T203 1 T139 2
auto[1] 698 1 T209 2 T137 4 T146 8


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 450 1 T202 64 T141 1 T144 1
auto[1] 672 1 T133 5 T202 64 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 258 1 T202 64 T135 5 T141 2
auto[1] 777 1 T202 64 T209 2 T141 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 509 1 T134 1 T202 64 T203 1
auto[1] 283 1 T134 3 T202 64 T209 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 241 1 T202 64 T141 2 T139 4
auto[1] 561 1 T202 64 T209 2 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 392 1 T202 128 T209 1 T135 4
auto[1] 433 1 T209 1 T135 2 T141 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 238 1 T202 128 T141 1 T139 2
auto[1] 638 1 T209 1 T203 1 T141 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 330 1 T134 2 T202 64 T141 8
auto[1] 313 1 T133 3 T134 2 T202 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 320 1 T202 128 T144 3 T171 1
auto[1] 357 1 T133 4 T209 1 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 722 1 T202 128 T203 1 T135 6
auto[1] 301 1 T136 4 T209 2 T139 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 437 1 T202 128 T209 1 T144 4
auto[1] 224 1 T358 1 T138 4 T171 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 626 1 T134 3 T202 128 T209 1
auto[1] 190 1 T133 1 T134 2 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 253 1 T202 64 T135 7 T141 6
auto[1] 395 1 T133 4 T202 64 T136 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 623 1 T134 1 T202 64 T209 1
auto[1] 734 1 T133 6 T134 3 T202 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 413 1 T202 64 T141 2 T144 5
auto[1] 558 1 T133 7 T202 64 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 440 1 T202 128 T141 3 T139 3
auto[1] 557 1 T133 2 T209 1 T141 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 381 1 T202 128 T135 1 T139 2
auto[1] 730 1 T134 5 T209 1 T135 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 303 1 T202 64 T139 3 T142 4
auto[1] 802 1 T133 6 T202 64 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 308 1 T202 64 T142 6 T171 1
auto[1] 885 1 T202 64 T209 1 T358 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 249 1 T202 64 T135 2 T141 4
auto[1] 664 1 T133 6 T134 4 T202 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 392 1 T202 64 T141 4 T142 1
auto[1] 532 1 T133 7 T202 64 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 369 1 T202 64 T139 5 T144 4
auto[1] 534 1 T202 64 T136 6 T209 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 291 1 T202 64 T209 1 T141 5
auto[1] 551 1 T202 64 T138 3 T142 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 390 1 T134 4 T202 64 T209 1
auto[1] 257 1 T134 1 T202 64 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 471 1 T202 128 T209 1 T139 4
auto[1] 279 1 T133 5 T209 1 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 543 1 T202 64 T203 1 T141 2
auto[1] 391 1 T133 6 T202 64 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 427 1 T202 64 T203 1 T139 4
auto[1] 404 1 T133 6 T202 64 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 233 1 T202 128 T171 1 T359 2
auto[1] 417 1 T209 1 T203 1 T137 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 314 1 T202 128 T209 1 T141 1
auto[1] 342 1 T133 4 T203 1 T141 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 402 1 T134 5 T202 64 T209 1
auto[1] 284 1 T133 1 T202 64 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 380 1 T202 128 T203 1 T141 1
auto[1] 264 1 T209 2 T141 3 T139 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 374 1 T134 3 T202 128 T135 3
auto[1] 278 1 T133 4 T134 1 T209 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 324 1 T202 64 T141 4 T358 1
auto[1] 543 1 T133 8 T202 64 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 238 1 T202 64 T142 5 T171 4
auto[1] 392 1 T133 4 T202 64 T136 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 378 1 T202 64 T203 1 T135 3
auto[1] 432 1 T202 64 T136 5 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 444 1 T202 128 T141 1 T142 1
auto[1] 474 1 T133 3 T209 1 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 639 1 T202 64 T358 1 T171 2
auto[1] 246 1 T202 64 T136 5 T209 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 298 1 T202 128 T209 1 T171 2
auto[1] 500 1 T136 4 T203 1 T146 9


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 382 1 T202 64 T203 1 T139 3
auto[1] 264 1 T202 64 T209 2 T139 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 454 1 T134 3 T202 128 T209 1
auto[1] 215 1 T133 4 T134 2 T136 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 307 1 T202 128 T209 1 T142 7
auto[1] 357 1 T209 1 T203 1 T146 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 389 1 T202 128 T135 5 T141 1
auto[1] 749 1 T133 2 T136 7 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 305 1 T202 64 T139 2 T358 1
auto[1] 309 1 T202 64 T209 2 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 308 1 T202 128 T139 5 T142 1
auto[1] 324 1 T133 3 T209 1 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 374 1 T134 1 T202 128 T209 1
auto[1] 724 1 T134 2 T136 4 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 182 1 T202 64 T139 5 T142 3
auto[1] 970 1 T202 64 T209 1 T203 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 433 1 T202 128 T209 2 T141 2
auto[1] 207 1 T136 4 T203 1 T141 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 328 1 T202 128 T203 1 T141 2
auto[1] 521 1 T209 2 T141 7 T146 8


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 182 1 T134 3 T202 64 T135 2
auto[1] 925 1 T133 4 T134 1 T202 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 396 1 T202 64 T139 16 T358 1
auto[1] 391 1 T134 4 T202 64 T209 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 261 1 T134 3 T202 64 T141 6
auto[1] 385 1 T133 2 T134 1 T202 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 375 1 T134 4 T202 128 T209 1
auto[1] 695 1 T209 1 T203 1 T135 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 388 1 T202 128 T209 1 T203 1
auto[1] 460 1 T133 4 T209 1 T141 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 297 1 T202 128 T209 2 T358 1
auto[1] 718 1 T136 3 T203 1 T138 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 318 1 T202 64 T209 1 T144 1
auto[1] 759 1 T133 4 T202 64 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 452 1 T134 6 T202 64 T209 1
auto[1] 181 1 T202 64 T136 6 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 436 1 T202 64 T171 2 T360 1
auto[1] 425 1 T133 6 T134 6 T202 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12 1 T144 4 T142 2 T154 1
auto[1] 63 1 T133 6 T139 6 T142 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12 1 T134 1 T141 1 T145 3
auto[1] 42 1 T134 2 T141 3 T137 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 20 1 T139 4 T145 3 T149 2
auto[1] 48 1 T133 3 T137 5 T146 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 16 1 T159 2 T145 5 T164 1
auto[1] 53 1 T137 4 T138 10 T142 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7 1 T159 1 T145 4 T165 2
auto[1] 49 1 T139 2 T138 3 T142 5

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%