Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
98.31	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	1	43	97.73

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	1	43	97.73	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	162	1			T4	1		T6	1		T42	2
index[0x1]	174	1			T15	1		T5	1		T6	2
index[0x2]	186	1			T6	3		T41	1		T42	1
index[0x3]	184	1			T4	1		T6	4		T25	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	226	1			T5	1		T6	4		T39	1
lens_less_than_1000[1]	142	1			T4	2		T6	2		T25	1
lens_less_than_1000[2]	101	1			T6	2		T18	1		T42	1
lens_less_than_1000[3]	69	1			T15	1		T6	1		T40	2
lens_less_than_1000[4]	49	1			T39	1		T61	3		T19	1
lens_less_than_1000[5]	46	1			T6	1		T63	1		T19	1
lens_less_than_1000[6]	24	1			T38	3		T76	2		T179	1
lens_less_than_1000[7]	23	1			T39	1		T49	1		T224	1
lens_less_than_1000[8]	12	1			T74	1		T49	1		T77	1
lens_less_than_1000[9]	6	1			T77	2		T264	1		T190	1
len_2	8	1			T65	1		T265	1		T235	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	1	43	97.73	1

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x2]]	[lens_less_than_1000[9]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	55	1			T6	1		T42	1		T24	1
index[0x0]	lens_less_than_1000[1]	33	1			T4	1		T79	1		T20	1
index[0x0]	lens_less_than_1000[2]	19	1			T42	1		T74	1		T227	1
index[0x0]	lens_less_than_1000[3]	10	1			T266	1		T58	1		T241	1
index[0x0]	lens_less_than_1000[4]	10	1			T267	1		T112	1		T268	1
index[0x0]	lens_less_than_1000[5]	9	1			T106	1		T50	1		T269	1
index[0x0]	lens_less_than_1000[6]	10	1			T38	2		T76	1		T179	1
index[0x0]	lens_less_than_1000[7]	6	1			T49	1		T258	1		T268	1
index[0x0]	lens_less_than_1000[8]	5	1			T74	1		T77	1		T270	1
index[0x0]	lens_less_than_1000[9]	1	1			T271	1		-	-		-	-
index[0x0]	len_2	4	1			T92	1		T103	1		T104	1
index[0x1]	lens_less_than_1000[0]	47	1			T5	1		T39	1		T19	6
index[0x1]	lens_less_than_1000[1]	40	1			T6	2		T272	1		T45	1
index[0x1]	lens_less_than_1000[2]	19	1			T18	1		T19	1		T69	1
index[0x1]	lens_less_than_1000[3]	24	1			T15	1		T40	2		T26	1
index[0x1]	lens_less_than_1000[4]	16	1			T39	1		T61	3		T47	1
index[0x1]	lens_less_than_1000[5]	14	1			T63	1		T19	1		T55	1
index[0x1]	lens_less_than_1000[6]	1	1			T273	1		-	-		-	-
index[0x1]	lens_less_than_1000[7]	8	1			T39	1		T179	1		T56	1
index[0x1]	lens_less_than_1000[8]	1	1			T274	1		-	-		-	-
index[0x1]	lens_less_than_1000[9]	2	1			T77	1		T264	1		-	-
index[0x1]	len_2	2	1			T235	1		T237	1		-	-
index[0x2]	lens_less_than_1000[0]	59	1			T6	2		T41	1		T42	1
index[0x2]	lens_less_than_1000[1]	35	1			T43	1		T27	2		T106	1
index[0x2]	lens_less_than_1000[2]	38	1			T19	6		T74	1		T75	1
index[0x2]	lens_less_than_1000[3]	16	1			T6	1		T267	1		T110	1
index[0x2]	lens_less_than_1000[4]	9	1			T81	1		T275	1		T276	1
index[0x2]	lens_less_than_1000[5]	11	1			T20	1		T22	1		T55	1
index[0x2]	lens_less_than_1000[6]	10	1			T38	1		T274	2		T277	1
index[0x2]	lens_less_than_1000[7]	5	1			T224	1		T179	1		T235	1
index[0x2]	lens_less_than_1000[8]	2	1			T49	1		T278	1		-	-
index[0x2]	len_2	1	1			T265	1		-	-		-	-
index[0x3]	lens_less_than_1000[0]	65	1			T6	1		T43	1		T20	1
index[0x3]	lens_less_than_1000[1]	34	1			T4	1		T25	1		T14	1
index[0x3]	lens_less_than_1000[2]	25	1			T6	2		T19	1		T27	1
index[0x3]	lens_less_than_1000[3]	19	1			T78	1		T279	1		T179	1
index[0x3]	lens_less_than_1000[4]	14	1			T19	1		T95	1		T280	1
index[0x3]	lens_less_than_1000[5]	12	1			T6	1		T281	1		T179	1
index[0x3]	lens_less_than_1000[6]	3	1			T76	1		T194	1		T282	1
index[0x3]	lens_less_than_1000[7]	4	1			T235	1		T283	1		T284	1
index[0x3]	lens_less_than_1000[8]	4	1			T285	1		T103	2		T278	1
index[0x3]	lens_less_than_1000[9]	3	1			T77	1		T190	1		T259	1
index[0x3]	len_2	1	1			T65	1		-	-		-	-