Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
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Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_lockable_field_cov.sv

218 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_13.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_14.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_15.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_16.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_17.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_18.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_19.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_2.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_20.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_21.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_22.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_23.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_24.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_25.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_26.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_27.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_28.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_29.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_3.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_30.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_31.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_32.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_33.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_34.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_35.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_36.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_37.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_38.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_39.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_4.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_40.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_41.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_42.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_43.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_44.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_45.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_46.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_47.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_48.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_49.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_5.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_50.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_51.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_52.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_53.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_54.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_55.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_56.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_57.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_59.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_6.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_60.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_61.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_62.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_63.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_64.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_7.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_8.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_9.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_accum_thresh_shadowed.classa_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_clr_shadowed.classa_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_crashdump_trigger_shadowed.classa_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_phase0_cyc_shadowed.classa_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_phase1_cyc_shadowed.classa_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_phase2_cyc_shadowed.classa_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_phase3_cyc_shadowed.classa_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_timeout_cyc_shadowed.classa_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_accum_thresh_shadowed.classb_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_clr_shadowed.classb_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_crashdump_trigger_shadowed.classb_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase0_cyc_shadowed.classb_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase1_cyc_shadowed.classb_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase2_cyc_shadowed.classb_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase3_cyc_shadowed.classb_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_timeout_cyc_shadowed.classb_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_accum_thresh_shadowed.classc_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_clr_shadowed.classc_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_crashdump_trigger_shadowed.classc_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase0_cyc_shadowed.classc_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase1_cyc_shadowed.classc_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase2_cyc_shadowed.classc_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase3_cyc_shadowed.classc_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_timeout_cyc_shadowed.classc_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_accum_thresh_shadowed.classd_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_clr_shadowed.classd_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_crashdump_trigger_shadowed.classd_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase0_cyc_shadowed.classd_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase1_cyc_shadowed.classd_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase2_cyc_shadowed.classd_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase3_cyc_shadowed.classd_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_timeout_cyc_shadowed.classd_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_0.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_1.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_2.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_3.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_4.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_5.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_6.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_0.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_1.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_2.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_3.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_4.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_5.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_6.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.ping_timeout_cyc_shadowed.ping_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.ping_timer_en_shadowed.ping_timer_en_shadowed 100.00 1 100 1 64 64




Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 487 1 T152 3 T122 6 T132 3
auto[1] 338 1 T116 4 T117 3 T152 11


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 376 1 T152 4 T122 2 T180 64
auto[1] 493 1 T116 2 T152 8 T122 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 462 1 T152 6 T132 7 T180 64
auto[1] 244 1 T173 1 T152 10 T119 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 481 1 T152 4 T132 1 T180 64
auto[1] 242 1 T152 9 T132 5 T119 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 668 1 T116 4 T152 2 T121 2
auto[1] 313 1 T173 1 T116 1 T118 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 749 1 T152 4 T132 5 T218 1
auto[1] 778 1 T118 3 T152 8 T122 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 679 1 T152 2 T181 2 T121 8
auto[1] 627 1 T152 16 T180 64 T131 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 319 1 T152 5 T132 3 T180 64
auto[1] 374 1 T173 1 T117 2 T118 7


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 414 1 T116 2 T152 1 T181 1
auto[1] 374 1 T116 2 T152 13 T122 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 637 1 T116 1 T152 3 T180 64
auto[1] 539 1 T173 1 T116 4 T152 7


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 384 1 T173 1 T152 4 T181 2
auto[1] 818 1 T152 12 T180 64 T119 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 539 1 T152 6 T132 3 T218 2
auto[1] 852 1 T173 1 T117 8 T152 10


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 677 1 T116 6 T152 4 T180 64
auto[1] 305 1 T173 1 T152 13 T181 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 660 1 T152 5 T122 1 T132 5
auto[1] 786 1 T173 1 T152 13 T122 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 482 1 T173 1 T152 4 T180 64
auto[1] 539 1 T117 4 T152 11 T123 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 271 1 T152 4 T122 5 T324 1
auto[1] 696 1 T117 5 T118 4 T152 10


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 352 1 T122 4 T132 5 T181 1
auto[1] 364 1 T117 5 T118 7 T152 10


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 268 1 T152 2 T122 7 T132 3
auto[1] 467 1 T173 1 T117 4 T152 10


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 309 1 T116 1 T152 4 T122 1
auto[1] 487 1 T173 1 T116 4 T117 7


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 336 1 T152 7 T180 64 T181 1
auto[1] 612 1 T118 4 T152 12 T123 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 317 1 T152 3 T122 5 T325 2
auto[1] 465 1 T173 1 T117 6 T152 14


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 496 1 T173 1 T152 4 T180 64
auto[1] 483 1 T117 11 T152 11 T123 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 386 1 T116 9 T152 4 T132 2
auto[1] 686 1 T173 1 T152 9 T132 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 588 1 T116 1 T152 3 T122 4
auto[1] 604 1 T173 1 T116 2 T152 11


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 331 1 T116 3 T152 5 T180 64
auto[1] 373 1 T173 1 T116 1 T152 10


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 701 1 T116 2 T152 4 T122 3
auto[1] 302 1 T117 4 T152 12 T122 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 325 1 T116 4 T152 1 T122 2
auto[1] 763 1 T173 1 T117 5 T152 17


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 314 1 T152 3 T122 2 T131 2
auto[1] 382 1 T152 15 T122 2 T180 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 408 1 T152 1 T132 6 T180 64
auto[1] 557 1 T173 1 T152 12 T123 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 394 1 T116 5 T152 2 T121 6
auto[1] 596 1 T117 9 T152 11 T180 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 322 1 T152 3 T122 3 T132 1
auto[1] 1101 1 T118 6 T152 11 T122 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 260 1 T152 8 T181 1 T218 2
auto[1] 699 1 T117 8 T118 5 T152 8


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 382 1 T152 4 T122 7 T121 8
auto[1] 504 1 T117 6 T152 13 T122 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 315 1 T152 3 T122 1 T180 64
auto[1] 540 1 T173 1 T116 5 T152 12


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 457 1 T122 6 T132 8 T181 1
auto[1] 727 1 T173 1 T117 4 T152 14


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 340 1 T116 4 T152 6 T326 64
auto[1] 795 1 T173 1 T116 2 T152 8


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 342 1 T152 4 T180 64 T181 1
auto[1] 856 1 T173 1 T118 4 T152 10


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 317 1 T173 1 T152 4 T122 3
auto[1] 386 1 T152 12 T180 64 T181 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 309 1 T116 1 T152 6 T326 64
auto[1] 866 1 T173 1 T116 3 T117 10


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 389 1 T180 64 T121 3 T325 1
auto[1] 887 1 T173 1 T152 14 T181 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 450 1 T173 1 T152 1 T132 1
auto[1] 626 1 T152 12 T132 1 T180 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 397 1 T116 1 T152 3 T181 1
auto[1] 340 1 T173 1 T116 2 T117 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 517 1 T116 2 T152 5 T122 4
auto[1] 962 1 T173 1 T116 2 T117 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 761 1 T173 1 T116 2 T152 7
auto[1] 249 1 T116 5 T117 5 T152 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 537 1 T327 1 T153 3 T162 1
auto[1] 649 1 T173 1 T118 7 T152 15


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 460 1 T116 5 T152 2 T122 3
auto[1] 419 1 T173 1 T116 1 T152 14


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 257 1 T173 1 T152 7 T122 5
auto[1] 594 1 T117 3 T118 4 T152 7


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 248 1 T152 5 T132 4 T181 2
auto[1] 635 1 T173 1 T117 9 T152 7


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 406 1 T152 5 T180 64 T121 3
auto[1] 666 1 T173 1 T152 9 T123 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 405 1 T116 1 T152 5 T132 2
auto[1] 333 1 T173 1 T116 2 T117 11


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 258 1 T152 4 T181 2 T131 1
auto[1] 428 1 T173 1 T152 12 T123 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 375 1 T152 4 T132 4 T326 64
auto[1] 321 1 T173 1 T117 5 T118 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 372 1 T152 2 T180 64 T181 1
auto[1] 562 1 T173 1 T118 2 T152 13


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 279 1 T116 4 T152 4 T132 2
auto[1] 456 1 T173 1 T116 2 T117 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 756 1 T173 1 T152 6 T122 2
auto[1] 549 1 T152 10 T122 6 T132 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 455 1 T116 1 T152 2 T122 1
auto[1] 662 1 T173 1 T116 1 T117 8


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 393 1 T116 2 T152 7 T132 1
auto[1] 504 1 T173 1 T116 4 T117 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 284 1 T152 4 T122 6 T181 1
auto[1] 1202 1 T173 1 T117 2 T152 9


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 264 1 T116 1 T152 5 T132 2
auto[1] 496 1 T173 1 T116 2 T152 14


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 322 1 T152 3 T132 4 T180 64
auto[1] 879 1 T173 1 T117 6 T152 9


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 514 1 T116 2 T152 3 T122 8
auto[1] 818 1 T173 1 T117 4 T152 11


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 323 1 T152 6 T122 2 T181 1
auto[1] 387 1 T173 1 T152 10 T122 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 255 1 T152 2 T122 2 T180 64
auto[1] 414 1 T152 12 T122 1 T121 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 767 1 T152 4 T122 4 T132 3
auto[1] 861 1 T173 1 T152 10 T122 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 554 1 T152 3 T122 2 T181 1
auto[1] 408 1 T173 1 T152 11 T122 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 18 1 T127 1 T128 7 T147 1
auto[1] 25 1 T118 3 T119 3 T125 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 18 1 T129 2 T141 4 T328 4
auto[1] 55 1 T118 3 T123 9 T124 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 35 1 T122 8 T138 3 T147 1
auto[1] 46 1 T122 2 T132 2 T136 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 19 1 T132 3 T127 1 T128 4
auto[1] 50 1 T123 3 T132 1 T120 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12 1 T122 3 T138 1 T329 4
auto[1] 53 1 T117 4 T123 7 T134 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%