Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	65983338	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

32183160

1

T1

2463

T2

152957

T3

2159

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14930718	1			T1	1022		T2	59769		T3	840
values[0x0]	40417611	1			T1	3287		T2	212900		T3	2812
values[0x1]	42818169	1			T1	3185		T2	213538		T3	2817

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	56124905	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

42041593

1

T1

3080

T2

193452

T3

2699

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	313237	1			T1	29		T2	1848		T15	45
valid_sources[0x01]	310798	1			T1	29		T2	1888		T15	32
valid_sources[0x02]	320280	1			T1	26		T2	1962		T3	6469
valid_sources[0x03]	713497	1			T1	30		T2	1940		T15	49
valid_sources[0x04]	322028	1			T1	22		T2	1910		T15	24
valid_sources[0x05]	317430	1			T1	22		T2	1967		T15	29
valid_sources[0x06]	319062	1			T1	20		T2	1843		T15	46
valid_sources[0x07]	320174	1			T1	40		T2	1907		T15	45
valid_sources[0x08]	599238	1			T1	31		T2	1810		T15	27
valid_sources[0x09]	315524	1			T1	31		T2	1843		T15	41
valid_sources[0x0a]	320144	1			T1	35		T2	1858		T15	43
valid_sources[0x0b]	328340	1			T1	31		T2	1801		T15	33
valid_sources[0x0c]	315595	1			T1	27		T2	2034		T15	41
valid_sources[0x0d]	317841	1			T1	33		T2	1796		T15	42
valid_sources[0x0e]	321055	1			T1	27		T2	1757		T15	51
valid_sources[0x0f]	315547	1			T1	30		T2	1950		T15	34
valid_sources[0x10]	314405	1			T1	28		T2	1984		T15	34
valid_sources[0x11]	348727	1			T1	42		T2	1911		T15	34
valid_sources[0x12]	314379	1			T1	33		T2	1928		T15	38
valid_sources[0x13]	315570	1			T1	29		T2	1875		T15	41
valid_sources[0x14]	314844	1			T1	37		T2	2026		T15	36
valid_sources[0x15]	835672	1			T1	27		T2	1829		T15	31
valid_sources[0x16]	699654	1			T1	38		T2	1956		T15	39
valid_sources[0x17]	310620	1			T1	39		T2	2015		T15	33
valid_sources[0x18]	359359	1			T1	22		T2	1845		T15	29
valid_sources[0x19]	313704	1			T1	38		T2	1860		T15	31
valid_sources[0x1a]	312603	1			T1	26		T2	2000		T15	43
valid_sources[0x1b]	321139	1			T1	23		T2	1892		T15	34
valid_sources[0x1c]	1064305	1			T1	34		T2	1888		T15	39
valid_sources[0x1d]	329755	1			T1	30		T2	1814		T15	33
valid_sources[0x1e]	318394	1			T1	30		T2	1810		T15	31
valid_sources[0x1f]	319022	1			T1	25		T2	1833		T15	23
valid_sources[0x20]	318580	1			T1	28		T2	1861		T15	26
valid_sources[0x21]	553863	1			T1	31		T2	1862		T15	37
valid_sources[0x22]	775717	1			T1	28		T2	1832		T15	33
valid_sources[0x23]	330519	1			T1	31		T2	1907		T15	49
valid_sources[0x24]	314380	1			T1	24		T2	1897		T15	30
valid_sources[0x25]	330844	1			T1	20		T2	1915		T15	50
valid_sources[0x26]	316614	1			T1	30		T2	2048		T15	37
valid_sources[0x27]	319033	1			T1	37		T2	1959		T15	37
valid_sources[0x28]	314528	1			T1	32		T2	2026		T15	44
valid_sources[0x29]	315544	1			T1	26		T2	1918		T15	45
valid_sources[0x2a]	314572	1			T1	34		T2	1957		T15	44
valid_sources[0x2b]	317134	1			T1	26		T2	1932		T15	30
valid_sources[0x2c]	327933	1			T1	24		T2	1996		T15	36
valid_sources[0x2d]	327752	1			T1	31		T2	1954		T15	32
valid_sources[0x2e]	316180	1			T1	28		T2	1789		T15	39
valid_sources[0x2f]	320120	1			T1	22		T2	1818		T15	42
valid_sources[0x30]	324766	1			T1	28		T2	1726		T15	52
valid_sources[0x31]	312250	1			T1	26		T2	1838		T15	42
valid_sources[0x32]	313761	1			T1	24		T2	1827		T15	21
valid_sources[0x33]	333550	1			T1	29		T2	1817		T15	29
valid_sources[0x34]	648692	1			T1	21		T2	1897		T15	36
valid_sources[0x35]	346828	1			T1	26		T2	1897		T15	40
valid_sources[0x36]	323026	1			T1	24		T2	1891		T15	42
valid_sources[0x37]	321756	1			T1	23		T2	1912		T15	28
valid_sources[0x38]	334167	1			T1	36		T2	1948		T15	40
valid_sources[0x39]	320273	1			T1	26		T2	1890		T15	30
valid_sources[0x3a]	311921	1			T1	30		T2	1747		T15	27
valid_sources[0x3b]	317010	1			T1	33		T2	1777		T15	47
valid_sources[0x3c]	319334	1			T1	19		T2	1811		T15	43
valid_sources[0x3d]	313704	1			T1	32		T2	1865		T15	46
valid_sources[0x3e]	759176	1			T1	34		T2	1777		T15	47
valid_sources[0x3f]	315439	1			T1	31		T2	1730		T15	30
valid_sources[0x40]	777098	1			T1	29		T2	1801		T15	42
valid_sources[0x41]	334465	1			T1	19		T2	1944		T15	43
valid_sources[0x42]	318055	1			T1	31		T2	1843		T15	36
valid_sources[0x43]	320725	1			T1	23		T2	1884		T15	34
valid_sources[0x44]	337468	1			T1	25		T2	1805		T15	23
valid_sources[0x45]	351653	1			T1	35		T2	1945		T15	40
valid_sources[0x46]	308392	1			T1	39		T2	1886		T15	32
valid_sources[0x47]	312741	1			T1	26		T2	1873		T15	36
valid_sources[0x48]	661408	1			T1	27		T2	1920		T15	55
valid_sources[0x49]	658371	1			T1	29		T2	1924		T15	31
valid_sources[0x4a]	311924	1			T1	36		T2	1729		T15	30
valid_sources[0x4b]	316183	1			T1	25		T2	1916		T15	29
valid_sources[0x4c]	309939	1			T1	28		T2	1761		T15	42
valid_sources[0x4d]	693025	1			T1	30		T2	1796		T15	42
valid_sources[0x4e]	321685	1			T1	23		T2	1902		T15	32
valid_sources[0x4f]	323960	1			T1	26		T2	1895		T15	31
valid_sources[0x50]	322983	1			T1	30		T2	1920		T15	32
valid_sources[0x51]	319244	1			T1	20		T2	1841		T15	31
valid_sources[0x52]	314077	1			T1	32		T2	1925		T15	25
valid_sources[0x53]	320934	1			T1	28		T2	1894		T15	48
valid_sources[0x54]	315508	1			T1	25		T2	2062		T15	33
valid_sources[0x55]	362044	1			T1	21		T2	1980		T15	46
valid_sources[0x56]	322185	1			T1	22		T2	1919		T15	45
valid_sources[0x57]	1115606	1			T1	30		T2	1914		T15	43
valid_sources[0x58]	325765	1			T1	36		T2	1865		T15	46
valid_sources[0x59]	752466	1			T1	32		T2	1858		T15	39
valid_sources[0x5a]	322448	1			T1	37		T2	1802		T15	35
valid_sources[0x5b]	618602	1			T1	44		T2	2131		T15	33
valid_sources[0x5c]	710725	1			T1	40		T2	1944		T15	36
valid_sources[0x5d]	716388	1			T1	27		T2	1967		T15	30
valid_sources[0x5e]	705705	1			T1	35		T2	1917		T15	49
valid_sources[0x5f]	318309	1			T1	42		T2	1799		T15	43
valid_sources[0x60]	311943	1			T1	24		T2	1891		T15	22
valid_sources[0x61]	357889	1			T1	32		T2	1943		T15	33
valid_sources[0x62]	325200	1			T1	28		T2	1863		T15	42
valid_sources[0x63]	751320	1			T1	28		T2	1920		T15	35
valid_sources[0x64]	334078	1			T1	30		T2	1798		T15	37
valid_sources[0x65]	316302	1			T1	24		T2	1979		T15	41
valid_sources[0x66]	603644	1			T1	24		T2	1889		T15	36
valid_sources[0x67]	317381	1			T1	28		T2	2017		T15	41
valid_sources[0x68]	324480	1			T1	37		T2	1972		T15	54
valid_sources[0x69]	980894	1			T1	32		T2	1877		T15	38
valid_sources[0x6a]	774721	1			T1	39		T2	1916		T15	33
valid_sources[0x6b]	323937	1			T1	34		T2	1973		T15	31
valid_sources[0x6c]	357651	1			T1	27		T2	1862		T15	30
valid_sources[0x6d]	312631	1			T1	38		T2	1791		T15	43
valid_sources[0x6e]	314107	1			T1	23		T2	1951		T15	37
valid_sources[0x6f]	309819	1			T1	31		T2	2007		T15	50
valid_sources[0x70]	316639	1			T1	27		T2	1939		T15	23
valid_sources[0x71]	322627	1			T1	17		T2	1947		T15	28
valid_sources[0x72]	312597	1			T1	48		T2	1865		T15	39
valid_sources[0x73]	363149	1			T1	27		T2	1877		T15	27
valid_sources[0x74]	319320	1			T1	33		T2	1779		T15	42
valid_sources[0x75]	567660	1			T1	29		T2	1937		T15	36
valid_sources[0x76]	313611	1			T1	23		T2	1887		T15	31
valid_sources[0x77]	613536	1			T1	27		T2	1858		T15	31
valid_sources[0x78]	582003	1			T1	27		T2	2063		T4	267976
valid_sources[0x79]	324185	1			T1	26		T2	1904		T15	36
valid_sources[0x7a]	317899	1			T1	36		T2	1931		T15	35
valid_sources[0x7b]	316121	1			T1	29		T2	1847		T15	34
valid_sources[0x7c]	317598	1			T1	31		T2	1898		T15	36
valid_sources[0x7d]	621665	1			T1	27		T2	1926		T15	59
valid_sources[0x7e]	319762	1			T1	27		T2	1886		T15	40
valid_sources[0x7f]	325207	1			T1	28		T2	1765		T15	40
valid_sources[0x80]	312830	1			T1	26		T2	1787		T15	26

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7465834

1

T1

531

T2

29959

T3

433

values[0x0]

all_enables

biggest_size

15564297

1

T1

1259

T2

78678

T3

1100

values[0x1]

all_enables

biggest_size

9153029

1

T1

673

T2

44320

T3

626