Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
94.92	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	3	41	93.18

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	3	41	93.18	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	164	1			T1	1		T20	1		T45	1
index[0x1]	182	1			T5	1		T20	1		T25	6
index[0x2]	193	1			T1	2		T17	1		T5	1
index[0x3]	142	1			T2	1		T13	1		T21	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	252	1			T1	3		T20	1		T45	1
lens_less_than_1000[1]	111	1			T17	1		T25	4		T62	1
lens_less_than_1000[2]	96	1			T20	1		T61	1		T264	1
lens_less_than_1000[3]	64	1			T25	1		T62	1		T245	1
lens_less_than_1000[4]	54	1			T2	1		T13	1		T25	1
lens_less_than_1000[5]	32	1			T21	1		T25	1		T52	4
lens_less_than_1000[6]	26	1			T25	1		T75	1		T265	1
lens_less_than_1000[7]	24	1			T5	2		T26	2		T29	1
lens_less_than_1000[8]	9	1			T47	1		T25	2		T113	1
lens_less_than_1000[9]	5	1			T59	3		T266	1		T267	1
len_2	8	1			T248	1		T268	1		T84	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	3	41	93.18	3

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0] , index[0x1]]	[lens_less_than_1000[9]]	--	--	2
[index[0x3]]	[lens_less_than_1000[9]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	64	1			T1	1		T45	1		T70	1
index[0x0]	lens_less_than_1000[1]	30	1			T247	1		T27	1		T65	1
index[0x0]	lens_less_than_1000[2]	25	1			T20	1		T32	1		T269	1
index[0x0]	lens_less_than_1000[3]	14	1			T62	1		T66	1		T79	1
index[0x0]	lens_less_than_1000[4]	7	1			T25	1		T26	1		T270	1
index[0x0]	lens_less_than_1000[5]	11	1			T52	3		T99	1		T107	1
index[0x0]	lens_less_than_1000[6]	7	1			T75	1		T87	1		T88	1
index[0x0]	lens_less_than_1000[7]	3	1			T112	1		T271	1		T257	1
index[0x0]	lens_less_than_1000[8]	2	1			T272	1		T273	1		-	-
index[0x0]	len_2	1	1			T243	1		-	-		-	-
index[0x1]	lens_less_than_1000[0]	66	1			T20	1		T25	1		T274	1
index[0x1]	lens_less_than_1000[1]	31	1			T25	4		T62	1		T64	2
index[0x1]	lens_less_than_1000[2]	23	1			T49	1		T181	1		T113	1
index[0x1]	lens_less_than_1000[3]	23	1			T245	1		T31	1		T39	1
index[0x1]	lens_less_than_1000[4]	17	1			T51	1		T39	1		T275	4
index[0x1]	lens_less_than_1000[5]	8	1			T52	1		T181	1		T276	1
index[0x1]	lens_less_than_1000[6]	5	1			T25	1		T265	1		T243	2
index[0x1]	lens_less_than_1000[7]	5	1			T5	1		T113	1		T251	1
index[0x1]	lens_less_than_1000[8]	3	1			T277	1		T273	1		T244	1
index[0x1]	len_2	1	1			T248	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	70	1			T1	2		T46	1		T61	1
index[0x2]	lens_less_than_1000[1]	31	1			T17	1		T32	2		T51	1
index[0x2]	lens_less_than_1000[2]	26	1			T61	1		T264	1		T278	1
index[0x2]	lens_less_than_1000[3]	15	1			T25	1		T70	1		T76	1
index[0x2]	lens_less_than_1000[4]	10	1			T26	1		T51	1		T266	1
index[0x2]	lens_less_than_1000[5]	6	1			T279	1		T280	1		T251	1
index[0x2]	lens_less_than_1000[6]	11	1			T281	1		T87	1		T282	3
index[0x2]	lens_less_than_1000[7]	13	1			T5	1		T26	2		T29	1
index[0x2]	lens_less_than_1000[8]	2	1			T25	1		T113	1		-	-
index[0x2]	lens_less_than_1000[9]	5	1			T59	3		T266	1		T267	1
index[0x2]	len_2	4	1			T283	1		T272	1		T277	1
index[0x3]	lens_less_than_1000[0]	52	1			T15	1		T70	2		T27	1
index[0x3]	lens_less_than_1000[1]	19	1			T68	1		T284	1		T248	1
index[0x3]	lens_less_than_1000[2]	22	1			T285	1		T66	1		T163	1
index[0x3]	lens_less_than_1000[3]	12	1			T286	1		T199	1		T287	1
index[0x3]	lens_less_than_1000[4]	20	1			T2	1		T13	1		T29	4
index[0x3]	lens_less_than_1000[5]	7	1			T21	1		T25	1		T241	1
index[0x3]	lens_less_than_1000[6]	3	1			T271	1		T288	1		T203	1
index[0x3]	lens_less_than_1000[7]	3	1			T289	1		T257	1		T290	1
index[0x3]	lens_less_than_1000[8]	2	1			T47	1		T25	1		-	-
index[0x3]	len_2	2	1			T268	1		T84	1		-	-