Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
93.22	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	4	40	90.91

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	4	40	90.91	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	181	1			T15	1		T16	1		T11	1
index[0x1]	171	1			T16	3		T20	1		T46	1
index[0x2]	193	1			T4	1		T15	1		T16	1
index[0x3]	164	1			T15	1		T12	1		T5	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	196	1			T15	2		T16	4		T20	1
lens_less_than_1000[1]	140	1			T12	1		T237	1		T19	2
lens_less_than_1000[2]	102	1			T4	1		T15	1		T12	1
lens_less_than_1000[3]	75	1			T16	1		T11	1		T5	1
lens_less_than_1000[4]	58	1			T5	1		T20	1		T49	1
lens_less_than_1000[5]	48	1			T19	2		T24	1		T22	2
lens_less_than_1000[6]	50	1			T46	1		T19	1		T51	1
lens_less_than_1000[7]	23	1			T57	2		T58	1		T81	3
lens_less_than_1000[8]	10	1			T24	2		T54	1		T81	1
lens_less_than_1000[9]	2	1			T22	1		T60	1		-	-
len_2	5	1			T274	1		T275	3		T276	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	4	40	90.91	4

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0]]	[lens_less_than_1000[9]]	0	1	1
[index[0x1]]	[lens_less_than_1000[8]]	0	1	1
[index[0x2]]	[lens_less_than_1000[9] , len_2]	--	--	2

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	46	1			T15	1		T16	1		T19	1
index[0x0]	lens_less_than_1000[1]	40	1			T237	1		T26	1		T55	1
index[0x0]	lens_less_than_1000[2]	40	1			T12	1		T20	1		T22	1
index[0x0]	lens_less_than_1000[3]	19	1			T11	1		T55	1		T76	1
index[0x0]	lens_less_than_1000[4]	16	1			T49	1		T51	1		T26	1
index[0x0]	lens_less_than_1000[5]	8	1			T24	1		T28	1		T52	2
index[0x0]	lens_less_than_1000[6]	7	1			T46	1		T19	1		T224	1
index[0x0]	lens_less_than_1000[7]	1	1			T277	1		-	-		-	-
index[0x0]	lens_less_than_1000[8]	3	1			T24	1		T81	1		T278	1
index[0x0]	len_2	1	1			T276	1		-	-		-	-
index[0x1]	lens_less_than_1000[0]	55	1			T16	3		T20	1		T46	1
index[0x1]	lens_less_than_1000[1]	37	1			T26	2		T79	2		T86	2
index[0x1]	lens_less_than_1000[2]	20	1			T226	1		T94	1		T34	1
index[0x1]	lens_less_than_1000[3]	23	1			T55	1		T106	2		T279	1
index[0x1]	lens_less_than_1000[4]	12	1			T279	1		T110	2		T116	1
index[0x1]	lens_less_than_1000[5]	12	1			T22	1		T55	1		T69	1
index[0x1]	lens_less_than_1000[6]	4	1			T52	1		T280	1		T281	1
index[0x1]	lens_less_than_1000[7]	6	1			T58	1		T37	1		T282	1
index[0x1]	lens_less_than_1000[9]	1	1			T60	1		-	-		-	-
index[0x1]	len_2	1	1			T274	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	52	1			T46	1		T19	1		T55	1
index[0x2]	lens_less_than_1000[1]	30	1			T25	3		T55	1		T283	1
index[0x2]	lens_less_than_1000[2]	22	1			T4	1		T15	1		T46	1
index[0x2]	lens_less_than_1000[3]	19	1			T16	1		T5	1		T51	1
index[0x2]	lens_less_than_1000[4]	22	1			T20	1		T28	1		T30	2
index[0x2]	lens_less_than_1000[5]	17	1			T22	1		T28	1		T55	1
index[0x2]	lens_less_than_1000[6]	24	1			T52	1		T284	1		T79	1
index[0x2]	lens_less_than_1000[7]	6	1			T57	1		T81	2		T285	1
index[0x2]	lens_less_than_1000[8]	1	1			T54	1		-	-		-	-
index[0x3]	lens_less_than_1000[0]	43	1			T15	1		T45	1		T28	1
index[0x3]	lens_less_than_1000[1]	33	1			T12	1		T19	2		T51	1
index[0x3]	lens_less_than_1000[2]	20	1			T26	1		T55	1		T75	1
index[0x3]	lens_less_than_1000[3]	14	1			T51	1		T286	1		T60	1
index[0x3]	lens_less_than_1000[4]	8	1			T5	1		T22	1		T26	1
index[0x3]	lens_less_than_1000[5]	11	1			T19	2		T71	1		T61	1
index[0x3]	lens_less_than_1000[6]	15	1			T51	1		T62	2		T178	1
index[0x3]	lens_less_than_1000[7]	10	1			T57	1		T81	1		T96	1
index[0x3]	lens_less_than_1000[8]	6	1			T24	1		T287	5		-	-
index[0x3]	lens_less_than_1000[9]	1	1			T22	1		-	-		-	-
index[0x3]	len_2	3	1			T275	3		-	-		-	-