Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
96.61	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	2	42	95.45

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	2	42	95.45	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	157	1			T1	1		T4	1		T6	1
index[0x1]	150	1			T6	1		T18	1		T15	1
index[0x2]	167	1			T15	2		T73	2		T74	1
index[0x3]	182	1			T9	1		T16	1		T74	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	214	1			T1	1		T4	1		T16	1
lens_less_than_1000[1]	125	1			T43	1		T15	1		T74	2
lens_less_than_1000[2]	69	1			T29	1		T86	1		T116	1
lens_less_than_1000[3]	67	1			T74	3		T26	1		T30	1
lens_less_than_1000[4]	53	1			T6	1		T27	2		T30	1
lens_less_than_1000[5]	52	1			T8	2		T74	1		T30	1
lens_less_than_1000[6]	33	1			T6	1		T73	2		T27	2
lens_less_than_1000[7]	19	1			T9	1		T15	2		T243	1
lens_less_than_1000[8]	11	1			T74	1		T27	1		T244	1
lens_less_than_1000[9]	3	1			T245	1		T246	1		T247	1
len_2	10	1			T18	1		T64	1		T248	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	2	42	95.45	2

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x1] , index[0x2]]	[lens_less_than_1000[9]]	--	--	2

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	43	1			T1	1		T4	1		T15	1
index[0x0]	lens_less_than_1000[1]	30	1			T43	1		T30	2		T86	2
index[0x0]	lens_less_than_1000[2]	21	1			T249	1		T87	2		T250	1
index[0x0]	lens_less_than_1000[3]	16	1			T74	1		T78	1		T24	1
index[0x0]	lens_less_than_1000[4]	18	1			T27	1		T52	1		T238	1
index[0x0]	lens_less_than_1000[5]	11	1			T8	1		T74	1		T251	1
index[0x0]	lens_less_than_1000[6]	8	1			T6	1		T114	1		T252	1
index[0x0]	lens_less_than_1000[7]	4	1			T15	1		T253	1		T252	1
index[0x0]	lens_less_than_1000[8]	2	1			T254	1		T255	1		-	-
index[0x0]	lens_less_than_1000[9]	2	1			T245	1		T247	1		-	-
index[0x0]	len_2	2	1			T256	1		T257	1		-	-
index[0x1]	lens_less_than_1000[0]	42	1			T15	1		T23	1		T67	1
index[0x1]	lens_less_than_1000[1]	43	1			T27	1		T65	1		T48	1
index[0x1]	lens_less_than_1000[2]	18	1			T29	1		T258	1		T24	2
index[0x1]	lens_less_than_1000[3]	22	1			T74	2		T67	1		T84	1
index[0x1]	lens_less_than_1000[4]	7	1			T6	1		T53	1		T252	1
index[0x1]	lens_less_than_1000[5]	6	1			T8	1		T116	1		T106	1
index[0x1]	lens_less_than_1000[6]	3	1			T259	1		T260	1		T261	1
index[0x1]	lens_less_than_1000[7]	4	1			T262	1		T237	1		T263	1
index[0x1]	lens_less_than_1000[8]	3	1			T74	1		T27	1		T264	1
index[0x1]	len_2	2	1			T18	1		T265	1		-	-
index[0x2]	lens_less_than_1000[0]	68	1			T86	1		T48	1		T37	1
index[0x2]	lens_less_than_1000[1]	25	1			T15	1		T74	1		T57	1
index[0x2]	lens_less_than_1000[2]	17	1			T116	1		T106	1		T266	1
index[0x2]	lens_less_than_1000[3]	12	1			T254	1		T267	1		T268	2
index[0x2]	lens_less_than_1000[4]	11	1			T50	1		T97	1		T55	1
index[0x2]	lens_less_than_1000[5]	9	1			T254	1		T259	1		T269	1
index[0x2]	lens_less_than_1000[6]	14	1			T73	2		T30	1		T54	1
index[0x2]	lens_less_than_1000[7]	4	1			T15	1		T239	1		T270	1
index[0x2]	lens_less_than_1000[8]	3	1			T244	1		T271	1		T272	1
index[0x2]	len_2	4	1			T64	1		T248	1		T273	1
index[0x3]	lens_less_than_1000[0]	61	1			T16	1		T26	1		T67	1
index[0x3]	lens_less_than_1000[1]	27	1			T74	1		T116	1		T109	2
index[0x3]	lens_less_than_1000[2]	13	1			T86	1		T239	1		T90	1
index[0x3]	lens_less_than_1000[3]	17	1			T26	1		T30	1		T274	1
index[0x3]	lens_less_than_1000[4]	17	1			T27	1		T30	1		T63	1
index[0x3]	lens_less_than_1000[5]	26	1			T30	1		T48	1		T36	1
index[0x3]	lens_less_than_1000[6]	8	1			T27	2		T93	1		T275	1
index[0x3]	lens_less_than_1000[7]	7	1			T9	1		T243	1		T90	1
index[0x3]	lens_less_than_1000[8]	3	1			T276	2		T277	1		-	-
index[0x3]	lens_less_than_1000[9]	1	1			T246	1		-	-		-	-
index[0x3]	len_2	2	1			T278	1		T112	1		-	-