Unified Coverage Report :: Group :: dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg

Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	99.77	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_lockable_field_cov.sv

218 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a	50.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_13.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_14.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_15.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_16.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_17.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_18.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_19.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_2.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_20.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_21.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_22.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_23.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_24.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_25.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_26.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_27.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_28.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_29.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_3.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_30.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_31.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_32.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_33.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_34.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_35.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_36.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_37.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_38.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_39.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_4.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_40.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_41.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_42.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_43.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_44.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_45.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_46.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_47.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_48.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_49.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_5.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_50.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_51.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_52.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_53.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_54.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_55.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_56.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_57.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_59.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_6.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_60.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_61.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_62.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_63.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_64.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_7.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_8.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_9.en_a	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_accum_thresh_shadowed.classa_accum_thresh_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_clr_shadowed.classa_clr_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_crashdump_trigger_shadowed.classa_crashdump_trigger_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e0	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e1	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e2	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e3	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.lock	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e0	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e1	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e2	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e3	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_phase0_cyc_shadowed.classa_phase0_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_phase1_cyc_shadowed.classa_phase1_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_phase2_cyc_shadowed.classa_phase2_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_phase3_cyc_shadowed.classa_phase3_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classa_timeout_cyc_shadowed.classa_timeout_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_accum_thresh_shadowed.classb_accum_thresh_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_clr_shadowed.classb_clr_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_crashdump_trigger_shadowed.classb_crashdump_trigger_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e0	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e1	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e2	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e3	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.lock	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e0	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e1	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e2	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e3	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_phase0_cyc_shadowed.classb_phase0_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_phase1_cyc_shadowed.classb_phase1_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_phase2_cyc_shadowed.classb_phase2_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_phase3_cyc_shadowed.classb_phase3_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classb_timeout_cyc_shadowed.classb_timeout_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_accum_thresh_shadowed.classc_accum_thresh_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_clr_shadowed.classc_clr_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_crashdump_trigger_shadowed.classc_crashdump_trigger_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e0	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e1	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e2	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e3	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.lock	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e0	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e1	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e2	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e3	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_phase0_cyc_shadowed.classc_phase0_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_phase1_cyc_shadowed.classc_phase1_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_phase2_cyc_shadowed.classc_phase2_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_phase3_cyc_shadowed.classc_phase3_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classc_timeout_cyc_shadowed.classc_timeout_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_accum_thresh_shadowed.classd_accum_thresh_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_clr_shadowed.classd_clr_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_crashdump_trigger_shadowed.classd_crashdump_trigger_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e0	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e1	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e2	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e3	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.lock	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e0	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e1	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e2	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e3	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_phase0_cyc_shadowed.classd_phase0_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_phase1_cyc_shadowed.classd_phase1_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_phase2_cyc_shadowed.classd_phase2_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_phase3_cyc_shadowed.classd_phase3_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.classd_timeout_cyc_shadowed.classd_timeout_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_0.class_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_1.class_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_2.class_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_3.class_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_4.class_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_5.class_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_6.class_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_0.en_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_1.en_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_2.en_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_3.en_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_4.en_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_5.en_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_6.en_la	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.ping_timeout_cyc_shadowed.ping_timeout_cyc_shadowed	100.00	1	100	1	64	64
lockable_field_cov_of_alert_handler_reg_block.ping_timer_en_shadowed.ping_timer_en_shadowed	100.00	1	100	1	64	64

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

19

1

T134

8

T136

3

T147

4

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

565

1

T184

2

T203

128

T194

30

auto[1]

569

1

T182

2

T183

2

T159

7

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

330

1

T182

1

T183

1

T184

2

auto[1]

727

1

T183

1

T203

64

T159

5

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

386

1

T183

1

T184

1

T203

64

auto[1]

635

1

T182

2

T203

64

T159

8

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

401

1

T182

1

T203

64

T159

3

auto[1]

597

1

T182

1

T183

2

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

508

1

T183

1

T203

128

T159

1

auto[1]

984

1

T159

6

T127

5

T160

8

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

371

1

T203

128

T160

3

T161

5

auto[1]

543

1

T182

2

T183

2

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

604

1

T184

1

T203

128

T159

2

auto[1]

744

1

T182

2

T184

1

T159

3

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

367

1

T184

1

T203

128

T159

1

auto[1]

478

1

T182

2

T183

2

T159

5

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

383

1

T182

1

T184

2

T203

64

auto[1]

856

1

T182

1

T183

2

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

667

1

T182

1

T183

1

T203

64

auto[1]

632

1

T182

1

T183

1

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

590

1

T183

1

T203

64

T159

2

auto[1]

994

1

T182

2

T184

1

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

332

1

T184

1

T203

64

T159

4

auto[1]

427

1

T182

1

T183

1

T184

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

442

1

T183

1

T184

1

T203

64

auto[1]

541

1

T182

2

T183

1

T184

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

670

1

T183

2

T203

128

T160

5

auto[1]

325

1

T182

1

T184

2

T159

9

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

519

1

T182

2

T183

1

T203

128

auto[1]

285

1

T183

1

T184

2

T159

6

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

599

1

T182

1

T183

2

T184

1

auto[1]

182

1

T159

6

T127

8

T124

5

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

685

1

T183

1

T203

64

T159

1

auto[1]

668

1

T182

1

T183

1

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

536

1

T183

2

T203

64

T159

5

auto[1]

329

1

T182

1

T184

1

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

477

1

T183

2

T203

64

T160

3

auto[1]

829

1

T182

2

T203

64

T159

6

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

524

1

T203

128

T159

5

T160

1

auto[1]

244

1

T182

2

T183

2

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

383

1

T183

1

T203

128

T159

2

auto[1]

955

1

T182

2

T183

1

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

505

1

T183

1

T203

128

T159

2

auto[1]

369

1

T182

2

T183

1

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

564

1

T182

2

T183

1

T203

128

auto[1]

817

1

T183

1

T184

2

T159

4

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

450

1

T182

1

T183

1

T184

2

auto[1]

589

1

T183

1

T159

8

T127

3

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

664

1

T182

1

T184

1

T203

128

auto[1]

627

1

T183

2

T159

4

T127

7

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

487

1

T182

1

T183

2

T203

64

auto[1]

574

1

T184

2

T203

64

T159

7

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

611

1

T184

1

T203

128

T159

1

auto[1]

1220

1

T182

2

T183

2

T184

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

376

1

T183

2

T203

128

T159

2

auto[1]

571

1

T182

2

T184

2

T159

5

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

514

1

T182

1

T184

1

T203

64

auto[1]

349

1

T182

1

T183

2

T184

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

249

1

T182

1

T203

64

T159

1

auto[1]

647

1

T183

2

T184

2

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

461

1

T183

2

T184

1

T203

64

auto[1]

870

1

T182

2

T184

1

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

402

1

T183

2

T184

1

T203

64

auto[1]

369

1

T182

1

T203

64

T159

3

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

562

1

T182

2

T183

2

T203

128

auto[1]

287

1

T184

2

T159

7

T127

4

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

408

1

T183

1

T184

1

T203

64

auto[1]

425

1

T182

1

T184

1

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

461

1

T203

128

T159

2

T160

3

auto[1]

1050

1

T182

1

T183

2

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

383

1

T184

1

T203

64

T159

4

auto[1]

381

1

T182

2

T183

2

T184

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

384

1

T203

128

T159

1

T160

1

auto[1]

810

1

T183

2

T184

1

T159

6

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

506

1

T183

2

T203

128

T160

2

auto[1]

243

1

T182

2

T184

2

T159

7

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

347

1

T182

1

T203

64

T159

1

auto[1]

760

1

T182

1

T184

2

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

524

1

T183

1

T184

1

T203

128

auto[1]

473

1

T182

2

T183

1

T184

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

512

1

T183

2

T184

1

T203

128

auto[1]

768

1

T182

2

T159

7

T194

260

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

750

1

T203

128

T159

2

T160

2

auto[1]

328

1

T182

2

T183

2

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

524

1

T183

2

T184

1

T203

64

auto[1]

366

1

T182

1

T184

1

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

453

1

T183

1

T203

64

T159

2

auto[1]

322

1

T182

2

T183

1

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

743

1

T182

1

T203

128

T159

2

auto[1]

299

1

T182

1

T183

2

T159

6

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

319

1

T184

1

T203

64

T159

2

auto[1]

760

1

T182

1

T183

2

T184

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

582

1

T182

1

T183

1

T203

128

auto[1]

865

1

T182

1

T183

1

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

515

1

T203

64

T159

1

T160

2

auto[1]

500

1

T183

2

T184

2

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

447

1

T184

1

T203

64

T159

4

auto[1]

300

1

T182

2

T183

2

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

529

1

T184

1

T203

128

T159

1

auto[1]

256

1

T182

2

T183

2

T159

5

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

326

1

T184

2

T203

64

T159

3

auto[1]

651

1

T182

2

T203

64

T159

3

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

497

1

T184

2

T203

64

T194

108

auto[1]

383

1

T182

1

T183

1

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

503

1

T182

1

T184

1

T203

128

auto[1]

681

1

T182

1

T183

2

T184

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

622

1

T183

1

T184

1

T203

128

auto[1]

716

1

T182

2

T183

1

T184

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

389

1

T182

2

T183

2

T184

1

auto[1]

382

1

T203

64

T159

4

T127

4

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

320

1

T183

2

T184

2

T203

64

auto[1]

738

1

T182

1

T203

64

T159

3

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

306

1

T182

1

T184

2

T203

64

auto[1]

492

1

T182

1

T183

1

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

442

1

T183

2

T203

64

T159

3

auto[1]

627

1

T182

1

T203

64

T159

4

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

330

1

T183

1

T184

1

T203

64

auto[1]

418

1

T182

1

T184

1

T203

64

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

368

1

T182

2

T203

128

T159

2

auto[1]

388

1

T184

2

T159

7

T160

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

655

1

T183

1

T203

128

T159

2

auto[1]

429

1

T182

2

T183

1

T184

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

390

1

T183

2

T184

1

T203

128

auto[1]

615

1

T182

1

T184

1

T159

7

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

426

1

T183

2

T203

64

T159

1

auto[1]

750

1

T184

2

T203

64

T159

7

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

474

1

T183

1

T203

128

T159

2

auto[1]

639

1

T182

2

T183

1

T184

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

624

1

T184

1

T203

128

T159

1

auto[1]

639

1

T182

2

T183

2

T159

6

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

25

1

T128

3

T135

2

T146

5

auto[1]

42

1

T128

1

T134

1

T133

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

31

1

T128

1

T137

4

T129

3

auto[1]

61

1

T124

6

T126

7

T128

4

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

12

1

T137

1

T138

1

T149

1

auto[1]

65

1

T124

3

T137

3

T141

5

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14

1

T125

1

T128

2

T138

2

auto[1]

63

1

T127

5

T125

5

T128

5