Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
98.31	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	1	43	97.73

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	1	43	97.73	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	164	1			T33	1		T18	1		T22	4
index[0x1]	152	1			T9	1		T22	1		T53	1
index[0x2]	177	1			T14	2		T18	1		T22	2
index[0x3]	172	1			T1	1		T2	1		T14	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	203	1			T1	1		T2	1		T17	1
lens_less_than_1000[1]	142	1			T14	2		T18	1		T22	2
lens_less_than_1000[2]	97	1			T9	1		T17	2		T38	1
lens_less_than_1000[3]	65	1			T29	1		T52	1		T54	1
lens_less_than_1000[4]	41	1			T18	1		T22	1		T38	1
lens_less_than_1000[5]	46	1			T17	1		T33	1		T55	1
lens_less_than_1000[6]	28	1			T14	1		T22	1		T61	1
lens_less_than_1000[7]	21	1			T22	1		T53	1		T73	1
lens_less_than_1000[8]	11	1			T19	1		T79	1		T47	1
lens_less_than_1000[9]	5	1			T22	1		T19	1		T271	1
len_2	6	1			T100	1		T49	1		T86	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	1	43	97.73	1

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x3]]	[lens_less_than_1000[9]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	48	1			T18	1		T22	2		T58	1
index[0x0]	lens_less_than_1000[1]	43	1			T22	1		T63	1		T20	1
index[0x0]	lens_less_than_1000[2]	27	1			T38	1		T21	1		T188	1
index[0x0]	lens_less_than_1000[3]	16	1			T52	1		T246	1		T272	1
index[0x0]	lens_less_than_1000[4]	10	1			T224	1		T80	1		T85	1
index[0x0]	lens_less_than_1000[5]	5	1			T33	1		T273	1		T15	1
index[0x0]	lens_less_than_1000[6]	6	1			T44	1		T224	1		T274	1
index[0x0]	lens_less_than_1000[7]	2	1			T80	1		T275	1		-	-
index[0x0]	lens_less_than_1000[8]	5	1			T19	1		T79	1		T276	1
index[0x0]	lens_less_than_1000[9]	1	1			T22	1		-	-		-	-
index[0x0]	len_2	1	1			T100	1		-	-		-	-
index[0x1]	lens_less_than_1000[0]	52	1			T20	1		T42	1		T66	1
index[0x1]	lens_less_than_1000[1]	24	1			T246	1		T67	1		T69	1
index[0x1]	lens_less_than_1000[2]	26	1			T9	1		T75	1		T277	1
index[0x1]	lens_less_than_1000[3]	13	1			T273	1		T278	1		T46	1
index[0x1]	lens_less_than_1000[4]	9	1			T40	1		T279	1		T218	1
index[0x1]	lens_less_than_1000[5]	9	1			T67	1		T45	1		T84	1
index[0x1]	lens_less_than_1000[6]	10	1			T22	1		T73	1		T234	1
index[0x1]	lens_less_than_1000[7]	3	1			T53	1		T73	1		T181	1
index[0x1]	lens_less_than_1000[8]	2	1			T47	1		T275	1		-	-
index[0x1]	lens_less_than_1000[9]	1	1			T271	1		-	-		-	-
index[0x1]	len_2	3	1			T280	3		-	-		-	-
index[0x2]	lens_less_than_1000[0]	45	1			T38	1		T192	1		T42	1
index[0x2]	lens_less_than_1000[1]	37	1			T14	2		T22	1		T58	1
index[0x2]	lens_less_than_1000[2]	28	1			T20	1		T159	1		T68	1
index[0x2]	lens_less_than_1000[3]	15	1			T69	1		T224	1		T274	1
index[0x2]	lens_less_than_1000[4]	13	1			T18	1		T281	1		T273	1
index[0x2]	lens_less_than_1000[5]	17	1			T55	1		T65	1		T282	2
index[0x2]	lens_less_than_1000[6]	6	1			T61	1		T283	3		T259	1
index[0x2]	lens_less_than_1000[7]	10	1			T22	1		T44	1		T94	4
index[0x2]	lens_less_than_1000[8]	2	1			T182	1		T284	1		-	-
index[0x2]	lens_less_than_1000[9]	3	1			T19	1		T255	2		-	-
index[0x2]	len_2	1	1			T49	1		-	-		-	-
index[0x3]	lens_less_than_1000[0]	58	1			T1	1		T2	1		T17	1
index[0x3]	lens_less_than_1000[1]	38	1			T18	1		T38	1		T55	1
index[0x3]	lens_less_than_1000[2]	16	1			T17	2		T89	1		T243	1
index[0x3]	lens_less_than_1000[3]	21	1			T29	1		T54	1		T285	1
index[0x3]	lens_less_than_1000[4]	9	1			T22	1		T38	1		T19	1
index[0x3]	lens_less_than_1000[5]	15	1			T17	1		T68	1		T286	1
index[0x3]	lens_less_than_1000[6]	6	1			T14	1		T65	1		T287	1
index[0x3]	lens_less_than_1000[7]	6	1			T41	1		T288	2		T289	1
index[0x3]	lens_less_than_1000[8]	2	1			T284	1		T290	1		-	-
index[0x3]	len_2	1	1			T86	1		-	-		-	-