Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::alert_cause_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::alert_cause_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::alert_cause_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	69	0	69	100.00
Crosses	260	0	260	100.00

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::alert_cause_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
alert_cause_cp	65	0	65	100.00	100	1	1	0
class_index_cp	4	0	4	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::alert_cause_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
alert_cause_cross_class_index	260	0	260	100.00	100	1	1	0

Summary for Variable alert_cause_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	65	0	65	100.00

User Defined Bins for alert_cause_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
il	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
alert[0x0]	31516	1			T1	1		T2	42		T3	1
alert[0x1]	29198	1			T3	4		T4	199		T9	36
alert[0x2]	32694	1			T1	1		T3	3		T4	191
alert[0x3]	32617	1			T2	1		T3	2		T4	199
alert[0x4]	33355	1			T1	2		T3	1		T4	178
alert[0x5]	35199	1			T4	172		T9	55		T7	243
alert[0x6]	36695	1			T1	1		T2	52		T4	192
alert[0x7]	36042	1			T1	4		T2	37		T3	3
alert[0x8]	35483	1			T2	46		T3	1		T4	215
alert[0x9]	29142	1			T3	1		T4	203		T9	100
alert[0xa]	35889	1			T1	1		T2	40		T3	4
alert[0xb]	34901	1			T1	1		T2	1		T4	170
alert[0xc]	33923	1			T2	44		T3	2		T4	187
alert[0xd]	31824	1			T1	1		T2	45		T3	2
alert[0xe]	29647	1			T1	1		T2	38		T4	183
alert[0xf]	30477	1			T1	2		T2	42		T4	183
alert[0x10]	30758	1			T3	3		T4	199		T9	49
alert[0x11]	30653	1			T1	2		T2	40		T3	2
alert[0x12]	30043	1			T1	1		T2	1		T4	195
alert[0x13]	36289	1			T1	2		T2	45		T3	2
alert[0x14]	36675	1			T2	44		T3	1		T4	193
alert[0x15]	33335	1			T1	3		T3	1		T4	175
alert[0x16]	35599	1			T2	1		T3	1		T4	177
alert[0x17]	30821	1			T1	1		T3	1		T4	188
alert[0x18]	29372	1			T1	1		T2	39		T4	189
alert[0x19]	34008	1			T1	2		T2	43		T3	2
alert[0x1a]	29860	1			T1	2		T2	49		T3	2
alert[0x1b]	32540	1			T2	42		T4	225		T9	62
alert[0x1c]	32031	1			T1	3		T2	38		T4	195
alert[0x1d]	35731	1			T2	1		T3	2		T4	187
alert[0x1e]	34226	1			T1	2		T2	39		T3	3
alert[0x1f]	35049	1			T1	1		T2	42		T3	3
alert[0x20]	28559	1			T1	2		T3	3		T4	192
alert[0x21]	29773	1			T1	1		T3	3		T4	177
alert[0x22]	31078	1			T1	3		T2	1		T3	2
alert[0x23]	28549	1			T2	2		T3	1		T4	192
alert[0x24]	30716	1			T3	4		T4	211		T9	59
alert[0x25]	30529	1			T3	4		T4	196		T9	64
alert[0x26]	32629	1			T1	5		T4	199		T9	55
alert[0x27]	31673	1			T2	43		T3	1		T4	191
alert[0x28]	33954	1			T1	1		T2	41		T3	1
alert[0x29]	33455	1			T1	1		T2	47		T4	204
alert[0x2a]	32810	1			T2	1		T3	5		T4	193
alert[0x2b]	32892	1			T1	2		T2	48		T3	1
alert[0x2c]	35133	1			T1	2		T2	38		T3	2
alert[0x2d]	33739	1			T2	46		T3	3		T4	196
alert[0x2e]	34809	1			T3	1		T4	192		T9	70
alert[0x2f]	31369	1			T1	3		T2	38		T4	194
alert[0x30]	33017	1			T1	2		T2	2		T4	181
alert[0x31]	32296	1			T2	42		T4	207		T9	59
alert[0x32]	30155	1			T1	3		T3	1		T4	199
alert[0x33]	32616	1			T4	183		T9	61		T18	608
alert[0x34]	28233	1			T1	2		T3	3		T4	187
alert[0x35]	28916	1			T3	1		T4	194		T9	76
alert[0x36]	33849	1			T2	48		T3	2		T4	199
alert[0x37]	30952	1			T3	2		T4	205		T9	92
alert[0x38]	32668	1			T1	1		T2	1		T3	1
alert[0x39]	32186	1			T1	2		T2	47		T3	2
alert[0x3a]	31096	1			T1	2		T3	2		T4	216
alert[0x3b]	28912	1			T1	2		T2	43		T3	3
alert[0x3c]	30647	1			T1	1		T2	1		T4	194
alert[0x3d]	31387	1			T1	2		T2	1		T4	179
alert[0x3e]	31533	1			T1	1		T2	1		T4	188
alert[0x3f]	29810	1			T2	48		T3	5		T4	176
alert[0x40]	30193	1			T3	2		T4	204		T9	31

---

Summary for Variable class_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for class_index_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
il	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
class_i[0x0]	585023	1			T1	22		T2	133		T3	22
class_i[0x1]	502319	1			T1	26		T2	223		T3	24
class_i[0x2]	500937	1			T1	12		T2	423		T3	32
class_i[0x3]	507446	1			T1	13		T2	572		T3	24

---

Summary for Cross alert_cause_cross_class_index

Samples crossed: alert_cause_cp class_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	260	0	260	100.00

Automatically Generated Cross Bins for alert_cause_cross_class_index

Bins

alert_cause_cp	class_index_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
alert[0x0]	class_i[0x0]	9809	1			T2	42		T9	1		T18	107
alert[0x0]	class_i[0x1]	7040	1			T1	1		T3	1		T4	1
alert[0x0]	class_i[0x2]	8131	1			T18	135		T15	4		T16	23
alert[0x0]	class_i[0x3]	6536	1			T4	218		T18	2		T16	1
alert[0x1]	class_i[0x0]	7872	1			T4	198		T18	24		T20	28
alert[0x1]	class_i[0x1]	7744	1			T18	57		T16	39		T25	1
alert[0x1]	class_i[0x2]	6156	1			T3	4		T9	1		T7	244
alert[0x1]	class_i[0x3]	7426	1			T4	1		T9	35		T18	2
alert[0x2]	class_i[0x0]	6491	1			T3	2		T9	61		T18	349
alert[0x2]	class_i[0x1]	8833	1			T4	191		T16	19		T25	96
alert[0x2]	class_i[0x2]	9799	1			T1	1		T3	1		T9	2
alert[0x2]	class_i[0x3]	7571	1			T9	5		T7	245		T18	2
alert[0x3]	class_i[0x0]	10862	1			T4	199		T9	2		T18	258
alert[0x3]	class_i[0x1]	8472	1			T3	1		T9	1		T20	3
alert[0x3]	class_i[0x2]	6159	1			T18	69		T31	1		T16	2
alert[0x3]	class_i[0x3]	7124	1			T2	1		T3	1		T9	88
alert[0x4]	class_i[0x0]	11037	1			T1	2		T4	1		T9	118
alert[0x4]	class_i[0x1]	8086	1			T9	31		T18	15		T15	1
alert[0x4]	class_i[0x2]	7506	1			T3	1		T31	5		T16	23
alert[0x4]	class_i[0x3]	6726	1			T4	177		T9	1		T20	18
alert[0x5]	class_i[0x0]	9388	1			T4	172		T9	1		T18	232
alert[0x5]	class_i[0x1]	6460	1			T20	19		T16	2		T47	4
alert[0x5]	class_i[0x2]	9034	1			T9	29		T18	233		T31	1
alert[0x5]	class_i[0x3]	10317	1			T9	25		T7	243		T18	1
alert[0x6]	class_i[0x0]	11323	1			T9	81		T18	200		T16	48
alert[0x6]	class_i[0x1]	9139	1			T1	1		T4	192		T9	1
alert[0x6]	class_i[0x2]	8520	1			T9	2		T18	50		T16	5
alert[0x6]	class_i[0x3]	7713	1			T2	52		T18	4		T16	67
alert[0x7]	class_i[0x0]	9824	1			T4	208		T9	1		T18	375
alert[0x7]	class_i[0x1]	8940	1			T9	61		T31	3		T16	59
alert[0x7]	class_i[0x2]	9579	1			T1	4		T18	1		T20	19
alert[0x7]	class_i[0x3]	7699	1			T2	37		T3	3		T4	1
alert[0x8]	class_i[0x0]	9372	1			T9	1		T18	188		T16	63
alert[0x8]	class_i[0x1]	9375	1			T9	36		T18	2		T44	1
alert[0x8]	class_i[0x2]	8632	1			T4	215		T9	24		T18	148
alert[0x8]	class_i[0x3]	8104	1			T2	46		T3	1		T18	14
alert[0x9]	class_i[0x0]	8334	1			T9	1		T18	22		T31	1
alert[0x9]	class_i[0x1]	4002	1			T16	2		T48	1		T25	89
alert[0x9]	class_i[0x2]	7150	1			T9	24		T18	79		T16	47
alert[0x9]	class_i[0x3]	9656	1			T3	1		T4	203		T9	75
alert[0xa]	class_i[0x0]	10505	1			T1	1		T3	2		T9	31
alert[0xa]	class_i[0x1]	7948	1			T9	32		T18	1		T31	3
alert[0xa]	class_i[0x2]	8093	1			T4	173		T9	30		T20	18
alert[0xa]	class_i[0x3]	9343	1			T2	40		T3	2		T7	231
alert[0xb]	class_i[0x0]	10187	1			T2	1		T9	48		T7	213
alert[0xb]	class_i[0x1]	8197	1			T16	1		T75	5		T21	201
alert[0xb]	class_i[0x2]	7859	1			T18	1		T16	1		T25	98
alert[0xb]	class_i[0x3]	8658	1			T1	1		T4	170		T9	33
alert[0xc]	class_i[0x0]	10124	1			T9	27		T18	102		T15	4
alert[0xc]	class_i[0x1]	7254	1			T2	44		T18	1		T15	1
alert[0xc]	class_i[0x2]	7322	1			T3	1		T4	187		T9	28
alert[0xc]	class_i[0x3]	9223	1			T3	1		T9	6		T18	84
alert[0xd]	class_i[0x0]	10524	1			T1	1		T3	2		T9	24
alert[0xd]	class_i[0x1]	5493	1			T9	31		T18	148		T31	3
alert[0xd]	class_i[0x2]	7327	1			T2	44		T9	1		T18	12
alert[0xd]	class_i[0x3]	8480	1			T2	1		T4	204		T9	30
alert[0xe]	class_i[0x0]	7055	1			T9	1		T18	28		T31	4
alert[0xe]	class_i[0x1]	6021	1			T1	1		T9	10		T18	1
alert[0xe]	class_i[0x2]	9815	1			T2	38		T9	22		T18	16
alert[0xe]	class_i[0x3]	6756	1			T4	183		T9	1		T7	234
alert[0xf]	class_i[0x0]	9990	1			T1	2		T9	61		T18	396
alert[0xf]	class_i[0x1]	8065	1			T18	13		T16	40		T75	4
alert[0xf]	class_i[0x2]	6052	1			T2	41		T9	1		T18	1
alert[0xf]	class_i[0x3]	6370	1			T2	1		T4	183		T9	32
alert[0x10]	class_i[0x0]	5904	1			T9	14		T18	3		T31	1
alert[0x10]	class_i[0x1]	9164	1			T4	199		T9	34		T18	1
alert[0x10]	class_i[0x2]	8987	1			T3	3		T18	76		T15	3
alert[0x10]	class_i[0x3]	6703	1			T9	1		T18	1		T20	1
alert[0x11]	class_i[0x0]	7493	1			T9	27		T18	1		T16	53
alert[0x11]	class_i[0x1]	6971	1			T4	180		T18	15		T31	1
alert[0x11]	class_i[0x2]	8049	1			T2	39		T9	21		T31	7
alert[0x11]	class_i[0x3]	8140	1			T1	2		T2	1		T3	2
alert[0x12]	class_i[0x0]	8977	1			T1	1		T4	195		T9	2
alert[0x12]	class_i[0x1]	8162	1			T2	1		T9	1		T18	2
alert[0x12]	class_i[0x2]	5849	1			T9	28		T18	2		T31	1
alert[0x12]	class_i[0x3]	7055	1			T9	38		T7	246		T18	133
alert[0x13]	class_i[0x0]	8335	1			T1	1		T9	31		T18	199
alert[0x13]	class_i[0x1]	7230	1			T1	1		T2	45		T4	173
alert[0x13]	class_i[0x2]	10072	1			T16	5		T47	2		T48	1
alert[0x13]	class_i[0x3]	10652	1			T3	2		T9	33		T18	1
alert[0x14]	class_i[0x0]	9202	1			T4	193		T18	168		T16	16
alert[0x14]	class_i[0x1]	8932	1			T3	1		T9	21		T7	213
alert[0x14]	class_i[0x2]	10825	1			T9	8		T18	2		T20	20
alert[0x14]	class_i[0x3]	7716	1			T2	44		T9	22		T16	2
alert[0x15]	class_i[0x0]	10446	1			T1	3		T3	1		T9	6
alert[0x15]	class_i[0x1]	6547	1			T9	25		T18	80		T20	27
alert[0x15]	class_i[0x2]	8094	1			T9	28		T18	75		T16	28
alert[0x15]	class_i[0x3]	8248	1			T4	175		T18	13		T8	1
alert[0x16]	class_i[0x0]	8971	1			T2	1		T9	2		T18	5
alert[0x16]	class_i[0x1]	9347	1			T3	1		T4	177		T9	1
alert[0x16]	class_i[0x2]	7674	1			T18	3		T20	23		T15	2
alert[0x16]	class_i[0x3]	9607	1			T9	33		T18	1		T25	104
alert[0x17]	class_i[0x0]	9004	1			T9	2		T18	410		T16	74
alert[0x17]	class_i[0x1]	8636	1			T1	1		T9	57		T18	73
alert[0x17]	class_i[0x2]	7634	1			T4	188		T9	2		T16	13
alert[0x17]	class_i[0x3]	5547	1			T3	1		T7	227		T18	60
alert[0x18]	class_i[0x0]	6600	1			T4	189		T18	480		T16	50
alert[0x18]	class_i[0x1]	6805	1			T9	25		T16	3		T47	1
alert[0x18]	class_i[0x2]	6612	1			T2	39		T9	22		T20	21
alert[0x18]	class_i[0x3]	9355	1			T1	1		T9	5		T18	1
alert[0x19]	class_i[0x0]	11092	1			T4	193		T9	29		T18	191
alert[0x19]	class_i[0x1]	6676	1			T1	2		T9	1		T16	1
alert[0x19]	class_i[0x2]	6215	1			T2	43		T3	2		T9	1
alert[0x19]	class_i[0x3]	10025	1			T9	27		T18	63		T31	4
alert[0x1a]	class_i[0x0]	9045	1			T1	1		T4	214		T9	38
alert[0x1a]	class_i[0x1]	7711	1			T1	1		T3	1		T9	30
alert[0x1a]	class_i[0x2]	7686	1			T2	49		T3	1		T9	1
alert[0x1a]	class_i[0x3]	5418	1			T9	5		T18	1		T20	1
alert[0x1b]	class_i[0x0]	8198	1			T4	224		T9	28		T7	248
alert[0x1b]	class_i[0x1]	10390	1			T9	1		T18	9		T16	5
alert[0x1b]	class_i[0x2]	5504	1			T18	2		T15	1		T16	1
alert[0x1b]	class_i[0x3]	8448	1			T2	42		T4	1		T9	33
alert[0x1c]	class_i[0x0]	7908	1			T1	3		T2	38		T9	43
alert[0x1c]	class_i[0x1]	8636	1			T9	19		T18	81		T20	1
alert[0x1c]	class_i[0x2]	9680	1			T9	1		T18	72		T20	20
alert[0x1c]	class_i[0x3]	5807	1			T4	195		T18	2		T20	1
alert[0x1d]	class_i[0x0]	12662	1			T9	1		T18	215		T20	25
alert[0x1d]	class_i[0x1]	8390	1			T18	16		T44	1		T16	8
alert[0x1d]	class_i[0x2]	6749	1			T2	1		T3	1		T4	187
alert[0x1d]	class_i[0x3]	7930	1			T3	1		T9	64		T18	63
alert[0x1e]	class_i[0x0]	10546	1			T1	2		T9	31		T7	234
alert[0x1e]	class_i[0x1]	7631	1			T3	3		T4	186		T9	27
alert[0x1e]	class_i[0x2]	8473	1			T18	61		T20	23		T16	8
alert[0x1e]	class_i[0x3]	7576	1			T2	39		T9	7		T18	1
alert[0x1f]	class_i[0x0]	10228	1			T2	1		T3	1		T4	192
alert[0x1f]	class_i[0x1]	6781	1			T9	51		T18	67		T31	4
alert[0x1f]	class_i[0x2]	7701	1			T1	1		T9	1		T18	3
alert[0x1f]	class_i[0x3]	10339	1			T2	41		T3	2		T9	1
alert[0x20]	class_i[0x0]	7541	1			T3	1		T18	471		T15	1
alert[0x20]	class_i[0x1]	8180	1			T1	2		T3	1		T4	192
alert[0x20]	class_i[0x2]	6465	1			T3	1		T9	1		T31	4
alert[0x20]	class_i[0x3]	6373	1			T9	30		T18	73		T44	1
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alert[0x21]	class_i[0x1]	8130	1			T9	4		T7	239		T16	23
alert[0x21]	class_i[0x2]	5604	1			T3	3		T9	1		T18	170
alert[0x21]	class_i[0x3]	7105	1			T1	1		T9	55		T16	2
alert[0x22]	class_i[0x0]	7582	1			T4	191		T18	111		T15	1
alert[0x22]	class_i[0x1]	7850	1			T2	1		T9	35		T18	228
alert[0x22]	class_i[0x2]	9090	1			T3	2		T9	30		T18	14
alert[0x22]	class_i[0x3]	6556	1			T1	3		T18	4		T15	5
alert[0x23]	class_i[0x0]	9486	1			T2	2		T18	4		T31	1
alert[0x23]	class_i[0x1]	5339	1			T7	217		T18	67		T31	6
alert[0x23]	class_i[0x2]	6988	1			T3	1		T9	9		T44	1
alert[0x23]	class_i[0x3]	6736	1			T4	192		T9	57		T18	3
alert[0x24]	class_i[0x0]	7677	1			T4	211		T18	235		T16	22
alert[0x24]	class_i[0x1]	8761	1			T9	26		T18	58		T20	4
alert[0x24]	class_i[0x2]	7164	1			T3	1		T9	9		T18	10
alert[0x24]	class_i[0x3]	7114	1			T3	3		T9	24		T20	2
alert[0x25]	class_i[0x0]	8175	1			T3	1		T4	195		T9	29
alert[0x25]	class_i[0x1]	8181	1			T3	3		T9	1		T20	29
alert[0x25]	class_i[0x2]	6533	1			T9	26		T18	72		T47	1
alert[0x25]	class_i[0x3]	7640	1			T4	1		T9	8		T44	1
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alert[0x26]	class_i[0x1]	9184	1			T1	5		T4	199		T9	1
alert[0x26]	class_i[0x2]	6281	1			T9	31		T15	4		T16	8
alert[0x26]	class_i[0x3]	7591	1			T31	1		T16	25		T68	1
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alert[0x27]	class_i[0x2]	8966	1			T2	42		T3	1		T9	33
alert[0x27]	class_i[0x3]	7109	1			T2	1		T4	191		T9	2
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alert[0x28]	class_i[0x2]	8443	1			T9	33		T18	65		T20	1
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alert[0x29]	class_i[0x1]	8989	1			T1	1		T4	1		T9	10
alert[0x29]	class_i[0x2]	7669	1			T4	203		T9	31		T18	91
alert[0x29]	class_i[0x3]	7603	1			T2	46		T9	34		T18	61
alert[0x2a]	class_i[0x0]	8551	1			T3	2		T9	42		T18	188
alert[0x2a]	class_i[0x1]	7388	1			T3	2		T9	34		T20	1
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alert[0x39]	class_i[0x3]	6383	1			T9	22		T18	69		T16	4
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alert[0x3a]	class_i[0x3]	6431	1			T3	1		T4	216		T44	1
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alert[0x3d]	class_i[0x0]	9476	1			T9	28		T18	154		T20	25
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alert[0x3e]	class_i[0x0]	8028	1			T2	1		T4	1		T18	389
alert[0x3e]	class_i[0x1]	7092	1			T20	2		T16	1		T49	24
alert[0x3e]	class_i[0x2]	7770	1			T1	1		T4	187		T9	86
alert[0x3e]	class_i[0x3]	8643	1			T31	1		T16	36		T75	6
alert[0x3f]	class_i[0x0]	8082	1			T3	1		T9	1		T18	255
alert[0x3f]	class_i[0x1]	6399	1			T3	2		T4	176		T9	1
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alert[0x3f]	class_i[0x3]	8017	1			T2	48		T9	1		T18	1
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alert[0x40]	class_i[0x1]	9009	1			T3	1		T4	204		T18	145
alert[0x40]	class_i[0x2]	5398	1			T3	1		T16	21		T48	1
alert[0x40]	class_i[0x3]	8619	1			T20	15		T16	2		T47	6