Group : alert_handler_env_pkg::alert_handler_env_cov::alert_loc_alert_cause_cg
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Summary for Group alert_handler_env_pkg::alert_handler_env_cov::alert_loc_alert_cause_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 71 0 71 100.00
Crosses 138 0 138 100.00


Variables for Group alert_handler_env_pkg::alert_handler_env_cov::alert_loc_alert_cause_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
alert_index_cp 65 0 65 100.00 100 1 1 0
class_index_cp 4 0 4 100.00 100 1 1 0
loc_alert_cause_cp 2 0 2 100.00 100 1 1 0


Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::alert_loc_alert_cause_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
loc_alert_cause_cross_alert_index 130 0 130 100.00 100 1 1 0
loc_alert_cause_cross_class_index 8 0 8 100.00 100 1 1 0


Summary for Variable alert_index_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 65 0 65 100.00


User Defined Bins for alert_index_cp

Excluded/Illegal bins
NAMECOUNTSTATUS
il 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert[0x0] 19384 1 T71 1029 T27 17 T38 2006
alert[0x1] 6507 1 T27 86 T103 1 T29 2
alert[0x2] 2520 1 T18 38 T14 1 T72 1
alert[0x3] 8642 1 T4 172 T18 61 T71 170
alert[0x4] 6941 1 T4 6 T6 1 T18 18
alert[0x5] 8470 1 T10 1 T18 36 T16 3
alert[0x6] 14211 1 T16 136 T49 1621 T234 1
alert[0x7] 4788 1 T1 1 T18 62 T42 3
alert[0x8] 10485 1 T6 1 T18 227 T75 2
alert[0x9] 4864 1 T16 17 T32 7 T38 648
alert[0xa] 7360 1 T5 1 T18 94 T16 6
alert[0xb] 10723 1 T4 1422 T18 54 T49 202
alert[0xc] 9909 1 T4 62 T49 79 T234 1
alert[0xd] 14551 1 T4 12 T5 1 T18 74
alert[0xe] 2505 1 T16 62 T27 45 T73 3
alert[0xf] 10715 1 T4 46 T32 8 T71 15
alert[0x10] 5334 1 T4 378 T10 1 T47 6
alert[0x11] 7034 1 T5 3 T16 4 T48 6
alert[0x12] 10093 1 T18 261 T16 7 T47 3
alert[0x13] 7270 1 T4 6 T18 156 T14 1
alert[0x14] 8975 1 T18 117 T47 7 T75 1
alert[0x15] 6981 1 T14 1 T47 2 T75 3
alert[0x16] 3194 1 T4 12 T16 1 T49 72
alert[0x17] 17616 1 T4 5 T18 10203 T16 4
alert[0x18] 4997 1 T4 27 T18 601 T49 17
alert[0x19] 14464 1 T4 6 T16 5 T234 1
alert[0x1a] 4048 1 T18 11 T47 1 T75 2
alert[0x1b] 15412 1 T4 17 T234 1 T74 6416
alert[0x1c] 8247 1 T4 1302 T6 1 T18 2
alert[0x1d] 9147 1 T4 87 T281 1 T71 107
alert[0x1e] 14127 1 T1 35 T4 586 T16 10
alert[0x1f] 2118 1 T16 6 T234 1 T114 1
alert[0x20] 8519 1 T4 51 T18 48 T14 1
alert[0x21] 13694 1 T18 246 T16 6 T26 1
alert[0x22] 16138 1 T4 228 T6 1 T18 373
alert[0x23] 5090 1 T6 1 T14 1 T49 37
alert[0x24] 12025 1 T16 495 T49 250 T74 4
alert[0x25] 3358 1 T4 42 T18 726 T16 2
alert[0x26] 4644 1 T9 1 T10 1 T18 2
alert[0x27] 8765 1 T5 1 T16 42 T74 20
alert[0x28] 9158 1 T1 1 T4 100 T6 1
alert[0x29] 12849 1 T4 48 T32 17 T27 660
alert[0x2a] 2967 1 T6 1 T18 89 T16 5
alert[0x2b] 6922 1 T16 8 T75 6 T49 168
alert[0x2c] 7194 1 T5 1 T18 291 T16 13
alert[0x2d] 3556 1 T4 132 T18 17 T16 21
alert[0x2e] 7745 1 T5 1 T18 192 T16 1
alert[0x2f] 7358 1 T18 1 T234 1 T71 345
alert[0x30] 6132 1 T4 7 T10 1 T18 35
alert[0x31] 5407 1 T6 1 T18 4 T75 2
alert[0x32] 8527 1 T5 1 T18 27 T47 24
alert[0x33] 4155 1 T4 128 T14 2 T16 9
alert[0x34] 12604 1 T4 451 T18 1482 T26 13
alert[0x35] 14846 1 T4 88 T18 109 T48 3
alert[0x36] 15771 1 T18 102 T16 32 T75 1
alert[0x37] 2179 1 T16 24 T32 1 T71 32
alert[0x38] 7346 1 T27 7 T103 3 T42 14
alert[0x39] 10575 1 T9 1 T10 1 T234 1
alert[0x3a] 10545 1 T1 2 T4 577 T6 1
alert[0x3b] 6276 1 T6 1 T10 1 T71 1534
alert[0x3c] 8254 1 T18 3 T16 32 T47 2
alert[0x3d] 4110 1 T16 75 T49 314 T27 45
alert[0x3e] 6365 1 T4 19 T5 1 T6 1
alert[0x3f] 9877 1 T18 114 T14 1 T234 1
alert[0x40] 8699 1 T16 17 T49 1405 T71 22



Summary for Variable class_index_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 4 0 4 100.00


User Defined Bins for class_index_cp

Excluded/Illegal bins
NAMECOUNTSTATUS
il 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
class_i[0x0] 139833 1 T1 37 T5 1 T9 1
class_i[0x1] 166455 1 T4 9 T5 2 T6 2
class_i[0x2] 72351 1 T4 5973 T5 5 T6 9
class_i[0x3] 174643 1 T1 2 T4 35 T5 2



Summary for Variable loc_alert_cause_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for loc_alert_cause_cp

Excluded/Illegal bins
NAMECOUNTSTATUS
il 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_integrity_fail 552532 1 T1 39 T4 6017 T9 2
alert_ping_fail 750 1 T5 10 T6 11 T10 7



Summary for Cross loc_alert_cause_cross_alert_index

Samples crossed: loc_alert_cause_cp alert_index_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 130 0 130 100.00


Automatically Generated Cross Bins for loc_alert_cause_cross_alert_index

Bins
loc_alert_cause_cpalert_index_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_integrity_fail alert[0x0] 19373 1 T71 1029 T27 17 T38 2006
alert_integrity_fail alert[0x1] 6498 1 T27 86 T103 1 T29 2
alert_integrity_fail alert[0x2] 2507 1 T18 38 T72 1 T42 54
alert_integrity_fail alert[0x3] 8638 1 T4 172 T18 61 T71 170
alert_integrity_fail alert[0x4] 6930 1 T4 6 T18 18 T16 4
alert_integrity_fail alert[0x5] 8457 1 T18 36 T16 3 T49 12
alert_integrity_fail alert[0x6] 14203 1 T16 136 T49 1621 T32 1
alert_integrity_fail alert[0x7] 4769 1 T1 1 T18 62 T42 3
alert_integrity_fail alert[0x8] 10469 1 T18 227 T75 2 T49 72
alert_integrity_fail alert[0x9] 4858 1 T16 17 T32 7 T38 648
alert_integrity_fail alert[0xa] 7349 1 T18 94 T16 6 T48 2
alert_integrity_fail alert[0xb] 10716 1 T4 1422 T18 54 T49 202
alert_integrity_fail alert[0xc] 9901 1 T4 62 T49 79 T27 3
alert_integrity_fail alert[0xd] 14538 1 T4 12 T18 74 T49 357
alert_integrity_fail alert[0xe] 2494 1 T16 62 T27 45 T73 3
alert_integrity_fail alert[0xf] 10701 1 T4 46 T32 8 T71 15
alert_integrity_fail alert[0x10] 5323 1 T4 378 T47 6 T75 4
alert_integrity_fail alert[0x11] 7022 1 T16 4 T48 6 T49 82
alert_integrity_fail alert[0x12] 10083 1 T18 261 T16 7 T47 3
alert_integrity_fail alert[0x13] 7251 1 T4 6 T18 156 T16 75
alert_integrity_fail alert[0x14] 8967 1 T18 117 T47 7 T75 1
alert_integrity_fail alert[0x15] 6962 1 T47 2 T75 3 T49 29
alert_integrity_fail alert[0x16] 3172 1 T4 12 T16 1 T49 72
alert_integrity_fail alert[0x17] 17608 1 T4 5 T18 10203 T16 4
alert_integrity_fail alert[0x18] 4986 1 T4 27 T18 601 T49 17
alert_integrity_fail alert[0x19] 14454 1 T4 6 T16 5 T71 45
alert_integrity_fail alert[0x1a] 4036 1 T18 11 T47 1 T75 2
alert_integrity_fail alert[0x1b] 15403 1 T4 17 T74 6416 T37 6
alert_integrity_fail alert[0x1c] 8235 1 T4 1302 T18 2 T47 20
alert_integrity_fail alert[0x1d] 9142 1 T4 87 T71 107 T74 11
alert_integrity_fail alert[0x1e] 14111 1 T1 35 T4 586 T16 10
alert_integrity_fail alert[0x1f] 2100 1 T16 6 T71 25 T27 3
alert_integrity_fail alert[0x20] 8502 1 T4 51 T18 48 T16 3
alert_integrity_fail alert[0x21] 13687 1 T18 246 T16 6 T26 1
alert_integrity_fail alert[0x22] 16122 1 T4 228 T18 373 T16 638
alert_integrity_fail alert[0x23] 5079 1 T49 37 T32 8 T71 13
alert_integrity_fail alert[0x24] 12014 1 T16 495 T49 250 T74 4
alert_integrity_fail alert[0x25] 3353 1 T4 42 T18 726 T16 2
alert_integrity_fail alert[0x26] 4632 1 T9 1 T18 2 T49 420
alert_integrity_fail alert[0x27] 8747 1 T16 42 T74 20 T53 21
alert_integrity_fail alert[0x28] 9148 1 T1 1 T4 100 T75 1
alert_integrity_fail alert[0x29] 12836 1 T4 48 T32 17 T27 660
alert_integrity_fail alert[0x2a] 2953 1 T18 89 T16 5 T47 4
alert_integrity_fail alert[0x2b] 6909 1 T16 8 T75 6 T49 168
alert_integrity_fail alert[0x2c] 7173 1 T18 291 T16 13 T49 12
alert_integrity_fail alert[0x2d] 3552 1 T4 132 T18 17 T16 21
alert_integrity_fail alert[0x2e] 7732 1 T18 192 T16 1 T49 687
alert_integrity_fail alert[0x2f] 7341 1 T18 1 T71 345 T74 31
alert_integrity_fail alert[0x30] 6120 1 T4 7 T18 35 T16 543
alert_integrity_fail alert[0x31] 5399 1 T18 4 T75 2 T49 61
alert_integrity_fail alert[0x32] 8518 1 T18 27 T47 24 T71 68
alert_integrity_fail alert[0x33] 4143 1 T4 128 T16 9 T71 531
alert_integrity_fail alert[0x34] 12595 1 T4 451 T18 1482 T26 13
alert_integrity_fail alert[0x35] 14832 1 T4 88 T18 109 T48 3
alert_integrity_fail alert[0x36] 15763 1 T18 102 T16 32 T75 1
alert_integrity_fail alert[0x37] 2169 1 T16 24 T32 1 T71 32
alert_integrity_fail alert[0x38] 7340 1 T27 7 T103 3 T42 14
alert_integrity_fail alert[0x39] 10564 1 T9 1 T71 35 T27 599
alert_integrity_fail alert[0x3a] 10531 1 T1 2 T4 577 T32 8
alert_integrity_fail alert[0x3b] 6262 1 T71 1534 T27 599 T52 1
alert_integrity_fail alert[0x3c] 8245 1 T18 3 T16 32 T47 2
alert_integrity_fail alert[0x3d] 4098 1 T16 75 T49 314 T27 45
alert_integrity_fail alert[0x3e] 6353 1 T4 19 T16 835 T75 49
alert_integrity_fail alert[0x3f] 9868 1 T18 114 T27 66 T37 2
alert_integrity_fail alert[0x40] 8696 1 T16 17 T49 1405 T71 22
alert_ping_fail alert[0x0] 11 1 T284 1 T285 2 T286 1
alert_ping_fail alert[0x1] 9 1 T284 1 T207 3 T287 1
alert_ping_fail alert[0x2] 13 1 T14 1 T284 1 T285 1
alert_ping_fail alert[0x3] 4 1 T288 1 T287 1 T289 1
alert_ping_fail alert[0x4] 11 1 T6 1 T14 2 T36 1
alert_ping_fail alert[0x5] 13 1 T10 1 T36 1 T283 1
alert_ping_fail alert[0x6] 8 1 T234 1 T288 1 T290 1
alert_ping_fail alert[0x7] 19 1 T291 1 T288 1 T290 1
alert_ping_fail alert[0x8] 16 1 T6 1 T288 1 T284 1
alert_ping_fail alert[0x9] 6 1 T40 1 T291 1 T292 1
alert_ping_fail alert[0xa] 11 1 T5 1 T293 1 T294 1
alert_ping_fail alert[0xb] 7 1 T284 2 T287 1 T295 1
alert_ping_fail alert[0xc] 8 1 T234 1 T40 1 T296 1
alert_ping_fail alert[0xd] 13 1 T5 1 T14 1 T288 1
alert_ping_fail alert[0xe] 11 1 T40 1 T297 1 T298 1
alert_ping_fail alert[0xf] 14 1 T40 2 T291 1 T288 1
alert_ping_fail alert[0x10] 11 1 T10 1 T284 1 T207 2
alert_ping_fail alert[0x11] 12 1 T5 3 T299 2 T300 1
alert_ping_fail alert[0x12] 10 1 T40 1 T288 2 T297 1
alert_ping_fail alert[0x13] 19 1 T14 1 T8 1 T43 1
alert_ping_fail alert[0x14] 8 1 T288 1 T292 1 T285 1
alert_ping_fail alert[0x15] 19 1 T14 1 T234 1 T39 1
alert_ping_fail alert[0x16] 22 1 T234 2 T301 1 T299 1
alert_ping_fail alert[0x17] 8 1 T285 2 T298 1 T287 1
alert_ping_fail alert[0x18] 11 1 T291 1 T288 1 T302 1
alert_ping_fail alert[0x19] 10 1 T234 1 T36 1 T284 2
alert_ping_fail alert[0x1a] 12 1 T287 3 T303 1 T296 1
alert_ping_fail alert[0x1b] 9 1 T234 1 T285 1 T303 1
alert_ping_fail alert[0x1c] 12 1 T6 1 T39 1 T40 1
alert_ping_fail alert[0x1d] 5 1 T281 1 T297 1 T294 1
alert_ping_fail alert[0x1e] 16 1 T36 1 T40 1 T288 1
alert_ping_fail alert[0x1f] 18 1 T234 1 T114 1 T299 1
alert_ping_fail alert[0x20] 17 1 T14 1 T290 2 T284 1
alert_ping_fail alert[0x21] 7 1 T288 2 T290 1 T286 1
alert_ping_fail alert[0x22] 16 1 T6 1 T36 1 T39 1
alert_ping_fail alert[0x23] 11 1 T6 1 T14 1 T300 2
alert_ping_fail alert[0x24] 11 1 T285 1 T286 1 T296 1
alert_ping_fail alert[0x25] 5 1 T291 1 T299 1 T303 1
alert_ping_fail alert[0x26] 12 1 T10 1 T290 1 T284 1
alert_ping_fail alert[0x27] 18 1 T5 1 T291 1 T288 1
alert_ping_fail alert[0x28] 10 1 T6 1 T40 2 T291 1
alert_ping_fail alert[0x29] 13 1 T36 1 T291 1 T288 1
alert_ping_fail alert[0x2a] 14 1 T6 1 T291 2 T288 1
alert_ping_fail alert[0x2b] 13 1 T43 1 T288 1 T290 1
alert_ping_fail alert[0x2c] 21 1 T5 1 T234 1 T40 1
alert_ping_fail alert[0x2d] 4 1 T299 1 T286 1 T287 1
alert_ping_fail alert[0x2e] 13 1 T5 1 T284 1 T289 1
alert_ping_fail alert[0x2f] 17 1 T234 1 T291 1 T284 1
alert_ping_fail alert[0x30] 12 1 T10 1 T291 1 T288 2
alert_ping_fail alert[0x31] 8 1 T6 1 T36 1 T40 1
alert_ping_fail alert[0x32] 9 1 T5 1 T40 1 T291 1
alert_ping_fail alert[0x33] 12 1 T14 2 T40 2 T297 1
alert_ping_fail alert[0x34] 9 1 T40 1 T288 1 T292 1
alert_ping_fail alert[0x35] 14 1 T234 1 T297 1 T286 1
alert_ping_fail alert[0x36] 8 1 T284 1 T299 1 T303 1
alert_ping_fail alert[0x37] 10 1 T288 1 T207 1 T300 1
alert_ping_fail alert[0x38] 6 1 T297 1 T300 1 T304 1
alert_ping_fail alert[0x39] 11 1 T10 1 T234 1 T36 1
alert_ping_fail alert[0x3a] 14 1 T6 1 T299 1 T287 1
alert_ping_fail alert[0x3b] 14 1 T6 1 T10 1 T36 1
alert_ping_fail alert[0x3c] 9 1 T286 1 T287 1 T302 1
alert_ping_fail alert[0x3d] 12 1 T288 1 T297 1 T296 1
alert_ping_fail alert[0x3e] 12 1 T5 1 T6 1 T10 1
alert_ping_fail alert[0x3f] 9 1 T14 1 T234 1 T297 1
alert_ping_fail alert[0x40] 3 1 T285 1 T299 1 T295 1



Summary for Cross loc_alert_cause_cross_class_index

Samples crossed: loc_alert_cause_cp class_index_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for loc_alert_cause_cross_class_index

Bins
loc_alert_cause_cpclass_index_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_integrity_fail class_i[0x0] 139630 1 T1 37 T9 1 T18 12504
alert_integrity_fail class_i[0x1] 166278 1 T4 9 T16 2459 T47 2
alert_integrity_fail class_i[0x2] 72167 1 T4 5973 T18 1 T16 136
alert_integrity_fail class_i[0x3] 174457 1 T1 2 T4 35 T9 1
alert_ping_fail class_i[0x0] 203 1 T5 1 T281 1 T36 6
alert_ping_fail class_i[0x1] 177 1 T5 2 T6 2 T10 7
alert_ping_fail class_i[0x2] 184 1 T5 5 T6 9 T234 2
alert_ping_fail class_i[0x3] 186 1 T5 2 T14 11 T114 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%