Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
94.92	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	3	41	93.18

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	3	41	93.18	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	166	1			T2	1		T17	1		T18	1
index[0x1]	182	1			T1	1		T2	1		T17	1
index[0x2]	147	1			T8	1		T9	1		T77	1
index[0x3]	175	1			T3	1		T6	1		T18	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	219	1			T2	1		T3	1		T6	1
lens_less_than_1000[1]	116	1			T17	1		T19	1		T67	1
lens_less_than_1000[2]	97	1			T18	1		T19	1		T8	1
lens_less_than_1000[3]	63	1			T8	1		T15	3		T31	1
lens_less_than_1000[4]	52	1			T9	1		T15	1		T22	1
lens_less_than_1000[5]	33	1			T1	1		T17	1		T32	1
lens_less_than_1000[6]	35	1			T21	2		T70	1		T54	1
lens_less_than_1000[7]	21	1			T53	1		T252	1		T255	1
lens_less_than_1000[8]	22	1			T77	1		T82	1		T33	1
lens_less_than_1000[9]	3	1			T2	1		T203	1		T131	1
len_2	9	1			T18	1		T15	1		T50	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	3	41	93.18	3

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x1]]	[lens_less_than_1000[9]]	0	1	1
[index[0x3]]	[lens_less_than_1000[9] , len_2]	--	--	2

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	51	1			T15	2		T81	1		T32	1
index[0x0]	lens_less_than_1000[1]	30	1			T17	1		T51	1		T53	1
index[0x0]	lens_less_than_1000[2]	24	1			T19	1		T15	1		T69	1
index[0x0]	lens_less_than_1000[3]	21	1			T8	1		T31	1		T53	1
index[0x0]	lens_less_than_1000[4]	13	1			T256	1		T93	1		T99	3
index[0x0]	lens_less_than_1000[5]	8	1			T91	1		T64	1		T102	1
index[0x0]	lens_less_than_1000[6]	6	1			T54	1		T257	2		T258	1
index[0x0]	lens_less_than_1000[7]	4	1			T259	2		T104	1		T260	1
index[0x0]	lens_less_than_1000[8]	3	1			T257	1		T261	1		T262	1
index[0x0]	lens_less_than_1000[9]	2	1			T2	1		T131	1		-	-
index[0x0]	len_2	4	1			T18	1		T15	1		T263	1
index[0x1]	lens_less_than_1000[0]	62	1			T2	1		T31	1		T49	1
index[0x1]	lens_less_than_1000[1]	22	1			T19	1		T67	1		T53	1
index[0x1]	lens_less_than_1000[2]	32	1			T52	1		T54	1		T23	1
index[0x1]	lens_less_than_1000[3]	23	1			T15	3		T117	1		T264	1
index[0x1]	lens_less_than_1000[4]	15	1			T15	1		T22	1		T88	1
index[0x1]	lens_less_than_1000[5]	6	1			T1	1		T17	1		T265	1
index[0x1]	lens_less_than_1000[6]	7	1			T21	1		T94	1		T266	1
index[0x1]	lens_less_than_1000[7]	9	1			T53	1		T255	1		T97	1
index[0x1]	lens_less_than_1000[8]	3	1			T82	1		T267	1		T268	1
index[0x1]	len_2	3	1			T50	1		T87	1		T97	1
index[0x2]	lens_less_than_1000[0]	50	1			T32	1		T69	1		T54	6
index[0x2]	lens_less_than_1000[1]	28	1			T48	1		T74	1		T240	1
index[0x2]	lens_less_than_1000[2]	17	1			T8	1		T53	2		T269	1
index[0x2]	lens_less_than_1000[3]	10	1			T88	1		T91	1		T202	1
index[0x2]	lens_less_than_1000[4]	16	1			T9	1		T94	1		T270	1
index[0x2]	lens_less_than_1000[5]	9	1			T32	1		T88	1		T134	1
index[0x2]	lens_less_than_1000[6]	3	1			T70	1		T271	1		T272	1
index[0x2]	lens_less_than_1000[7]	3	1			T273	1		T274	1		T275	1
index[0x2]	lens_less_than_1000[8]	8	1			T77	1		T33	1		T99	2
index[0x2]	lens_less_than_1000[9]	1	1			T203	1		-	-		-	-
index[0x2]	len_2	2	1			T276	1		T108	1		-	-
index[0x3]	lens_less_than_1000[0]	56	1			T3	1		T6	1		T19	1
index[0x3]	lens_less_than_1000[1]	36	1			T180	1		T69	1		T53	1
index[0x3]	lens_less_than_1000[2]	24	1			T18	1		T91	3		T61	1
index[0x3]	lens_less_than_1000[3]	9	1			T277	1		T94	1		T278	1
index[0x3]	lens_less_than_1000[4]	8	1			T125	1		T279	1		T102	1
index[0x3]	lens_less_than_1000[5]	10	1			T33	5		T242	1		T280	1
index[0x3]	lens_less_than_1000[6]	19	1			T21	1		T281	1		T55	1
index[0x3]	lens_less_than_1000[7]	5	1			T252	1		T282	1		T283	1
index[0x3]	lens_less_than_1000[8]	8	1			T88	1		T38	1		T102	2