Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
94.92	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	3	41	93.18

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	3	41	93.18	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	177	1			T1	1		T3	1		T8	2
index[0x1]	168	1			T5	1		T77	2		T72	1
index[0x2]	199	1			T1	1		T8	1		T6	1
index[0x3]	153	1			T4	1		T8	1		T6	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	226	1			T1	2		T3	1		T4	1
lens_less_than_1000[1]	116	1			T68	2		T69	1		T99	1
lens_less_than_1000[2]	100	1			T6	1		T20	1		T77	1
lens_less_than_1000[3]	87	1			T20	1		T23	1		T67	1
lens_less_than_1000[4]	51	1			T6	1		T20	1		T23	1
lens_less_than_1000[5]	44	1			T51	1		T227	2		T248	1
lens_less_than_1000[6]	25	1			T8	1		T20	1		T224	1
lens_less_than_1000[7]	26	1			T47	1		T77	1		T218	1
lens_less_than_1000[8]	11	1			T8	1		T196	1		T249	5
lens_less_than_1000[9]	1	1			T37	1		-	-		-	-
len_2	10	1			T77	1		T74	1		T225	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	3	41	93.18	3

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x1] , index[0x2] , index[0x3]]	[lens_less_than_1000[9]]	--	--	3

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	61	1			T1	1		T3	1		T6	1
index[0x0]	lens_less_than_1000[1]	28	1			T250	1		T37	1		T86	1
index[0x0]	lens_less_than_1000[2]	30	1			T68	1		T99	1		T251	2
index[0x0]	lens_less_than_1000[3]	17	1			T23	1		T28	4		T252	1
index[0x0]	lens_less_than_1000[4]	11	1			T100	1		T253	1		T254	1
index[0x0]	lens_less_than_1000[5]	14	1			T63	3		T255	1		T233	2
index[0x0]	lens_less_than_1000[6]	8	1			T8	1		T256	1		T120	1
index[0x0]	lens_less_than_1000[7]	3	1			T228	1		T86	2		-	-
index[0x0]	lens_less_than_1000[8]	1	1			T8	1		-	-		-	-
index[0x0]	lens_less_than_1000[9]	1	1			T37	1		-	-		-	-
index[0x0]	len_2	3	1			T77	1		T257	1		T258	1
index[0x1]	lens_less_than_1000[0]	48	1			T5	1		T77	1		T72	1
index[0x1]	lens_less_than_1000[1]	34	1			T68	2		T259	1		T118	1
index[0x1]	lens_less_than_1000[2]	23	1			T86	1		T58	1		T100	1
index[0x1]	lens_less_than_1000[3]	21	1			T24	1		T75	1		T260	1
index[0x1]	lens_less_than_1000[4]	8	1			T66	1		T187	1		T124	1
index[0x1]	lens_less_than_1000[5]	13	1			T100	1		T256	1		T111	1
index[0x1]	lens_less_than_1000[6]	7	1			T94	1		T261	1		T95	1
index[0x1]	lens_less_than_1000[7]	11	1			T77	1		T218	1		T84	3
index[0x1]	lens_less_than_1000[8]	1	1			T262	1		-	-		-	-
index[0x1]	len_2	2	1			T263	1		T188	1		-	-
index[0x2]	lens_less_than_1000[0]	63	1			T1	1		T8	1		T23	4
index[0x2]	lens_less_than_1000[1]	30	1			T51	2		T222	2		T43	1
index[0x2]	lens_less_than_1000[2]	24	1			T20	1		T99	1		T86	2
index[0x2]	lens_less_than_1000[3]	31	1			T20	1		T67	1		T41	1
index[0x2]	lens_less_than_1000[4]	23	1			T6	1		T20	1		T23	1
index[0x2]	lens_less_than_1000[5]	9	1			T227	2		T264	1		T90	1
index[0x2]	lens_less_than_1000[6]	3	1			T265	1		T266	1		T267	1
index[0x2]	lens_less_than_1000[7]	5	1			T81	1		T268	1		T269	1
index[0x2]	lens_less_than_1000[8]	7	1			T196	1		T249	5		T270	1
index[0x2]	len_2	4	1			T225	1		T228	1		T271	1
index[0x3]	lens_less_than_1000[0]	54	1			T4	1		T8	1		T20	1
index[0x3]	lens_less_than_1000[1]	24	1			T69	1		T99	1		T24	1
index[0x3]	lens_less_than_1000[2]	23	1			T6	1		T77	1		T33	1
index[0x3]	lens_less_than_1000[3]	18	1			T83	1		T272	1		T100	3
index[0x3]	lens_less_than_1000[4]	9	1			T43	1		T100	1		T93	1
index[0x3]	lens_less_than_1000[5]	8	1			T51	1		T248	1		T273	1
index[0x3]	lens_less_than_1000[6]	7	1			T20	1		T224	1		T250	3
index[0x3]	lens_less_than_1000[7]	7	1			T47	1		T268	1		T122	1
index[0x3]	lens_less_than_1000[8]	2	1			T274	1		T275	1		-	-
index[0x3]	len_2	1	1			T74	1		-	-		-	-