Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
96.61	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	2	42	95.45

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	2	42	95.45	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	149	1			T25	1		T34	1		T56	1
index[0x1]	184	1			T3	1		T17	4		T8	1
index[0x2]	175	1			T21	1		T25	1		T7	2
index[0x3]	163	1			T20	1		T55	1		T56	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	219	1			T7	1		T34	1		T55	1
lens_less_than_1000[1]	129	1			T3	1		T25	1		T17	4
lens_less_than_1000[2]	85	1			T37	1		T62	1		T40	2
lens_less_than_1000[3]	77	1			T25	1		T31	1		T20	1
lens_less_than_1000[4]	37	1			T69	1		T38	1		T59	1
lens_less_than_1000[5]	45	1			T57	1		T59	1		T259	1
lens_less_than_1000[6]	23	1			T26	1		T260	1		T30	1
lens_less_than_1000[7]	24	1			T56	1		T26	1		T61	1
lens_less_than_1000[8]	18	1			T21	1		T7	1		T8	1
lens_less_than_1000[9]	4	1			T235	1		T261	1		T262	2
len_2	10	1			T34	1		T210	1		T212	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	2	42	95.45	2

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x1] , index[0x2]]	[lens_less_than_1000[9]]	--	--	2

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	54	1			T34	1		T56	1		T223	1
index[0x0]	lens_less_than_1000[1]	33	1			T62	1		T39	1		T42	1
index[0x0]	lens_less_than_1000[2]	12	1			T40	1		T72	2		T76	1
index[0x0]	lens_less_than_1000[3]	19	1			T25	1		T61	1		T106	1
index[0x0]	lens_less_than_1000[4]	10	1			T69	1		T263	1		T30	1
index[0x0]	lens_less_than_1000[5]	7	1			T264	1		T174	1		T265	1
index[0x0]	lens_less_than_1000[6]	2	1			T26	1		T266	1		-	-
index[0x0]	lens_less_than_1000[7]	5	1			T174	1		T110	1		T267	1
index[0x0]	lens_less_than_1000[8]	3	1			T59	1		T245	1		T268	1
index[0x0]	lens_less_than_1000[9]	3	1			T235	1		T261	1		T262	1
index[0x0]	len_2	1	1			T212	1		-	-		-	-
index[0x1]	lens_less_than_1000[0]	56	1			T37	1		T57	1		T211	1
index[0x1]	lens_less_than_1000[1]	48	1			T3	1		T17	4		T62	1
index[0x1]	lens_less_than_1000[2]	25	1			T37	1		T62	1		T40	1
index[0x1]	lens_less_than_1000[3]	16	1			T269	1		T48	1		T78	2
index[0x1]	lens_less_than_1000[4]	6	1			T44	1		T101	1		T83	1
index[0x1]	lens_less_than_1000[5]	13	1			T44	1		T72	1		T174	1
index[0x1]	lens_less_than_1000[6]	6	1			T30	1		T270	1		T271	1
index[0x1]	lens_less_than_1000[7]	5	1			T42	1		T70	1		T98	1
index[0x1]	lens_less_than_1000[8]	8	1			T8	1		T57	1		T98	1
index[0x1]	len_2	1	1			T210	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	59	1			T7	1		T65	1		T57	1
index[0x2]	lens_less_than_1000[1]	21	1			T25	1		T26	1		T60	1
index[0x2]	lens_less_than_1000[2]	19	1			T42	1		T49	1		T272	1
index[0x2]	lens_less_than_1000[3]	27	1			T31	1		T57	1		T12	2
index[0x2]	lens_less_than_1000[4]	11	1			T174	1		T83	2		T96	1
index[0x2]	lens_less_than_1000[5]	12	1			T259	1		T273	1		T274	1
index[0x2]	lens_less_than_1000[6]	9	1			T260	1		T275	1		T276	1
index[0x2]	lens_less_than_1000[7]	7	1			T26	1		T61	1		T77	1
index[0x2]	lens_less_than_1000[8]	4	1			T21	1		T7	1		T277	2
index[0x2]	len_2	6	1			T34	1		T50	1		T277	1
index[0x3]	lens_less_than_1000[0]	50	1			T55	1		T26	1		T59	1
index[0x3]	lens_less_than_1000[1]	27	1			T60	1		T71	1		T106	1
index[0x3]	lens_less_than_1000[2]	29	1			T224	1		T70	1		T72	1
index[0x3]	lens_less_than_1000[3]	15	1			T20	1		T59	1		T62	1
index[0x3]	lens_less_than_1000[4]	10	1			T38	1		T59	1		T30	1
index[0x3]	lens_less_than_1000[5]	13	1			T57	1		T59	1		T269	1
index[0x3]	lens_less_than_1000[6]	6	1			T52	2		T182	1		T278	1
index[0x3]	lens_less_than_1000[7]	7	1			T56	1		T41	1		T241	1
index[0x3]	lens_less_than_1000[8]	3	1			T59	1		T279	1		T280	1
index[0x3]	lens_less_than_1000[9]	1	1			T262	1		-	-		-	-
index[0x3]	len_2	2	1			T52	1		T281	1		-	-