Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	68904581	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

33474188

1

T1

227316

T2

92514

T3

190

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	15308469	1			T1	82448		T2	40581		T3	71
values[0x0]	42337288	1			T1	258625		T2	124214		T3	231
values[0x1]	44733012	1			T1	319026		T2	123898		T3	213

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	58699779	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

43678990

1

T1

318244

T2

116642

T3

237

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	320603	1			T1	2536		T2	1161		T4	45
valid_sources[0x01]	317451	1			T1	1913		T2	1184		T4	53
valid_sources[0x02]	314093	1			T1	3750		T2	1064		T3	3
valid_sources[0x03]	316557	1			T1	2655		T2	1059		T4	71
valid_sources[0x04]	896087	1			T1	3455		T2	1132		T4	34
valid_sources[0x05]	791287	1			T1	3676		T2	1083		T3	8
valid_sources[0x06]	315674	1			T1	3736		T2	1121		T3	1
valid_sources[0x07]	317003	1			T1	1700		T2	1149		T3	1
valid_sources[0x08]	305219	1			T1	2155		T2	1118		T3	6
valid_sources[0x09]	312714	1			T1	1942		T2	1084		T4	80
valid_sources[0x0a]	312527	1			T1	2463		T2	1038		T3	1
valid_sources[0x0b]	314629	1			T1	2469		T2	1139		T4	64
valid_sources[0x0c]	322691	1			T1	2652		T2	1122		T4	33
valid_sources[0x0d]	305074	1			T1	2234		T2	1107		T3	3
valid_sources[0x0e]	309226	1			T1	3337		T2	1148		T4	42
valid_sources[0x0f]	595636	1			T1	1646		T2	1091		T3	4
valid_sources[0x10]	312615	1			T1	1690		T2	1106		T3	2
valid_sources[0x11]	315204	1			T1	2298		T2	1137		T3	4
valid_sources[0x12]	305838	1			T1	1930		T2	1150		T3	6
valid_sources[0x13]	647666	1			T1	2291		T2	1071		T4	65
valid_sources[0x14]	776761	1			T1	2137		T2	1135		T4	71
valid_sources[0x15]	306591	1			T1	2518		T2	1152		T3	3
valid_sources[0x16]	979584	1			T1	2932		T2	1152		T4	39
valid_sources[0x17]	323200	1			T1	2321		T2	1118		T3	1
valid_sources[0x18]	340992	1			T1	2016		T2	1116		T3	6
valid_sources[0x19]	776738	1			T1	3568		T2	1155		T4	121
valid_sources[0x1a]	318846	1			T1	2328		T2	1139		T4	33
valid_sources[0x1b]	1359189	1			T1	2345		T2	1083		T3	5
valid_sources[0x1c]	306687	1			T1	2384		T2	1131		T3	2
valid_sources[0x1d]	303465	1			T1	1729		T2	1138		T3	3
valid_sources[0x1e]	311096	1			T1	2625		T2	1149		T3	1
valid_sources[0x1f]	316345	1			T1	4000		T2	1121		T3	1
valid_sources[0x20]	305210	1			T1	1765		T2	1113		T4	47
valid_sources[0x21]	307797	1			T1	3332		T2	1118		T4	23
valid_sources[0x22]	303363	1			T1	2859		T2	1053		T3	1
valid_sources[0x23]	635012	1			T1	1823		T2	1124		T3	2
valid_sources[0x24]	312506	1			T1	2411		T2	1155		T4	37
valid_sources[0x25]	313262	1			T1	2120		T2	1156		T3	4
valid_sources[0x26]	318246	1			T1	2184		T2	1110		T3	7
valid_sources[0x27]	325478	1			T1	3099		T2	1145		T3	2
valid_sources[0x28]	318977	1			T1	3490		T2	1147		T3	1
valid_sources[0x29]	303136	1			T1	2254		T2	1232		T3	5
valid_sources[0x2a]	740392	1			T1	3817		T2	1146		T3	2
valid_sources[0x2b]	325075	1			T1	1889		T2	1133		T3	1
valid_sources[0x2c]	683155	1			T1	1427		T2	1101		T3	1
valid_sources[0x2d]	314514	1			T1	2558		T2	1170		T3	2
valid_sources[0x2e]	585547	1			T1	4083		T2	1162		T4	63
valid_sources[0x2f]	329961	1			T1	3381		T2	1061		T3	1
valid_sources[0x30]	312338	1			T1	2422		T2	1154		T3	6
valid_sources[0x31]	609147	1			T1	2909		T2	1104		T3	3
valid_sources[0x32]	791027	1			T1	2976		T2	1186		T3	2
valid_sources[0x33]	313501	1			T1	3186		T2	1143		T3	5
valid_sources[0x34]	312455	1			T1	2222		T2	1147		T3	1
valid_sources[0x35]	669783	1			T1	1986		T2	1178		T4	70
valid_sources[0x36]	315719	1			T1	2925		T2	1168		T4	39
valid_sources[0x37]	311551	1			T1	2336		T2	1100		T3	2
valid_sources[0x38]	319130	1			T1	2868		T2	1074		T3	7
valid_sources[0x39]	725751	1			T1	3180		T2	1179		T4	29
valid_sources[0x3a]	312439	1			T1	2207		T2	1118		T3	5
valid_sources[0x3b]	304442	1			T1	1867		T2	1123		T3	5
valid_sources[0x3c]	300667	1			T1	1708		T2	1090		T3	1
valid_sources[0x3d]	741472	1			T1	3100		T2	1176		T4	55
valid_sources[0x3e]	308522	1			T1	2031		T2	1090		T3	3
valid_sources[0x3f]	309946	1			T1	3870		T2	1072		T3	1
valid_sources[0x40]	674420	1			T1	1656		T2	1130		T3	5
valid_sources[0x41]	310244	1			T1	2962		T2	1088		T3	1
valid_sources[0x42]	312481	1			T1	3124		T2	1047		T3	1
valid_sources[0x43]	327048	1			T1	3016		T2	1159		T4	36
valid_sources[0x44]	367236	1			T1	3674		T2	1122		T4	62
valid_sources[0x45]	312867	1			T1	3588		T2	1116		T3	2
valid_sources[0x46]	314193	1			T1	2553		T2	1134		T4	55
valid_sources[0x47]	309867	1			T1	1675		T2	1175		T4	48
valid_sources[0x48]	318959	1			T1	1866		T2	1138		T4	45
valid_sources[0x49]	305462	1			T1	2378		T2	1082		T4	49
valid_sources[0x4a]	319770	1			T1	3395		T2	1180		T3	1
valid_sources[0x4b]	316959	1			T1	2049		T2	1195		T4	39
valid_sources[0x4c]	541727	1			T1	2317		T2	1112		T4	64
valid_sources[0x4d]	907463	1			T1	2375		T2	1127		T3	1
valid_sources[0x4e]	308735	1			T1	1737		T2	1092		T3	2
valid_sources[0x4f]	305834	1			T1	2001		T2	1221		T3	2
valid_sources[0x50]	310839	1			T1	2340		T2	1176		T3	6
valid_sources[0x51]	321774	1			T1	5401		T2	1158		T3	5
valid_sources[0x52]	306092	1			T1	2078		T2	1086		T3	2
valid_sources[0x53]	313319	1			T1	2740		T2	1123		T3	2
valid_sources[0x54]	319278	1			T1	3416		T2	1151		T3	1
valid_sources[0x55]	306770	1			T1	2471		T2	1149		T3	5
valid_sources[0x56]	325592	1			T1	2085		T2	1109		T4	49
valid_sources[0x57]	309970	1			T1	2259		T2	1142		T3	2
valid_sources[0x58]	311689	1			T1	2136		T2	1109		T4	47
valid_sources[0x59]	332718	1			T1	4528		T2	1180		T3	1
valid_sources[0x5a]	314805	1			T1	2290		T2	1141		T4	11
valid_sources[0x5b]	321409	1			T1	4269		T2	1169		T3	1
valid_sources[0x5c]	325727	1			T1	3628		T2	1056		T3	2
valid_sources[0x5d]	330238	1			T1	1794		T2	1115		T3	3
valid_sources[0x5e]	317138	1			T1	1849		T2	1146		T3	1
valid_sources[0x5f]	314322	1			T1	3257		T2	1193		T4	36
valid_sources[0x60]	306087	1			T1	2079		T2	1177		T3	1
valid_sources[0x61]	307997	1			T1	2065		T2	1067		T3	5
valid_sources[0x62]	310079	1			T1	2189		T2	1200		T3	6
valid_sources[0x63]	312674	1			T1	1807		T2	1139		T3	8
valid_sources[0x64]	312001	1			T1	2866		T2	1122		T4	45
valid_sources[0x65]	608014	1			T1	2132		T2	1134		T4	91
valid_sources[0x66]	332099	1			T1	3198		T2	1091		T3	1
valid_sources[0x67]	312671	1			T1	2049		T2	1141		T3	3
valid_sources[0x68]	309909	1			T1	1754		T2	1096		T4	17
valid_sources[0x69]	590515	1			T1	1852		T2	1180		T3	4
valid_sources[0x6a]	309597	1			T1	2835		T2	1158		T4	32
valid_sources[0x6b]	667555	1			T1	2847		T2	1064		T4	54
valid_sources[0x6c]	557587	1			T1	1730		T2	1102		T3	3
valid_sources[0x6d]	315949	1			T1	2490		T2	1113		T3	1
valid_sources[0x6e]	299494	1			T1	1976		T2	1134		T4	47
valid_sources[0x6f]	314051	1			T1	2737		T2	1117		T3	4
valid_sources[0x70]	327332	1			T1	3092		T2	1137		T3	4
valid_sources[0x71]	305551	1			T1	1515		T2	1163		T3	3
valid_sources[0x72]	310134	1			T1	1869		T2	1175		T3	1
valid_sources[0x73]	697767	1			T1	1784		T2	1047		T4	75
valid_sources[0x74]	325271	1			T1	1910		T2	1157		T3	1
valid_sources[0x75]	314199	1			T1	1945		T2	1233		T4	46
valid_sources[0x76]	320548	1			T1	2252		T2	1063		T3	8
valid_sources[0x77]	320057	1			T1	2823		T2	1165		T3	3
valid_sources[0x78]	313742	1			T1	2032		T2	1134		T3	1
valid_sources[0x79]	309549	1			T1	2045		T2	1137		T3	1
valid_sources[0x7a]	651926	1			T1	1959		T2	1093		T3	3
valid_sources[0x7b]	342763	1			T1	2309		T2	1122		T4	75
valid_sources[0x7c]	319207	1			T1	4340		T2	1170		T3	3
valid_sources[0x7d]	349235	1			T1	2322		T2	1136		T3	3
valid_sources[0x7e]	317652	1			T1	1951		T2	1134		T3	2
valid_sources[0x7f]	316982	1			T1	1856		T2	1054		T3	4
valid_sources[0x80]	315628	1			T1	3513		T2	1109		T3	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7651014

1

T1

47764

T2

20234

T3

37

values[0x0]

all_enables

biggest_size

16273826

1

T1

109000

T2

46223

T3

108

values[0x1]

all_enables

biggest_size

9549348

1

T1

70552

T2

26057

T3

45