Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 66036795 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 32127288 1 T1 134 T2 10149 T3 375147



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 14964939 1 T1 73 T2 3877 T3 137809
values[0x0] 40422780 1 T1 193 T2 14248 T3 425142
values[0x1] 42776364 1 T1 187 T2 14450 T3 530167



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 56187337 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 41976746 1 T1 170 T2 12958 T3 526957



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 315816 1 T1 1 T2 126 T3 4251
valid_sources[0x01] 306463 1 T2 100 T3 4202 T5 1330
valid_sources[0x02] 329760 1 T1 2 T2 134 T3 4268
valid_sources[0x03] 761001 1 T1 3 T2 123 T3 4327
valid_sources[0x04] 740767 1 T1 2 T2 102 T3 4338
valid_sources[0x05] 508650 1 T2 143 T3 4398 T5 1264
valid_sources[0x06] 317390 1 T1 1 T2 157 T3 4162
valid_sources[0x07] 313076 1 T1 1 T2 110 T3 4299
valid_sources[0x08] 328079 1 T2 131 T3 4188 T5 1528
valid_sources[0x09] 750821 1 T1 2 T2 136 T3 4384
valid_sources[0x0a] 319705 1 T1 3 T2 161 T3 4276
valid_sources[0x0b] 306988 1 T1 3 T2 109 T3 4168
valid_sources[0x0c] 309943 1 T2 136 T3 4299 T5 1381
valid_sources[0x0d] 326432 1 T1 1 T2 119 T3 4341
valid_sources[0x0e] 306489 1 T1 1 T2 160 T3 4311
valid_sources[0x0f] 339629 1 T1 2 T2 105 T3 4257
valid_sources[0x10] 312654 1 T1 4 T2 133 T3 4347
valid_sources[0x11] 320742 1 T1 1 T2 92 T3 4268
valid_sources[0x12] 929694 1 T1 1 T2 105 T3 4400
valid_sources[0x13] 328753 1 T1 1 T2 121 T3 4281
valid_sources[0x14] 321145 1 T1 1 T2 130 T3 4181
valid_sources[0x15] 322905 1 T1 3 T2 130 T3 4363
valid_sources[0x16] 306553 1 T1 1 T2 111 T3 4245
valid_sources[0x17] 311154 1 T1 1 T2 127 T3 4334
valid_sources[0x18] 798793 1 T1 2 T2 130 T3 4318
valid_sources[0x19] 302308 1 T1 2 T2 135 T3 4222
valid_sources[0x1a] 315608 1 T1 1 T2 145 T3 4290
valid_sources[0x1b] 311911 1 T2 111 T3 4303 T5 918
valid_sources[0x1c] 315819 1 T1 6 T2 135 T3 4198
valid_sources[0x1d] 312330 1 T1 1 T2 144 T3 4269
valid_sources[0x1e] 301886 1 T1 1 T2 114 T3 4178
valid_sources[0x1f] 309706 1 T1 1 T2 130 T3 4246
valid_sources[0x20] 303325 1 T1 1 T2 124 T3 4307
valid_sources[0x21] 817948 1 T1 1 T2 132 T3 4233
valid_sources[0x22] 329178 1 T1 4 T2 135 T3 4260
valid_sources[0x23] 321504 1 T1 3 T2 137 T3 4322
valid_sources[0x24] 783271 1 T1 3 T2 107 T3 4263
valid_sources[0x25] 309424 1 T1 2 T2 149 T3 4329
valid_sources[0x26] 318207 1 T1 4 T2 135 T3 4195
valid_sources[0x27] 308604 1 T1 4 T2 107 T3 4299
valid_sources[0x28] 313650 1 T2 149 T3 4264 T5 1217
valid_sources[0x29] 322386 1 T1 2 T2 117 T3 4302
valid_sources[0x2a] 305930 1 T1 9 T2 127 T3 4302
valid_sources[0x2b] 313644 1 T2 143 T3 4191 T5 1744
valid_sources[0x2c] 518527 1 T2 116 T3 4264 T5 1119
valid_sources[0x2d] 391611 1 T2 134 T3 4258 T5 985
valid_sources[0x2e] 312437 1 T1 1 T2 96 T3 4265
valid_sources[0x2f] 349008 1 T1 1 T2 128 T3 4222
valid_sources[0x30] 547555 1 T2 107 T3 4204 T5 1314
valid_sources[0x31] 301782 1 T2 125 T3 4404 T5 1408
valid_sources[0x32] 307878 1 T1 3 T2 118 T3 4237
valid_sources[0x33] 337915 1 T1 1 T2 117 T3 4334
valid_sources[0x34] 311570 1 T1 3 T2 129 T3 4234
valid_sources[0x35] 372873 1 T1 3 T2 122 T3 4201
valid_sources[0x36] 316450 1 T1 3 T2 132 T3 4374
valid_sources[0x37] 317716 1 T1 3 T2 153 T3 4349
valid_sources[0x38] 314355 1 T1 2 T2 158 T3 4295
valid_sources[0x39] 562095 1 T2 135 T3 4324 T5 1230
valid_sources[0x3a] 304126 1 T1 2 T2 123 T3 4300
valid_sources[0x3b] 321678 1 T2 155 T3 4141 T5 1340
valid_sources[0x3c] 309369 1 T1 2 T2 127 T3 4215
valid_sources[0x3d] 714127 1 T1 1 T2 120 T3 4364
valid_sources[0x3e] 311617 1 T1 2 T2 139 T3 4275
valid_sources[0x3f] 361712 1 T1 1 T2 130 T3 4313
valid_sources[0x40] 323564 1 T1 4 T2 138 T3 4107
valid_sources[0x41] 326740 1 T1 3 T2 119 T3 4174
valid_sources[0x42] 316680 1 T1 2 T2 131 T3 4214
valid_sources[0x43] 448113 1 T1 1 T2 127 T3 4308
valid_sources[0x44] 301043 1 T1 1 T2 155 T3 4280
valid_sources[0x45] 308148 1 T1 2 T2 128 T3 4370
valid_sources[0x46] 323431 1 T1 3 T2 149 T3 4244
valid_sources[0x47] 333015 1 T1 4 T2 163 T3 4273
valid_sources[0x48] 315664 1 T2 138 T3 4177 T5 1624
valid_sources[0x49] 345153 1 T1 1 T2 124 T3 4366
valid_sources[0x4a] 378172 1 T2 127 T3 4242 T5 1235
valid_sources[0x4b] 801183 1 T1 3 T2 106 T3 4233
valid_sources[0x4c] 312927 1 T1 1 T2 117 T3 4201
valid_sources[0x4d] 320764 1 T1 1 T2 134 T3 4169
valid_sources[0x4e] 780050 1 T1 2 T2 135 T3 4192
valid_sources[0x4f] 314132 1 T1 4 T2 110 T3 4278
valid_sources[0x50] 306169 1 T1 2 T2 126 T3 4329
valid_sources[0x51] 313564 1 T1 2 T2 118 T3 4221
valid_sources[0x52] 633661 1 T2 128 T3 4196 T5 1139
valid_sources[0x53] 637204 1 T2 119 T3 4240 T5 1226
valid_sources[0x54] 310913 1 T2 130 T3 4343 T5 1196
valid_sources[0x55] 707010 1 T1 3 T2 133 T3 4254
valid_sources[0x56] 307370 1 T1 5 T2 140 T3 4179
valid_sources[0x57] 322477 1 T1 5 T2 110 T3 4361
valid_sources[0x58] 326085 1 T1 1 T2 122 T3 4241
valid_sources[0x59] 314992 1 T2 103 T3 4226 T5 1515
valid_sources[0x5a] 639004 1 T1 1 T2 129 T3 4467
valid_sources[0x5b] 314525 1 T2 114 T3 4237 T5 1269
valid_sources[0x5c] 307550 1 T1 3 T2 105 T3 4355
valid_sources[0x5d] 311950 1 T1 1 T2 125 T3 4266
valid_sources[0x5e] 552408 1 T1 1 T2 122 T3 4308
valid_sources[0x5f] 329374 1 T1 2 T2 126 T3 4214
valid_sources[0x60] 826765 1 T1 1 T2 120 T3 4274
valid_sources[0x61] 314221 1 T1 3 T2 130 T3 4168
valid_sources[0x62] 311090 1 T1 6 T2 115 T3 4155
valid_sources[0x63] 319315 1 T1 4 T2 135 T3 4309
valid_sources[0x64] 310919 1 T1 1 T2 117 T3 4172
valid_sources[0x65] 311772 1 T1 1 T2 125 T3 4239
valid_sources[0x66] 310172 1 T1 1 T2 131 T3 4306
valid_sources[0x67] 310189 1 T1 1 T2 150 T3 4300
valid_sources[0x68] 308918 1 T2 131 T3 4360 T5 1316
valid_sources[0x69] 668457 1 T1 3 T2 118 T3 4349
valid_sources[0x6a] 300939 1 T1 1 T2 119 T3 4249
valid_sources[0x6b] 319049 1 T2 146 T3 4164 T5 1209
valid_sources[0x6c] 318198 1 T1 2 T2 150 T3 4299
valid_sources[0x6d] 690219 1 T1 5 T2 116 T3 4299
valid_sources[0x6e] 794923 1 T1 1 T2 136 T3 4245
valid_sources[0x6f] 319303 1 T1 2 T2 118 T3 4239
valid_sources[0x70] 317504 1 T1 7 T2 116 T3 4238
valid_sources[0x71] 564803 1 T2 124 T3 4358 T5 1248
valid_sources[0x72] 310906 1 T2 133 T3 4301 T5 1329
valid_sources[0x73] 331159 1 T1 1 T2 129 T3 4264
valid_sources[0x74] 772695 1 T1 3 T2 125 T3 4136
valid_sources[0x75] 329698 1 T1 1 T2 162 T3 4119
valid_sources[0x76] 304412 1 T1 2 T2 150 T3 4243
valid_sources[0x77] 510124 1 T1 5 T2 113 T3 4157
valid_sources[0x78] 312079 1 T1 2 T2 130 T3 4294
valid_sources[0x79] 332554 1 T1 3 T2 128 T3 4180
valid_sources[0x7a] 659142 1 T2 124 T3 4233 T5 1152
valid_sources[0x7b] 323414 1 T1 4 T2 113 T3 4176
valid_sources[0x7c] 314166 1 T1 5 T2 132 T3 4369
valid_sources[0x7d] 302149 1 T1 1 T2 126 T3 4363
valid_sources[0x7e] 311659 1 T1 3 T2 141 T3 4225
valid_sources[0x7f] 308638 1 T1 2 T2 130 T3 4317
valid_sources[0x80] 303044 1 T1 2 T2 130 T3 4283



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 7449652 1 T1 32 T2 1971 T3 79665
values[0x0] all_enables biggest_size 15544766 1 T1 70 T2 5249 T3 179113
values[0x1] all_enables biggest_size 9132870 1 T1 32 T2 2929 T3 116369

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%