Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
96.61	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	2	42	95.45

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	2	42	95.45	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	172	1			T14	1		T5	1		T25	2
index[0x1]	209	1			T10	1		T15	1		T20	1
index[0x2]	191	1			T10	4		T11	1		T12	1
index[0x3]	161	1			T22	1		T20	1		T16	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	253	1			T11	1		T12	1		T41	1
lens_less_than_1000[1]	164	1			T22	1		T26	2		T29	2
lens_less_than_1000[2]	86	1			T10	2		T25	4		T26	2
lens_less_than_1000[3]	69	1			T10	3		T14	1		T20	1
lens_less_than_1000[4]	46	1			T15	1		T64	1		T37	1
lens_less_than_1000[5]	42	1			T26	1		T45	1		T89	2
lens_less_than_1000[6]	28	1			T28	1		T20	1		T29	1
lens_less_than_1000[7]	20	1			T79	1		T105	2		T244	1
lens_less_than_1000[8]	15	1			T18	1		T46	1		T78	1
lens_less_than_1000[9]	5	1			T78	2		T234	1		T257	1
len_2	5	1			T258	1		T181	1		T252	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	2	42	95.45	2

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x1]]	[lens_less_than_1000[9]]	0	1	1
[index[0x2]]	[len_2]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	56	1			T5	1		T32	1		T259	1
index[0x0]	lens_less_than_1000[1]	43	1			T62	1		T44	1		T68	1
index[0x0]	lens_less_than_1000[2]	18	1			T25	2		T260	1		T95	1
index[0x0]	lens_less_than_1000[3]	14	1			T14	1		T29	1		T261	1
index[0x0]	lens_less_than_1000[4]	10	1			T87	1		T96	1		T262	1
index[0x0]	lens_less_than_1000[5]	15	1			T45	1		T263	4		T112	1
index[0x0]	lens_less_than_1000[6]	5	1			T32	1		T81	1		T264	1
index[0x0]	lens_less_than_1000[7]	6	1			T79	1		T244	1		T265	1
index[0x0]	lens_less_than_1000[8]	2	1			T18	1		T78	1		-	-
index[0x0]	lens_less_than_1000[9]	1	1			T266	1		-	-		-	-
index[0x0]	len_2	2	1			T258	1		T181	1		-	-
index[0x1]	lens_less_than_1000[0]	75	1			T41	1		T5	2		T29	1
index[0x1]	lens_less_than_1000[1]	39	1			T26	2		T29	2		T36	1
index[0x1]	lens_less_than_1000[2]	28	1			T10	1		T25	1		T29	1
index[0x1]	lens_less_than_1000[3]	16	1			T48	1		T267	1		T52	2
index[0x1]	lens_less_than_1000[4]	18	1			T15	1		T37	1		T225	1
index[0x1]	lens_less_than_1000[5]	16	1			T89	1		T90	4		T268	1
index[0x1]	lens_less_than_1000[6]	7	1			T20	1		T111	1		T101	2
index[0x1]	lens_less_than_1000[7]	5	1			T105	1		T269	1		T270	1
index[0x1]	lens_less_than_1000[8]	4	1			T271	1		T244	1		T272	2
index[0x1]	len_2	1	1			T252	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	70	1			T11	1		T12	1		T5	3
index[0x2]	lens_less_than_1000[1]	44	1			T30	1		T44	7		T212	1
index[0x2]	lens_less_than_1000[2]	22	1			T10	1		T26	1		T63	1
index[0x2]	lens_less_than_1000[3]	20	1			T10	3		T37	1		T32	1
index[0x2]	lens_less_than_1000[4]	12	1			T47	1		T79	1		T273	1
index[0x2]	lens_less_than_1000[5]	5	1			T274	1		T275	1		T276	1
index[0x2]	lens_less_than_1000[6]	6	1			T28	1		T29	1		T65	1
index[0x2]	lens_less_than_1000[7]	5	1			T253	1		T56	1		T277	1
index[0x2]	lens_less_than_1000[8]	5	1			T46	1		T278	1		T279	1
index[0x2]	lens_less_than_1000[9]	2	1			T78	2		-	-		-	-
index[0x3]	lens_less_than_1000[0]	52	1			T16	1		T21	1		T26	2
index[0x3]	lens_less_than_1000[1]	38	1			T22	1		T106	1		T32	1
index[0x3]	lens_less_than_1000[2]	18	1			T25	1		T26	1		T68	1
index[0x3]	lens_less_than_1000[3]	19	1			T20	1		T25	1		T65	2
index[0x3]	lens_less_than_1000[4]	6	1			T64	1		T280	1		T281	1
index[0x3]	lens_less_than_1000[5]	6	1			T26	1		T89	1		T282	1
index[0x3]	lens_less_than_1000[6]	10	1			T95	1		T244	1		T112	1
index[0x3]	lens_less_than_1000[7]	4	1			T105	1		T253	1		T265	1
index[0x3]	lens_less_than_1000[8]	4	1			T94	1		T283	1		T284	2
index[0x3]	lens_less_than_1000[9]	2	1			T234	1		T257	1		-	-
index[0x3]	len_2	2	1			T285	1		T286	1		-	-