Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	62615809	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

30224258

1

T1

187106

T2

622

T3

2952

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14010123	1			T1	69517		T2	270		T3	1544
values[0x0]	38594481	1			T1	212658		T2	821		T3	3667
values[0x1]	40235463	1			T1	261786		T2	903		T3	3637

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53669936	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

39170131

1

T1

260968

T2

811

T3

3717

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	291880	1			T1	2095		T3	32		T6	50
valid_sources[0x01]	289641	1			T1	2230		T2	7		T3	38
valid_sources[0x02]	288939	1			T1	2020		T2	15		T3	40
valid_sources[0x03]	285397	1			T1	2126		T2	2		T3	28
valid_sources[0x04]	288465	1			T1	2139		T3	36		T6	44
valid_sources[0x05]	299984	1			T1	2042		T2	5		T3	32
valid_sources[0x06]	287758	1			T1	2341		T2	2		T3	42
valid_sources[0x07]	288009	1			T1	2338		T2	9		T3	44
valid_sources[0x08]	293965	1			T1	2147		T2	10		T3	39
valid_sources[0x09]	289281	1			T1	2153		T2	14		T3	44
valid_sources[0x0a]	290863	1			T1	2004		T2	1		T3	31
valid_sources[0x0b]	287930	1			T1	2176		T2	2		T3	41
valid_sources[0x0c]	287774	1			T1	2038		T2	15		T3	38
valid_sources[0x0d]	290917	1			T1	2156		T2	4		T3	48
valid_sources[0x0e]	292684	1			T1	2138		T2	13		T3	33
valid_sources[0x0f]	290615	1			T1	2227		T2	15		T3	28
valid_sources[0x10]	293501	1			T1	1989		T2	15		T3	37
valid_sources[0x11]	288832	1			T1	2063		T2	7		T3	26
valid_sources[0x12]	340130	1			T1	2166		T2	7		T3	24
valid_sources[0x13]	286558	1			T1	2060		T2	2		T3	46
valid_sources[0x14]	540520	1			T1	2120		T2	4		T3	27
valid_sources[0x15]	641216	1			T1	1962		T2	12		T3	36
valid_sources[0x16]	289216	1			T1	2139		T3	40		T6	27
valid_sources[0x17]	291287	1			T1	2196		T2	6		T3	48
valid_sources[0x18]	287544	1			T1	2095		T2	11		T3	32
valid_sources[0x19]	325375	1			T1	2069		T2	9		T3	29
valid_sources[0x1a]	291747	1			T1	2033		T2	11		T3	42
valid_sources[0x1b]	289787	1			T1	2216		T2	2		T3	34
valid_sources[0x1c]	735973	1			T1	2094		T2	2		T3	46
valid_sources[0x1d]	723928	1			T1	2397		T2	25		T3	26
valid_sources[0x1e]	283523	1			T1	2037		T3	42		T6	38
valid_sources[0x1f]	286725	1			T1	2157		T2	30		T3	30
valid_sources[0x20]	294190	1			T1	2003		T2	4		T3	28
valid_sources[0x21]	298277	1			T1	2160		T2	3		T3	39
valid_sources[0x22]	283876	1			T1	2086		T2	19		T3	32
valid_sources[0x23]	289453	1			T1	2165		T2	3		T3	51
valid_sources[0x24]	765276	1			T1	2074		T2	16		T3	32
valid_sources[0x25]	283274	1			T1	2046		T2	5		T3	25
valid_sources[0x26]	603582	1			T1	2169		T2	2		T3	18
valid_sources[0x27]	527496	1			T1	2118		T2	4		T3	35
valid_sources[0x28]	290630	1			T1	2028		T2	32		T3	26
valid_sources[0x29]	286914	1			T1	2088		T2	4		T3	33
valid_sources[0x2a]	289932	1			T1	2175		T2	2		T3	25
valid_sources[0x2b]	294305	1			T1	2174		T2	8		T3	34
valid_sources[0x2c]	288226	1			T1	2146		T3	25		T6	43
valid_sources[0x2d]	286405	1			T1	2193		T2	6		T3	47
valid_sources[0x2e]	293877	1			T1	2190		T3	36		T6	41
valid_sources[0x2f]	293322	1			T1	2004		T2	1		T3	28
valid_sources[0x30]	289467	1			T1	1994		T2	6		T3	33
valid_sources[0x31]	286622	1			T1	2113		T2	6		T3	29
valid_sources[0x32]	287233	1			T1	2184		T2	3		T3	27
valid_sources[0x33]	284608	1			T1	2259		T2	20		T3	30
valid_sources[0x34]	302940	1			T1	2186		T2	12		T3	40
valid_sources[0x35]	288862	1			T1	2286		T3	36		T6	54
valid_sources[0x36]	292756	1			T1	1890		T2	6		T3	33
valid_sources[0x37]	291540	1			T1	2133		T2	5		T3	15
valid_sources[0x38]	284693	1			T1	2125		T2	9		T3	46
valid_sources[0x39]	294210	1			T1	2291		T2	12		T3	34
valid_sources[0x3a]	290445	1			T1	2247		T2	6		T3	30
valid_sources[0x3b]	287592	1			T1	2175		T2	3		T3	47
valid_sources[0x3c]	292654	1			T1	2217		T2	18		T3	27
valid_sources[0x3d]	286022	1			T1	2202		T2	15		T3	36
valid_sources[0x3e]	285815	1			T1	2160		T2	3		T3	30
valid_sources[0x3f]	290959	1			T1	2133		T2	6		T3	26
valid_sources[0x40]	284405	1			T1	2149		T2	12		T3	36
valid_sources[0x41]	289164	1			T1	2124		T2	5		T3	33
valid_sources[0x42]	774586	1			T1	2112		T2	4		T3	35
valid_sources[0x43]	286405	1			T1	2096		T2	8		T3	26
valid_sources[0x44]	777810	1			T1	2216		T3	34		T6	41
valid_sources[0x45]	286032	1			T1	2014		T2	4		T3	27
valid_sources[0x46]	288317	1			T1	2171		T2	10		T3	28
valid_sources[0x47]	293102	1			T1	2235		T2	3		T3	34
valid_sources[0x48]	287864	1			T1	2008		T2	3		T3	36
valid_sources[0x49]	288014	1			T1	1990		T2	2		T3	36
valid_sources[0x4a]	777857	1			T1	2081		T2	4		T3	20
valid_sources[0x4b]	333086	1			T1	2206		T2	9		T3	46
valid_sources[0x4c]	287716	1			T1	2084		T3	47		T6	61
valid_sources[0x4d]	297502	1			T1	2220		T2	10		T3	33
valid_sources[0x4e]	292088	1			T1	2220		T2	9		T3	35
valid_sources[0x4f]	290512	1			T1	2125		T2	9		T3	30
valid_sources[0x50]	288220	1			T1	2078		T2	2		T3	47
valid_sources[0x51]	287847	1			T1	2121		T2	5		T3	28
valid_sources[0x52]	292318	1			T1	2156		T2	18		T3	38
valid_sources[0x53]	286292	1			T1	2026		T2	26		T3	41
valid_sources[0x54]	291008	1			T1	2196		T2	12		T3	31
valid_sources[0x55]	290940	1			T1	2038		T2	4		T3	50
valid_sources[0x56]	672017	1			T1	2207		T2	3		T3	40
valid_sources[0x57]	536538	1			T1	2090		T2	15		T3	31
valid_sources[0x58]	285342	1			T1	2161		T2	11		T3	22
valid_sources[0x59]	299296	1			T1	2010		T2	2		T3	42
valid_sources[0x5a]	289772	1			T1	1966		T2	2		T3	34
valid_sources[0x5b]	527387	1			T1	2216		T2	16		T3	37
valid_sources[0x5c]	295817	1			T1	2064		T2	5		T3	39
valid_sources[0x5d]	296432	1			T1	2112		T2	14		T3	29
valid_sources[0x5e]	752293	1			T1	2007		T2	21		T3	49
valid_sources[0x5f]	297529	1			T1	2116		T2	4		T3	42
valid_sources[0x60]	299666	1			T1	2212		T2	9		T3	39
valid_sources[0x61]	285850	1			T1	2111		T2	2		T3	24
valid_sources[0x62]	286013	1			T1	2201		T2	5		T3	39
valid_sources[0x63]	290154	1			T1	2046		T2	10		T3	28
valid_sources[0x64]	291093	1			T1	2123		T2	10		T3	41
valid_sources[0x65]	294293	1			T1	2107		T2	2		T3	51
valid_sources[0x66]	307470	1			T1	2276		T2	2		T3	41
valid_sources[0x67]	289775	1			T1	2263		T2	3		T3	44
valid_sources[0x68]	298804	1			T1	2149		T2	17		T3	22
valid_sources[0x69]	286323	1			T1	2091		T2	6		T3	39
valid_sources[0x6a]	603407	1			T1	2236		T2	16		T3	37
valid_sources[0x6b]	293334	1			T1	2080		T2	6		T3	26
valid_sources[0x6c]	287873	1			T1	2123		T2	5		T3	33
valid_sources[0x6d]	537722	1			T1	2022		T2	7		T3	34
valid_sources[0x6e]	283622	1			T1	2162		T2	2		T3	23
valid_sources[0x6f]	289540	1			T1	2144		T2	7		T3	40
valid_sources[0x70]	293795	1			T1	2195		T2	7		T3	24
valid_sources[0x71]	288747	1			T1	2109		T2	1		T3	38
valid_sources[0x72]	311276	1			T1	2121		T2	7		T3	38
valid_sources[0x73]	294051	1			T1	2215		T2	3		T3	32
valid_sources[0x74]	761807	1			T1	2081		T2	24		T3	40
valid_sources[0x75]	771629	1			T1	2169		T2	21		T3	27
valid_sources[0x76]	630486	1			T1	2197		T2	10		T3	28
valid_sources[0x77]	289297	1			T1	2104		T2	6		T3	41
valid_sources[0x78]	654826	1			T1	2051		T2	14		T3	48
valid_sources[0x79]	283307	1			T1	2202		T2	1		T3	39
valid_sources[0x7a]	1089032	1			T1	2225		T2	8		T3	30
valid_sources[0x7b]	291459	1			T1	2009		T2	17		T3	32
valid_sources[0x7c]	611447	1			T1	2173		T2	5		T3	33
valid_sources[0x7d]	295907	1			T1	2152		T2	2		T3	32
valid_sources[0x7e]	287006	1			T1	2269		T2	5		T3	31
valid_sources[0x7f]	287316	1			T1	2122		T3	24		T6	41
valid_sources[0x80]	724503	1			T1	2322		T2	4		T3	34

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6944044

1

T1

39740

T2

120

T3

800

values[0x0]

all_enables

biggest_size

14720390

1

T1

89479

T2

310

T3

1403

values[0x1]

all_enables

biggest_size

8559824

1

T1

57887

T2

192

T3

749