Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
93.22	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	4	40	90.91

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	4	40	90.91	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	173	1			T4	2		T5	1		T19	1
index[0x1]	151	1			T1	1		T20	1		T4	1
index[0x2]	156	1			T15	1		T13	1		T4	2
index[0x3]	147	1			T7	1		T4	2		T26	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	204	1			T1	1		T7	1		T20	1
lens_less_than_1000[1]	142	1			T13	1		T4	3		T16	2
lens_less_than_1000[2]	78	1			T23	1		T25	1		T29	1
lens_less_than_1000[3]	64	1			T18	1		T23	1		T72	1
lens_less_than_1000[4]	46	1			T15	1		T4	1		T47	1
lens_less_than_1000[5]	31	1			T34	4		T84	1		T248	1
lens_less_than_1000[6]	29	1			T26	1		T78	1		T31	1
lens_less_than_1000[7]	9	1			T66	1		T87	1		T97	1
lens_less_than_1000[8]	16	1			T4	1		T63	1		T262	1
lens_less_than_1000[9]	3	1			T263	1		T264	1		T265	1
len_2	5	1			T17	1		T65	1		T266	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	4	40	90.91	4

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0]]	[lens_less_than_1000[9]]	0	1	1
[index[0x2]]	[lens_less_than_1000[9]]	0	1	1
[index[0x3]]	[lens_less_than_1000[8]]	0	1	1
[index[0x3]]	[len_2]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	42	1			T4	1		T5	1		T19	1
index[0x0]	lens_less_than_1000[1]	49	1			T4	1		T16	1		T66	1
index[0x0]	lens_less_than_1000[2]	25	1			T23	1		T29	1		T78	1
index[0x0]	lens_less_than_1000[3]	21	1			T21	1		T34	1		T32	1
index[0x0]	lens_less_than_1000[4]	8	1			T52	1		T97	1		T267	1
index[0x0]	lens_less_than_1000[5]	12	1			T34	2		T268	1		T269	1
index[0x0]	lens_less_than_1000[6]	4	1			T39	1		T270	1		T271	1
index[0x0]	lens_less_than_1000[7]	6	1			T66	1		T87	1		T272	3
index[0x0]	lens_less_than_1000[8]	4	1			T262	1		T110	1		T116	1
index[0x0]	len_2	2	1			T65	1		T273	1		-	-
index[0x1]	lens_less_than_1000[0]	60	1			T1	1		T20	1		T19	1
index[0x1]	lens_less_than_1000[1]	30	1			T23	6		T122	1		T34	2
index[0x1]	lens_less_than_1000[2]	19	1			T25	1		T274	1		T31	1
index[0x1]	lens_less_than_1000[3]	10	1			T18	1		T78	1		T107	1
index[0x1]	lens_less_than_1000[4]	9	1			T29	1		T34	1		T107	1
index[0x1]	lens_less_than_1000[5]	6	1			T34	2		T114	1		T275	1
index[0x1]	lens_less_than_1000[6]	7	1			T31	1		T32	1		T268	1
index[0x1]	lens_less_than_1000[7]	1	1			T240	1		-	-		-	-
index[0x1]	lens_less_than_1000[8]	6	1			T4	1		T63	1		T87	1
index[0x1]	lens_less_than_1000[9]	1	1			T264	1		-	-		-	-
index[0x1]	len_2	2	1			T17	1		T276	1		-	-
index[0x2]	lens_less_than_1000[0]	54	1			T23	1		T66	1		T69	1
index[0x2]	lens_less_than_1000[1]	27	1			T13	1		T4	1		T16	1
index[0x2]	lens_less_than_1000[2]	20	1			T108	1		T96	1		T248	1
index[0x2]	lens_less_than_1000[3]	16	1			T23	1		T34	1		T79	1
index[0x2]	lens_less_than_1000[4]	16	1			T15	1		T4	1		T32	1
index[0x2]	lens_less_than_1000[5]	6	1			T84	1		T248	1		T277	1
index[0x2]	lens_less_than_1000[6]	9	1			T78	1		T191	1		T55	1
index[0x2]	lens_less_than_1000[7]	1	1			T97	1		-	-		-	-
index[0x2]	lens_less_than_1000[8]	6	1			T278	1		T52	2		T279	1
index[0x2]	len_2	1	1			T266	1		-	-		-	-
index[0x3]	lens_less_than_1000[0]	48	1			T7	1		T4	1		T72	1
index[0x3]	lens_less_than_1000[1]	36	1			T4	1		T72	2		T127	2
index[0x3]	lens_less_than_1000[2]	14	1			T107	1		T93	2		T280	1
index[0x3]	lens_less_than_1000[3]	17	1			T72	1		T29	1		T77	1
index[0x3]	lens_less_than_1000[4]	13	1			T47	1		T27	1		T112	4
index[0x3]	lens_less_than_1000[5]	7	1			T281	1		T282	1		T283	1
index[0x3]	lens_less_than_1000[6]	9	1			T26	1		T107	1		T100	1
index[0x3]	lens_less_than_1000[7]	1	1			T284	1		-	-		-	-
index[0x3]	lens_less_than_1000[9]	2	1			T263	1		T265	1		-	-