Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
96.61	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	2	42	95.45

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	2	42	95.45	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	213	1			T4	1		T49	1		T32	1
index[0x1]	147	1			T21	1		T22	1		T4	1
index[0x2]	164	1			T2	1		T21	1		T31	3
index[0x3]	195	1			T19	1		T21	1		T32	3

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	242	1			T2	1		T19	1		T22	1
lens_less_than_1000[1]	149	1			T31	1		T32	3		T204	1
lens_less_than_1000[2]	108	1			T21	1		T32	2		T66	1
lens_less_than_1000[3]	66	1			T21	1		T76	1		T35	1
lens_less_than_1000[4]	56	1			T21	1		T49	1		T73	1
lens_less_than_1000[5]	32	1			T31	1		T234	1		T90	1
lens_less_than_1000[6]	29	1			T274	2		T275	1		T276	1
lens_less_than_1000[7]	11	1			T50	1		T73	1		T91	1
lens_less_than_1000[8]	10	1			T75	1		T227	1		T29	1
lens_less_than_1000[9]	8	1			T30	3		T277	1		T247	4
len_2	8	1			T30	2		T217	1		T278	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	2	42	95.45	2

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0] , index[0x1]]	[lens_less_than_1000[9]]	--	--	2

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	81	1			T4	1		T68	1		T50	1
index[0x0]	lens_less_than_1000[1]	54	1			T32	1		T228	1		T30	8
index[0x0]	lens_less_than_1000[2]	33	1			T76	1		T34	1		T279	1
index[0x0]	lens_less_than_1000[3]	10	1			T83	1		T98	1		T280	1
index[0x0]	lens_less_than_1000[4]	14	1			T49	1		T220	1		T171	1
index[0x0]	lens_less_than_1000[5]	4	1			T234	1		T281	1		T282	1
index[0x0]	lens_less_than_1000[6]	11	1			T274	2		T275	1		T42	1
index[0x0]	lens_less_than_1000[7]	1	1			T91	1		-	-		-	-
index[0x0]	lens_less_than_1000[8]	4	1			T233	1		T169	2		T99	1
index[0x0]	len_2	1	1			T106	1		-	-		-	-
index[0x1]	lens_less_than_1000[0]	43	1			T22	1		T4	1		T32	1
index[0x1]	lens_less_than_1000[1]	27	1			T204	1		T97	1		T36	1
index[0x1]	lens_less_than_1000[2]	16	1			T33	1		T50	1		T78	1
index[0x1]	lens_less_than_1000[3]	21	1			T76	1		T30	3		T81	1
index[0x1]	lens_less_than_1000[4]	16	1			T21	1		T73	1		T283	1
index[0x1]	lens_less_than_1000[5]	10	1			T90	1		T40	1		T284	1
index[0x1]	lens_less_than_1000[6]	8	1			T276	1		T285	1		T23	1
index[0x1]	lens_less_than_1000[7]	3	1			T50	1		T286	1		T251	1
index[0x1]	lens_less_than_1000[8]	2	1			T75	1		T227	1		-	-
index[0x1]	len_2	1	1			T287	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	59	1			T2	1		T31	1		T66	1
index[0x2]	lens_less_than_1000[1]	29	1			T31	1		T33	2		T53	1
index[0x2]	lens_less_than_1000[2]	31	1			T21	1		T32	1		T66	1
index[0x2]	lens_less_than_1000[3]	16	1			T35	1		T212	1		T238	1
index[0x2]	lens_less_than_1000[4]	10	1			T55	1		T288	1		T105	1
index[0x2]	lens_less_than_1000[5]	9	1			T31	1		T289	1		T251	1
index[0x2]	lens_less_than_1000[6]	1	1			T256	1		-	-		-	-
index[0x2]	lens_less_than_1000[7]	4	1			T169	1		T57	1		T290	1
index[0x2]	lens_less_than_1000[8]	1	1			T291	1		-	-		-	-
index[0x2]	lens_less_than_1000[9]	1	1			T277	1		-	-		-	-
index[0x2]	len_2	3	1			T217	1		T278	1		T292	1
index[0x3]	lens_less_than_1000[0]	59	1			T19	1		T34	1		T50	1
index[0x3]	lens_less_than_1000[1]	39	1			T32	2		T73	1		T81	1
index[0x3]	lens_less_than_1000[2]	28	1			T32	1		T73	1		T293	1
index[0x3]	lens_less_than_1000[3]	19	1			T21	1		T228	1		T88	1
index[0x3]	lens_less_than_1000[4]	16	1			T172	1		T294	1		T295	1
index[0x3]	lens_less_than_1000[5]	9	1			T171	1		T61	1		T23	1
index[0x3]	lens_less_than_1000[6]	9	1			T285	3		T23	1		T296	1
index[0x3]	lens_less_than_1000[7]	3	1			T73	1		T297	1		T298	1
index[0x3]	lens_less_than_1000[8]	3	1			T29	1		T30	1		T86	1
index[0x3]	lens_less_than_1000[9]	7	1			T30	3		T247	4		-	-
index[0x3]	len_2	3	1			T30	2		T269	1		-	-