Module Definition
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Module : alert_handler_reg_top
SCORELINECONDTOGGLEFSMBRANCHASSERT
99.16 100.00 96.65 100.00 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_alert_handler_reg_0.1/rtl/alert_handler_reg_top.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_reg_wrap.u_reg 99.16 100.00 96.65 100.00 100.00

Line Coverage for Module : alert_handler_reg_top
Line No.TotalCoveredPercent
TOTAL22282228100.00
ALWAYS7244100.00
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CONT_ASSIGN1693211100.00
CONT_ASSIGN1693411100.00
CONT_ASSIGN1693511100.00
CONT_ASSIGN1693611100.00
CONT_ASSIGN1693811100.00
CONT_ASSIGN1693911100.00
CONT_ASSIGN1694011100.00
CONT_ASSIGN1694211100.00
CONT_ASSIGN1694311100.00
CONT_ASSIGN1694411100.00
CONT_ASSIGN1694611100.00
CONT_ASSIGN1694711100.00
CONT_ASSIGN1694811100.00
CONT_ASSIGN1695011100.00
CONT_ASSIGN1695111100.00
CONT_ASSIGN1695211100.00
CONT_ASSIGN1695411100.00
CONT_ASSIGN1695511100.00
CONT_ASSIGN1695611100.00
CONT_ASSIGN1695811100.00
CONT_ASSIGN1695911100.00
CONT_ASSIGN1696011100.00
CONT_ASSIGN1696211100.00
CONT_ASSIGN1696311100.00
CONT_ASSIGN1696411100.00
CONT_ASSIGN1696611100.00
CONT_ASSIGN1696711100.00
CONT_ASSIGN1696811100.00
CONT_ASSIGN1697011100.00
CONT_ASSIGN1697111100.00
CONT_ASSIGN1697211100.00
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CONT_ASSIGN1697511100.00
CONT_ASSIGN1697611100.00
CONT_ASSIGN1697811100.00
CONT_ASSIGN1697911100.00
CONT_ASSIGN1698011100.00
CONT_ASSIGN1698211100.00
CONT_ASSIGN1698311100.00
CONT_ASSIGN1698411100.00
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CONT_ASSIGN1698711100.00
CONT_ASSIGN1698811100.00
CONT_ASSIGN1699011100.00
CONT_ASSIGN1699111100.00
CONT_ASSIGN1699211100.00
CONT_ASSIGN1699411100.00
CONT_ASSIGN1699511100.00
CONT_ASSIGN1699611100.00
CONT_ASSIGN1699811100.00
CONT_ASSIGN1699911100.00
CONT_ASSIGN1700011100.00
CONT_ASSIGN1700211100.00
CONT_ASSIGN1700311100.00
CONT_ASSIGN1700411100.00
CONT_ASSIGN1700611100.00
CONT_ASSIGN1700711100.00
CONT_ASSIGN1700811100.00
CONT_ASSIGN1701011100.00
CONT_ASSIGN1701111100.00
CONT_ASSIGN1701211100.00
CONT_ASSIGN1701411100.00
CONT_ASSIGN1701511100.00
CONT_ASSIGN1701611100.00
CONT_ASSIGN1701811100.00
CONT_ASSIGN1701911100.00
CONT_ASSIGN1702011100.00
CONT_ASSIGN1702211100.00
CONT_ASSIGN1702311100.00
CONT_ASSIGN1702411100.00
CONT_ASSIGN1702611100.00
CONT_ASSIGN1702711100.00
CONT_ASSIGN1702811100.00
CONT_ASSIGN1703011100.00
CONT_ASSIGN1703111100.00
CONT_ASSIGN1703311100.00
CONT_ASSIGN1703411100.00
CONT_ASSIGN1703611100.00
CONT_ASSIGN1703711100.00
CONT_ASSIGN1703911100.00
CONT_ASSIGN1704011100.00
CONT_ASSIGN1704211100.00
CONT_ASSIGN1704311100.00
CONT_ASSIGN1704511100.00
CONT_ASSIGN1704611100.00
CONT_ASSIGN1704811100.00
CONT_ASSIGN1704911100.00
CONT_ASSIGN1705111100.00
CONT_ASSIGN1705211100.00
CONT_ASSIGN1705411100.00
CONT_ASSIGN1705511100.00
CONT_ASSIGN1705711100.00
CONT_ASSIGN1705811100.00
CONT_ASSIGN1706011100.00
CONT_ASSIGN1706111100.00
CONT_ASSIGN1706311100.00
CONT_ASSIGN1706411100.00
CONT_ASSIGN1706611100.00
CONT_ASSIGN1706711100.00
CONT_ASSIGN1706911100.00
CONT_ASSIGN1707011100.00
CONT_ASSIGN1707211100.00
CONT_ASSIGN1707311100.00
CONT_ASSIGN1707511100.00
CONT_ASSIGN1707611100.00
CONT_ASSIGN1707811100.00
CONT_ASSIGN1707911100.00
CONT_ASSIGN1708111100.00
CONT_ASSIGN1708211100.00
CONT_ASSIGN1708411100.00
CONT_ASSIGN1708511100.00
CONT_ASSIGN1708711100.00
CONT_ASSIGN1708811100.00
CONT_ASSIGN1709011100.00
CONT_ASSIGN1709111100.00
CONT_ASSIGN1709311100.00
CONT_ASSIGN1709411100.00
CONT_ASSIGN1709611100.00
CONT_ASSIGN1709711100.00
CONT_ASSIGN1709911100.00
CONT_ASSIGN1710011100.00
CONT_ASSIGN1710211100.00
CONT_ASSIGN1710311100.00
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CONT_ASSIGN1710611100.00
CONT_ASSIGN1710811100.00
CONT_ASSIGN1710911100.00
CONT_ASSIGN1711111100.00
CONT_ASSIGN1711211100.00
CONT_ASSIGN1711411100.00
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CONT_ASSIGN1711711100.00
CONT_ASSIGN1711811100.00
CONT_ASSIGN1712011100.00
CONT_ASSIGN1712111100.00
CONT_ASSIGN1712311100.00
CONT_ASSIGN1712411100.00
CONT_ASSIGN1712611100.00
CONT_ASSIGN1712711100.00
CONT_ASSIGN1712911100.00
CONT_ASSIGN1713011100.00
CONT_ASSIGN1713211100.00
CONT_ASSIGN1713311100.00
CONT_ASSIGN1713511100.00
CONT_ASSIGN1713611100.00
CONT_ASSIGN1713811100.00
CONT_ASSIGN1713911100.00
CONT_ASSIGN1714111100.00
CONT_ASSIGN1714211100.00
CONT_ASSIGN1714411100.00
CONT_ASSIGN1714511100.00
CONT_ASSIGN1714711100.00
CONT_ASSIGN1714811100.00
CONT_ASSIGN1715011100.00
CONT_ASSIGN1715111100.00
CONT_ASSIGN1715311100.00
CONT_ASSIGN1715411100.00
CONT_ASSIGN1715611100.00
CONT_ASSIGN1715711100.00
CONT_ASSIGN1715911100.00
CONT_ASSIGN1716011100.00
CONT_ASSIGN1716211100.00
CONT_ASSIGN1716311100.00
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CONT_ASSIGN1716611100.00
CONT_ASSIGN1716811100.00
CONT_ASSIGN1716911100.00
CONT_ASSIGN1717111100.00
CONT_ASSIGN1717211100.00
CONT_ASSIGN1717411100.00
CONT_ASSIGN1717511100.00
CONT_ASSIGN1717711100.00
CONT_ASSIGN1717811100.00
CONT_ASSIGN1718011100.00
CONT_ASSIGN1718111100.00
CONT_ASSIGN1718311100.00
CONT_ASSIGN1718411100.00
CONT_ASSIGN1718611100.00
CONT_ASSIGN1718711100.00
CONT_ASSIGN1718911100.00
CONT_ASSIGN1719011100.00
CONT_ASSIGN1719211100.00
CONT_ASSIGN1719311100.00
CONT_ASSIGN1719511100.00
CONT_ASSIGN1719611100.00
CONT_ASSIGN1719811100.00
CONT_ASSIGN1719911100.00
CONT_ASSIGN1720111100.00
CONT_ASSIGN1720211100.00
CONT_ASSIGN1720411100.00
CONT_ASSIGN1720511100.00
CONT_ASSIGN1720711100.00
CONT_ASSIGN1720811100.00
CONT_ASSIGN1721011100.00
CONT_ASSIGN1721111100.00
CONT_ASSIGN1721311100.00
CONT_ASSIGN1721411100.00
CONT_ASSIGN1721611100.00
CONT_ASSIGN1721711100.00
CONT_ASSIGN1721911100.00
CONT_ASSIGN1722011100.00
CONT_ASSIGN1722211100.00
CONT_ASSIGN1722311100.00
CONT_ASSIGN1722511100.00
CONT_ASSIGN1722611100.00
CONT_ASSIGN1722811100.00
CONT_ASSIGN1722911100.00
CONT_ASSIGN1723111100.00
CONT_ASSIGN1723211100.00
CONT_ASSIGN1723411100.00
CONT_ASSIGN1723511100.00
CONT_ASSIGN1723711100.00
CONT_ASSIGN1723811100.00
CONT_ASSIGN1724011100.00
CONT_ASSIGN1724111100.00
CONT_ASSIGN1724311100.00
CONT_ASSIGN1724411100.00
CONT_ASSIGN1724611100.00
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CONT_ASSIGN1724811100.00
CONT_ASSIGN1725011100.00
CONT_ASSIGN1725111100.00
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CONT_ASSIGN1725411100.00
CONT_ASSIGN1725511100.00
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CONT_ASSIGN1726011100.00
CONT_ASSIGN1726211100.00
CONT_ASSIGN1726311100.00
CONT_ASSIGN1726411100.00
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CONT_ASSIGN1726811100.00
CONT_ASSIGN1727011100.00
CONT_ASSIGN1727111100.00
CONT_ASSIGN1727211100.00
CONT_ASSIGN1727411100.00
CONT_ASSIGN1727511100.00
CONT_ASSIGN1727611100.00
CONT_ASSIGN1727811100.00
CONT_ASSIGN1727911100.00
CONT_ASSIGN1728011100.00
CONT_ASSIGN1728211100.00
CONT_ASSIGN1728311100.00
CONT_ASSIGN1728411100.00
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CONT_ASSIGN1728711100.00
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CONT_ASSIGN1729011100.00
CONT_ASSIGN1729111100.00
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CONT_ASSIGN1729411100.00
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CONT_ASSIGN1730911100.00
CONT_ASSIGN1731111100.00
CONT_ASSIGN1731211100.00
CONT_ASSIGN1731411100.00
CONT_ASSIGN1731511100.00
CONT_ASSIGN1731711100.00
CONT_ASSIGN1731811100.00
CONT_ASSIGN1732011100.00
CONT_ASSIGN1732111100.00
CONT_ASSIGN1732311100.00
CONT_ASSIGN1732411100.00
CONT_ASSIGN1732611100.00
CONT_ASSIGN1732711100.00
CONT_ASSIGN1732811100.00
CONT_ASSIGN1733011100.00
CONT_ASSIGN1733211100.00
CONT_ASSIGN1733411100.00
CONT_ASSIGN1733611100.00
CONT_ASSIGN1733811100.00
CONT_ASSIGN1734011100.00
CONT_ASSIGN1734211100.00
CONT_ASSIGN1734411100.00
CONT_ASSIGN1734611100.00
CONT_ASSIGN1734811100.00
CONT_ASSIGN1734911100.00
CONT_ASSIGN1735111100.00
CONT_ASSIGN1735211100.00
CONT_ASSIGN1735311100.00
CONT_ASSIGN1735511100.00
CONT_ASSIGN1735611100.00
CONT_ASSIGN1735711100.00
CONT_ASSIGN1735811100.00
CONT_ASSIGN1736011100.00
CONT_ASSIGN1736111100.00
CONT_ASSIGN1736211100.00
CONT_ASSIGN1736411100.00
CONT_ASSIGN1736511100.00
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CONT_ASSIGN1736911100.00
CONT_ASSIGN1737011100.00
CONT_ASSIGN1737211100.00
CONT_ASSIGN1737311100.00
CONT_ASSIGN1737411100.00
CONT_ASSIGN1737611100.00
CONT_ASSIGN1737711100.00
CONT_ASSIGN1737811100.00
CONT_ASSIGN1738011100.00
CONT_ASSIGN1738111100.00
CONT_ASSIGN1738211100.00
CONT_ASSIGN1738411100.00
CONT_ASSIGN1738511100.00
CONT_ASSIGN1738611100.00
CONT_ASSIGN1738711100.00
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CONT_ASSIGN1739011100.00
CONT_ASSIGN1739111100.00
CONT_ASSIGN1739311100.00
CONT_ASSIGN1739511100.00
CONT_ASSIGN1739711100.00
CONT_ASSIGN1739911100.00
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CONT_ASSIGN1740311100.00
CONT_ASSIGN1740511100.00
CONT_ASSIGN1740711100.00
CONT_ASSIGN1740911100.00
CONT_ASSIGN1741111100.00
CONT_ASSIGN1741211100.00
CONT_ASSIGN1741411100.00
CONT_ASSIGN1741511100.00
CONT_ASSIGN1741611100.00
CONT_ASSIGN1741811100.00
CONT_ASSIGN1741911100.00
CONT_ASSIGN1742011100.00
CONT_ASSIGN1742111100.00
CONT_ASSIGN1742311100.00
CONT_ASSIGN1742411100.00
CONT_ASSIGN1742511100.00
CONT_ASSIGN1742711100.00
CONT_ASSIGN1742811100.00
CONT_ASSIGN1742911100.00
CONT_ASSIGN1743111100.00
CONT_ASSIGN1743211100.00
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CONT_ASSIGN1743511100.00
CONT_ASSIGN1743611100.00
CONT_ASSIGN1743711100.00
CONT_ASSIGN1743911100.00
CONT_ASSIGN1744011100.00
CONT_ASSIGN1744111100.00
CONT_ASSIGN1744311100.00
CONT_ASSIGN1744411100.00
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CONT_ASSIGN1745011100.00
CONT_ASSIGN1745211100.00
CONT_ASSIGN1745311100.00
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CONT_ASSIGN1745611100.00
CONT_ASSIGN1745811100.00
CONT_ASSIGN1746011100.00
CONT_ASSIGN1746211100.00
CONT_ASSIGN1746411100.00
CONT_ASSIGN1746611100.00
CONT_ASSIGN1746811100.00
CONT_ASSIGN1747011100.00
CONT_ASSIGN1747211100.00
CONT_ASSIGN1747411100.00
CONT_ASSIGN1747511100.00
CONT_ASSIGN1747711100.00
CONT_ASSIGN1747811100.00
CONT_ASSIGN1747911100.00
CONT_ASSIGN1748111100.00
CONT_ASSIGN1748211100.00
CONT_ASSIGN1748311100.00
CONT_ASSIGN1748411100.00
CONT_ASSIGN1748611100.00
CONT_ASSIGN1748711100.00
CONT_ASSIGN1748811100.00
CONT_ASSIGN1749011100.00
CONT_ASSIGN1749111100.00
CONT_ASSIGN1749211100.00
CONT_ASSIGN1749411100.00
CONT_ASSIGN1749511100.00
CONT_ASSIGN1749611100.00
CONT_ASSIGN1749811100.00
CONT_ASSIGN1749911100.00
CONT_ASSIGN1750011100.00
CONT_ASSIGN1750211100.00
CONT_ASSIGN1750311100.00
CONT_ASSIGN1750411100.00
CONT_ASSIGN1750611100.00
CONT_ASSIGN1750711100.00
CONT_ASSIGN1750811100.00
CONT_ASSIGN1751011100.00
CONT_ASSIGN1751111100.00
CONT_ASSIGN1751211100.00
CONT_ASSIGN1751311100.00
CONT_ASSIGN1751511100.00
CONT_ASSIGN1751611100.00
CONT_ASSIGN1751711100.00
CONT_ASSIGN1751911100.00
CONT_ASSIGN1752111100.00
CONT_ASSIGN1752311100.00
CONT_ASSIGN1752511100.00
CONT_ASSIGN1752711100.00
CONT_ASSIGN1752911100.00
CONT_ASSIGN1753111100.00
CONT_ASSIGN1753311100.00
CONT_ASSIGN1753511100.00
CONT_ASSIGN1753711100.00
CONT_ASSIGN1753811100.00
CONT_ASSIGN1754011100.00
CONT_ASSIGN1754111100.00
CONT_ASSIGN1754211100.00
CONT_ASSIGN1754411100.00
CONT_ASSIGN1754511100.00
CONT_ASSIGN1754611100.00
CONT_ASSIGN1754711100.00
CONT_ASSIGN1754911100.00
CONT_ASSIGN1755011100.00
CONT_ASSIGN1755111100.00
CONT_ASSIGN1755311100.00
CONT_ASSIGN1755411100.00
CONT_ASSIGN1755511100.00
CONT_ASSIGN1755711100.00
CONT_ASSIGN1755811100.00
CONT_ASSIGN1755911100.00
CONT_ASSIGN1756111100.00
CONT_ASSIGN1756211100.00
CONT_ASSIGN1756311100.00
CONT_ASSIGN1756511100.00
CONT_ASSIGN1756611100.00
CONT_ASSIGN1756711100.00
CONT_ASSIGN1756911100.00
CONT_ASSIGN1757011100.00
CONT_ASSIGN1757111100.00
CONT_ASSIGN1757311100.00
CONT_ASSIGN1757411100.00
CONT_ASSIGN1757511100.00
ALWAYS17579351351100.00
ALWAYS17934397397100.00
ALWAYS1939233100.00
ALWAYS1940033100.00
CONT_ASSIGN1940811100.00
CONT_ASSIGN1941111100.00
CONT_ASSIGN1963111100.00
CONT_ASSIGN1985311100.00
CONT_ASSIGN1986111100.00
CONT_ASSIGN1986211100.00

Click here to see the source line report.

Cond Coverage for Module : alert_handler_reg_top
TotalCoveredPercent
Conditions4800463996.65
Logical4800463996.65
Non-Logical00
Event00

This module contains a very large number of conditions, so the report has been split into multiple pages, by source line number. Click on the line number range in the table below to see the condition coverage for that section of the module.
Line numbersPercent
62-9447100.00
11576-15681100.00
15682-15861100.00
15862-15924100.00
15924100.00
15924100.00
15924-1641899.51
16421-1666493.52
16667-1688788.29
16888-1713692.99
17139-1742993.69
17432-1940890.31

Branch Coverage for Module : alert_handler_reg_top
Line No.TotalCoveredPercent
Branches 360 360 100.00
TERNARY 15920 2 2 100.00
IF 72 3 3 100.00
CASE 17935 351 351 100.00
IF 19392 2 2 100.00
IF 19400 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_alert_handler_reg_0.1/rtl/alert_handler_reg_top.sv' or '../src/lowrisc_opentitan_top_earlgrey_alert_handler_reg_0.1/rtl/alert_handler_reg_top.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 15920 ((reg_re || reg_we)) ?

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3


LineNo. Expression -1-: 72 if ((!rst_ni)) -2-: 74 if ((intg_err || reg_we_err))

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Covered T10,T11,T12
0 0 Covered T1,T2,T3


LineNo. Expression -1-: 17935 case (1'b1)

Branches:
-1-StatusTests
addr_hit[0] Covered T1,T2,T3
addr_hit[1] Covered T1,T2,T3
addr_hit[2] Covered T1,T2,T3
addr_hit[3] Covered T1,T2,T3
addr_hit[4] Covered T1,T2,T3
addr_hit[5] Covered T1,T2,T3
addr_hit[6] Covered T1,T2,T3
addr_hit[7] Covered T1,T2,T3
addr_hit[8] Covered T1,T2,T3
addr_hit[9] Covered T1,T2,T3
addr_hit[10] Covered T1,T2,T3
addr_hit[11] Covered T1,T2,T3
addr_hit[12] Covered T1,T2,T3
addr_hit[13] Covered T1,T2,T3
addr_hit[14] Covered T1,T2,T3
addr_hit[15] Covered T1,T2,T3
addr_hit[16] Covered T1,T2,T3
addr_hit[17] Covered T1,T2,T3
addr_hit[18] Covered T1,T2,T3
addr_hit[19] Covered T1,T2,T3
addr_hit[20] Covered T1,T2,T3
addr_hit[21] Covered T1,T2,T3
addr_hit[22] Covered T1,T2,T3
addr_hit[23] Covered T1,T2,T3
addr_hit[24] Covered T1,T2,T3
addr_hit[25] Covered T1,T2,T3
addr_hit[26] Covered T1,T2,T3
addr_hit[27] Covered T1,T2,T3
addr_hit[28] Covered T1,T2,T3
addr_hit[29] Covered T1,T2,T3
addr_hit[30] Covered T1,T2,T3
addr_hit[31] Covered T1,T2,T3
addr_hit[32] Covered T1,T2,T3
addr_hit[33] Covered T1,T2,T3
addr_hit[34] Covered T1,T2,T3
addr_hit[35] Covered T1,T2,T3
addr_hit[36] Covered T1,T2,T3
addr_hit[37] Covered T1,T2,T3
addr_hit[38] Covered T1,T2,T3
addr_hit[39] Covered T1,T2,T3
addr_hit[40] Covered T1,T2,T3
addr_hit[41] Covered T1,T2,T3
addr_hit[42] Covered T1,T2,T3
addr_hit[43] Covered T1,T2,T3
addr_hit[44] Covered T1,T2,T3
addr_hit[45] Covered T1,T2,T3
addr_hit[46] Covered T1,T2,T3
addr_hit[47] Covered T1,T2,T3
addr_hit[48] Covered T1,T2,T3
addr_hit[49] Covered T1,T2,T3
addr_hit[50] Covered T1,T2,T3
addr_hit[51] Covered T1,T2,T3
addr_hit[52] Covered T1,T2,T3
addr_hit[53] Covered T1,T2,T3
addr_hit[54] Covered T1,T2,T3
addr_hit[55] Covered T1,T2,T3
addr_hit[56] Covered T1,T2,T3
addr_hit[57] Covered T1,T2,T3
addr_hit[58] Covered T1,T2,T3
addr_hit[59] Covered T1,T2,T3
addr_hit[60] Covered T1,T2,T3
addr_hit[61] Covered T1,T2,T3
addr_hit[62] Covered T1,T2,T3
addr_hit[63] Covered T1,T2,T3
addr_hit[64] Covered T1,T2,T3
addr_hit[65] Covered T1,T2,T3
addr_hit[66] Covered T1,T2,T3
addr_hit[67] Covered T1,T2,T3
addr_hit[68] Covered T1,T2,T3
addr_hit[69] Covered T1,T2,T3
addr_hit[70] Covered T1,T2,T3
addr_hit[71] Covered T1,T2,T3
addr_hit[72] Covered T1,T2,T3
addr_hit[73] Covered T1,T2,T3
addr_hit[74] Covered T1,T2,T3
addr_hit[75] Covered T1,T2,T3
addr_hit[76] Covered T1,T2,T3
addr_hit[77] Covered T1,T2,T3
addr_hit[78] Covered T1,T2,T3
addr_hit[79] Covered T1,T2,T3
addr_hit[80] Covered T1,T2,T3
addr_hit[81] Covered T1,T2,T3
addr_hit[82] Covered T1,T2,T3
addr_hit[83] Covered T1,T2,T3
addr_hit[84] Covered T1,T2,T3
addr_hit[85] Covered T1,T2,T3
addr_hit[86] Covered T1,T2,T3
addr_hit[87] Covered T1,T2,T3
addr_hit[88] Covered T1,T2,T3
addr_hit[89] Covered T1,T2,T3
addr_hit[90] Covered T1,T2,T3
addr_hit[91] Covered T1,T2,T3
addr_hit[92] Covered T1,T2,T3
addr_hit[93] Covered T1,T2,T3
addr_hit[94] Covered T1,T2,T3
addr_hit[95] Covered T1,T2,T3
addr_hit[96] Covered T1,T2,T3
addr_hit[97] Covered T1,T2,T3
addr_hit[98] Covered T1,T2,T3
addr_hit[99] Covered T1,T2,T3
addr_hit[100] Covered T1,T2,T3
addr_hit[101] Covered T1,T2,T3
addr_hit[102] Covered T1,T2,T3
addr_hit[103] Covered T1,T2,T3
addr_hit[104] Covered T1,T2,T3
addr_hit[105] Covered T1,T2,T3
addr_hit[106] Covered T1,T2,T3
addr_hit[107] Covered T1,T2,T3
addr_hit[108] Covered T1,T2,T3
addr_hit[109] Covered T1,T2,T3
addr_hit[110] Covered T1,T2,T3
addr_hit[111] Covered T1,T2,T3
addr_hit[112] Covered T1,T2,T3
addr_hit[113] Covered T1,T2,T3
addr_hit[114] Covered T1,T2,T3
addr_hit[115] Covered T1,T2,T3
addr_hit[116] Covered T1,T2,T3
addr_hit[117] Covered T1,T2,T3
addr_hit[118] Covered T1,T2,T3
addr_hit[119] Covered T1,T2,T3
addr_hit[120] Covered T1,T2,T3
addr_hit[121] Covered T1,T2,T3
addr_hit[122] Covered T1,T2,T3
addr_hit[123] Covered T1,T2,T3
addr_hit[124] Covered T1,T2,T3
addr_hit[125] Covered T1,T2,T3
addr_hit[126] Covered T1,T2,T3
addr_hit[127] Covered T1,T2,T3
addr_hit[128] Covered T1,T2,T3
addr_hit[129] Covered T1,T2,T3
addr_hit[130] Covered T1,T2,T3
addr_hit[131] Covered T1,T2,T3
addr_hit[132] Covered T1,T2,T3
addr_hit[133] Covered T1,T2,T3
addr_hit[134] Covered T1,T2,T3
addr_hit[135] Covered T1,T2,T3
addr_hit[136] Covered T1,T2,T3
addr_hit[137] Covered T1,T2,T3
addr_hit[138] Covered T1,T2,T3
addr_hit[139] Covered T1,T2,T3
addr_hit[140] Covered T1,T2,T3
addr_hit[141] Covered T1,T2,T3
addr_hit[142] Covered T1,T2,T3
addr_hit[143] Covered T1,T2,T3
addr_hit[144] Covered T1,T2,T3
addr_hit[145] Covered T1,T2,T3
addr_hit[146] Covered T1,T2,T3
addr_hit[147] Covered T1,T2,T3
addr_hit[148] Covered T1,T2,T3
addr_hit[149] Covered T1,T2,T3
addr_hit[150] Covered T1,T2,T3
addr_hit[151] Covered T1,T2,T3
addr_hit[152] Covered T1,T2,T3
addr_hit[153] Covered T1,T2,T3
addr_hit[154] Covered T1,T2,T3
addr_hit[155] Covered T1,T2,T3
addr_hit[156] Covered T1,T2,T3
addr_hit[157] Covered T1,T2,T3
addr_hit[158] Covered T1,T2,T3
addr_hit[159] Covered T1,T2,T3
addr_hit[160] Covered T1,T2,T3
addr_hit[161] Covered T1,T2,T3
addr_hit[162] Covered T1,T2,T3
addr_hit[163] Covered T1,T2,T3
addr_hit[164] Covered T1,T2,T3
addr_hit[165] Covered T1,T2,T3
addr_hit[166] Covered T1,T2,T3
addr_hit[167] Covered T1,T2,T3
addr_hit[168] Covered T1,T2,T3
addr_hit[169] Covered T1,T2,T3
addr_hit[170] Covered T1,T2,T3
addr_hit[171] Covered T1,T2,T3
addr_hit[172] Covered T1,T2,T3
addr_hit[173] Covered T1,T2,T3
addr_hit[174] Covered T1,T2,T3
addr_hit[175] Covered T1,T2,T3
addr_hit[176] Covered T1,T2,T3
addr_hit[177] Covered T1,T2,T3
addr_hit[178] Covered T1,T2,T3
addr_hit[179] Covered T1,T2,T3
addr_hit[180] Covered T1,T2,T3
addr_hit[181] Covered T1,T2,T3
addr_hit[182] Covered T1,T2,T3
addr_hit[183] Covered T1,T2,T3
addr_hit[184] Covered T1,T2,T3
addr_hit[185] Covered T1,T2,T3
addr_hit[186] Covered T1,T2,T3
addr_hit[187] Covered T1,T2,T3
addr_hit[188] Covered T1,T2,T3
addr_hit[189] Covered T1,T2,T3
addr_hit[190] Covered T1,T2,T3
addr_hit[191] Covered T1,T2,T3
addr_hit[192] Covered T1,T2,T3
addr_hit[193] Covered T1,T2,T3
addr_hit[194] Covered T1,T2,T3
addr_hit[195] Covered T1,T2,T3
addr_hit[196] Covered T1,T2,T3
addr_hit[197] Covered T1,T2,T3
addr_hit[198] Covered T1,T2,T3
addr_hit[199] Covered T1,T2,T3
addr_hit[200] Covered T1,T2,T3
addr_hit[201] Covered T1,T2,T3
addr_hit[202] Covered T1,T2,T3
addr_hit[203] Covered T1,T2,T3
addr_hit[204] Covered T1,T2,T3
addr_hit[205] Covered T1,T2,T3
addr_hit[206] Covered T1,T2,T3
addr_hit[207] Covered T1,T2,T3
addr_hit[208] Covered T1,T2,T3
addr_hit[209] Covered T1,T2,T3
addr_hit[210] Covered T1,T2,T3
addr_hit[211] Covered T1,T2,T3
addr_hit[212] Covered T1,T2,T3
addr_hit[213] Covered T1,T2,T3
addr_hit[214] Covered T1,T2,T3
addr_hit[215] Covered T1,T2,T3
addr_hit[216] Covered T1,T2,T3
addr_hit[217] Covered T1,T2,T3
addr_hit[218] Covered T1,T2,T3
addr_hit[219] Covered T1,T2,T3
addr_hit[220] Covered T1,T2,T3
addr_hit[221] Covered T1,T2,T3
addr_hit[222] Covered T1,T2,T3
addr_hit[223] Covered T1,T2,T3
addr_hit[224] Covered T1,T2,T3
addr_hit[225] Covered T1,T2,T3
addr_hit[226] Covered T1,T2,T3
addr_hit[227] Covered T1,T2,T3
addr_hit[228] Covered T1,T2,T3
addr_hit[229] Covered T1,T2,T3
addr_hit[230] Covered T1,T2,T3
addr_hit[231] Covered T1,T2,T3
addr_hit[232] Covered T1,T2,T3
addr_hit[233] Covered T1,T2,T3
addr_hit[234] Covered T1,T2,T3
addr_hit[235] Covered T1,T2,T3
addr_hit[236] Covered T1,T2,T3
addr_hit[237] Covered T1,T2,T3
addr_hit[238] Covered T1,T2,T3
addr_hit[239] Covered T1,T2,T3
addr_hit[240] Covered T1,T2,T3
addr_hit[241] Covered T1,T2,T3
addr_hit[242] Covered T1,T2,T3
addr_hit[243] Covered T1,T2,T3
addr_hit[244] Covered T1,T2,T3
addr_hit[245] Covered T1,T2,T3
addr_hit[246] Covered T1,T2,T3
addr_hit[247] Covered T1,T2,T3
addr_hit[248] Covered T1,T2,T3
addr_hit[249] Covered T1,T2,T3
addr_hit[250] Covered T1,T2,T3
addr_hit[251] Covered T1,T2,T3
addr_hit[252] Covered T1,T2,T3
addr_hit[253] Covered T1,T2,T3
addr_hit[254] Covered T1,T2,T3
addr_hit[255] Covered T1,T2,T3
addr_hit[256] Covered T1,T2,T3
addr_hit[257] Covered T1,T2,T3
addr_hit[258] Covered T1,T2,T3
addr_hit[259] Covered T1,T2,T3
addr_hit[260] Covered T1,T2,T3
addr_hit[261] Covered T1,T2,T3
addr_hit[262] Covered T1,T2,T3
addr_hit[263] Covered T1,T2,T3
addr_hit[264] Covered T1,T2,T3
addr_hit[265] Covered T1,T2,T3
addr_hit[266] Covered T1,T2,T3
addr_hit[267] Covered T1,T2,T3
addr_hit[268] Covered T1,T2,T3
addr_hit[269] Covered T1,T2,T3
addr_hit[270] Covered T1,T2,T3
addr_hit[271] Covered T1,T2,T3
addr_hit[272] Covered T1,T2,T3
addr_hit[273] Covered T1,T2,T3
addr_hit[274] Covered T1,T2,T3
addr_hit[275] Covered T1,T2,T3
addr_hit[276] Covered T1,T2,T3
addr_hit[277] Covered T1,T2,T3
addr_hit[278] Covered T1,T2,T3
addr_hit[279] Covered T1,T2,T3
addr_hit[280] Covered T1,T2,T3
addr_hit[281] Covered T1,T2,T3
addr_hit[282] Covered T1,T2,T3
addr_hit[283] Covered T1,T2,T3
addr_hit[284] Covered T1,T2,T3
addr_hit[285] Covered T1,T2,T3
addr_hit[286] Covered T1,T2,T3
addr_hit[287] Covered T1,T2,T3
addr_hit[288] Covered T1,T2,T3
addr_hit[289] Covered T1,T2,T3
addr_hit[290] Covered T1,T2,T3
addr_hit[291] Covered T1,T2,T3
addr_hit[292] Covered T1,T2,T3
addr_hit[293] Covered T1,T2,T3
addr_hit[294] Covered T1,T2,T3
addr_hit[295] Covered T1,T2,T3
addr_hit[296] Covered T1,T2,T3
addr_hit[297] Covered T1,T2,T3
addr_hit[298] Covered T1,T2,T3
addr_hit[299] Covered T1,T2,T3
addr_hit[300] Covered T1,T2,T3
addr_hit[301] Covered T1,T2,T3
addr_hit[302] Covered T1,T2,T3
addr_hit[303] Covered T1,T2,T3
addr_hit[304] Covered T1,T2,T3
addr_hit[305] Covered T1,T2,T3
addr_hit[306] Covered T1,T2,T3
addr_hit[307] Covered T1,T2,T3
addr_hit[308] Covered T1,T2,T3
addr_hit[309] Covered T1,T2,T3
addr_hit[310] Covered T1,T2,T3
addr_hit[311] Covered T1,T2,T3
addr_hit[312] Covered T1,T2,T3
addr_hit[313] Covered T1,T2,T3
addr_hit[314] Covered T1,T2,T3
addr_hit[315] Covered T1,T2,T3
addr_hit[316] Covered T1,T2,T3
addr_hit[317] Covered T1,T2,T3
addr_hit[318] Covered T1,T2,T3
addr_hit[319] Covered T1,T2,T3
addr_hit[320] Covered T1,T2,T3
addr_hit[321] Covered T1,T2,T3
addr_hit[322] Covered T1,T2,T3
addr_hit[323] Covered T1,T2,T3
addr_hit[324] Covered T1,T2,T3
addr_hit[325] Covered T1,T2,T3
addr_hit[326] Covered T1,T2,T3
addr_hit[327] Covered T1,T2,T3
addr_hit[328] Covered T1,T2,T3
addr_hit[329] Covered T1,T2,T3
addr_hit[330] Covered T1,T2,T3
addr_hit[331] Covered T1,T2,T3
addr_hit[332] Covered T1,T2,T3
addr_hit[333] Covered T1,T2,T3
addr_hit[334] Covered T1,T2,T3
addr_hit[335] Covered T1,T2,T3
addr_hit[336] Covered T1,T2,T3
addr_hit[337] Covered T1,T2,T3
addr_hit[338] Covered T1,T2,T3
addr_hit[339] Covered T1,T2,T3
addr_hit[340] Covered T1,T2,T3
addr_hit[341] Covered T1,T2,T3
addr_hit[342] Covered T1,T2,T3
addr_hit[343] Covered T1,T2,T3
addr_hit[344] Covered T1,T2,T3
addr_hit[345] Covered T1,T2,T3
addr_hit[346] Covered T1,T2,T3
addr_hit[347] Covered T1,T2,T3
addr_hit[348] Covered T1,T2,T3
addr_hit[349] Covered T1,T2,T3
default Covered T1,T2,T3


LineNo. Expression -1-: 19392 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3


LineNo. Expression -1-: 19400 if ((!rst_shadowed_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3


Assert Coverage for Module : alert_handler_reg_top
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 4 4 100.00 4 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 4 4 100.00 4 100.00




Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
en2addrHit 744054270 95804884 0 0
reAfterRv 744054270 95804884 0 0
rePulse 744054270 14119647 0 0
wePulse 744054270 81685237 0 0


en2addrHit
NameAttemptsReal SuccessesFailuresIncomplete
Total 744054270 95804884 0 0
T1 28793 8342 0 0
T2 525760 41335 0 0
T3 18177 5442 0 0
T7 505317 427061 0 0
T8 529467 439839 0 0
T9 134512 350536 0 0
T13 85245 7816 0 0
T14 5408 386 0 0
T15 25052 9040 0 0
T16 8568 1957 0 0

reAfterRv
NameAttemptsReal SuccessesFailuresIncomplete
Total 744054270 95804884 0 0
T1 28793 8342 0 0
T2 525760 41335 0 0
T3 18177 5442 0 0
T7 505317 427061 0 0
T8 529467 439839 0 0
T9 134512 350536 0 0
T13 85245 7816 0 0
T14 5408 386 0 0
T15 25052 9040 0 0
T16 8568 1957 0 0

rePulse
NameAttemptsReal SuccessesFailuresIncomplete
Total 744054270 14119647 0 0
T1 28793 2830 0 0
T2 525760 4783 0 0
T3 18177 1286 0 0
T7 505317 52613 0 0
T8 529467 54067 0 0
T9 134512 43792 0 0
T13 85245 986 0 0
T14 5408 51 0 0
T15 25052 1274 0 0
T16 8568 231 0 0

wePulse
NameAttemptsReal SuccessesFailuresIncomplete
Total 744054270 81685237 0 0
T1 28793 5512 0 0
T2 525760 36552 0 0
T3 18177 4156 0 0
T7 505317 374448 0 0
T8 529467 385772 0 0
T9 134512 306744 0 0
T13 85245 6830 0 0
T14 5408 335 0 0
T15 25052 7766 0 0
T16 8568 1726 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%