Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
98.31	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	1	43	97.73

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	1	43	97.73	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	175	1			T20	1		T44	1		T17	1
index[0x1]	167	1			T17	1		T69	1		T16	1
index[0x2]	200	1			T2	1		T11	1		T20	1
index[0x3]	149	1			T46	1		T16	1		T23	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	240	1			T2	1		T6	1		T46	2
lens_less_than_1000[1]	122	1			T11	1		T17	1		T46	1
lens_less_than_1000[2]	99	1			T17	1		T70	1		T78	1
lens_less_than_1000[3]	66	1			T20	1		T24	1		T15	2
lens_less_than_1000[4]	56	1			T20	1		T24	1		T76	1
lens_less_than_1000[5]	45	1			T69	1		T23	1		T70	1
lens_less_than_1000[6]	25	1			T23	1		T24	1		T98	1
lens_less_than_1000[7]	10	1			T54	1		T104	1		T263	1
lens_less_than_1000[8]	10	1			T44	1		T16	1		T83	1
lens_less_than_1000[9]	4	1			T78	1		T264	1		T265	1
len_2	14	1			T54	2		T93	1		T266	2

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	1	43	97.73	1

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x1]]	[lens_less_than_1000[9]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	64	1			T6	1		T46	1		T16	2
index[0x0]	lens_less_than_1000[1]	31	1			T17	1		T16	1		T23	1
index[0x0]	lens_less_than_1000[2]	14	1			T82	1		T56	1		T267	1
index[0x0]	lens_less_than_1000[3]	16	1			T20	1		T24	1		T64	1
index[0x0]	lens_less_than_1000[4]	14	1			T24	1		T210	1		T25	1
index[0x0]	lens_less_than_1000[5]	17	1			T23	1		T70	1		T82	1
index[0x0]	lens_less_than_1000[6]	7	1			T24	1		T55	1		T268	1
index[0x0]	lens_less_than_1000[7]	6	1			T263	1		T269	2		T270	1
index[0x0]	lens_less_than_1000[8]	2	1			T44	1		T271	1		-	-
index[0x0]	lens_less_than_1000[9]	1	1			T78	1		-	-		-	-
index[0x0]	len_2	3	1			T54	1		T247	1		T272	1
index[0x1]	lens_less_than_1000[0]	57	1			T16	1		T24	2		T116	1
index[0x1]	lens_less_than_1000[1]	30	1			T23	1		T24	2		T28	2
index[0x1]	lens_less_than_1000[2]	22	1			T17	1		T78	1		T54	1
index[0x1]	lens_less_than_1000[3]	18	1			T15	1		T63	1		T93	1
index[0x1]	lens_less_than_1000[4]	17	1			T29	2		T53	1		T211	1
index[0x1]	lens_less_than_1000[5]	5	1			T69	1		T88	1		T273	1
index[0x1]	lens_less_than_1000[6]	8	1			T98	1		T274	1		T275	1
index[0x1]	lens_less_than_1000[7]	2	1			T54	1		T234	1		-	-
index[0x1]	lens_less_than_1000[8]	4	1			T83	1		T88	1		T276	1
index[0x1]	len_2	4	1			T27	1		T277	3		-	-
index[0x2]	lens_less_than_1000[0]	69	1			T2	1		T24	5		T76	1
index[0x2]	lens_less_than_1000[1]	34	1			T11	1		T46	1		T23	1
index[0x2]	lens_less_than_1000[2]	35	1			T70	1		T278	1		T279	1
index[0x2]	lens_less_than_1000[3]	16	1			T15	1		T230	1		T54	1
index[0x2]	lens_less_than_1000[4]	16	1			T20	1		T76	1		T280	1
index[0x2]	lens_less_than_1000[5]	14	1			T105	1		T103	1		T281	2
index[0x2]	lens_less_than_1000[6]	6	1			T282	1		T247	1		T283	1
index[0x2]	lens_less_than_1000[7]	1	1			T284	1		-	-		-	-
index[0x2]	lens_less_than_1000[8]	3	1			T103	1		T285	1		T286	1
index[0x2]	lens_less_than_1000[9]	2	1			T264	1		T265	1		-	-
index[0x2]	len_2	4	1			T266	2		T287	1		T277	1
index[0x3]	lens_less_than_1000[0]	50	1			T46	1		T24	1		T82	2
index[0x3]	lens_less_than_1000[1]	27	1			T24	1		T28	1		T230	1
index[0x3]	lens_less_than_1000[2]	28	1			T31	6		T274	1		T25	1
index[0x3]	lens_less_than_1000[3]	16	1			T54	2		T57	1		T102	1
index[0x3]	lens_less_than_1000[4]	9	1			T82	1		T107	1		T288	1
index[0x3]	lens_less_than_1000[5]	9	1			T209	1		T93	1		T56	1
index[0x3]	lens_less_than_1000[6]	4	1			T23	1		T289	1		T257	1
index[0x3]	lens_less_than_1000[7]	1	1			T104	1		-	-		-	-
index[0x3]	lens_less_than_1000[8]	1	1			T16	1		-	-		-	-
index[0x3]	lens_less_than_1000[9]	1	1			T290	1		-	-		-	-
index[0x3]	len_2	3	1			T54	1		T93	1		T254	1