Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
93.22	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	4	40	90.91

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	4	40	90.91	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	191	1			T5	2		T26	1		T6	1
index[0x1]	180	1			T7	1		T12	1		T11	1
index[0x2]	158	1			T11	2		T21	4		T5	1
index[0x3]	153	1			T4	1		T22	1		T5	5

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	232	1			T7	1		T4	1		T22	2
lens_less_than_1000[1]	117	1			T21	4		T5	1		T6	1
lens_less_than_1000[2]	86	1			T11	2		T4	1		T63	2
lens_less_than_1000[3]	61	1			T12	1		T11	1		T19	1
lens_less_than_1000[4]	71	1			T72	1		T65	1		T265	1
lens_less_than_1000[5]	37	1			T5	2		T75	1		T96	1
lens_less_than_1000[6]	29	1			T4	1		T27	1		T28	1
lens_less_than_1000[7]	21	1			T20	1		T109	1		T82	1
lens_less_than_1000[8]	13	1			T5	1		T266	1		T267	1
lens_less_than_1000[9]	10	1			T84	1		T268	1		T129	1
len_2	5	1			T113	5		-	-		-	-

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	4	40	90.91	4

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0]]	[lens_less_than_1000[9] , len_2]	--	--	2
[index[0x1] , index[0x2]]	[len_2]	--	--	2

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	72	1			T5	1		T26	1		T46	1
index[0x0]	lens_less_than_1000[1]	29	1			T6	1		T269	1		T30	1
index[0x0]	lens_less_than_1000[2]	29	1			T63	1		T76	1		T252	1
index[0x0]	lens_less_than_1000[3]	17	1			T260	1		T44	1		T76	1
index[0x0]	lens_less_than_1000[4]	21	1			T65	1		T265	1		T88	1
index[0x0]	lens_less_than_1000[5]	8	1			T5	1		T85	1		T270	1
index[0x0]	lens_less_than_1000[6]	5	1			T101	1		T271	1		T98	1
index[0x0]	lens_less_than_1000[7]	4	1			T82	1		T272	1		T273	1
index[0x0]	lens_less_than_1000[8]	6	1			T267	1		T274	1		T275	1
index[0x1]	lens_less_than_1000[0]	67	1			T7	1		T4	1		T22	1
index[0x1]	lens_less_than_1000[1]	30	1			T74	1		T75	2		T82	1
index[0x1]	lens_less_than_1000[2]	25	1			T11	1		T63	1		T74	1
index[0x1]	lens_less_than_1000[3]	8	1			T12	1		T114	1		T240	1
index[0x1]	lens_less_than_1000[4]	22	1			T82	1		T276	1		T277	1
index[0x1]	lens_less_than_1000[5]	8	1			T75	1		T278	1		T279	1
index[0x1]	lens_less_than_1000[6]	8	1			T4	1		T280	1		T104	2
index[0x1]	lens_less_than_1000[7]	7	1			T109	1		T49	1		T281	1
index[0x1]	lens_less_than_1000[8]	3	1			T266	1		T282	1		T283	1
index[0x1]	lens_less_than_1000[9]	2	1			T258	2		-	-		-	-
index[0x2]	lens_less_than_1000[0]	52	1			T6	1		T254	2		T284	1
index[0x2]	lens_less_than_1000[1]	32	1			T21	4		T75	2		T28	1
index[0x2]	lens_less_than_1000[2]	10	1			T11	1		T27	1		T90	1
index[0x2]	lens_less_than_1000[3]	19	1			T11	1		T19	1		T27	1
index[0x2]	lens_less_than_1000[4]	11	1			T90	1		T267	1		T285	1
index[0x2]	lens_less_than_1000[5]	13	1			T5	1		T286	1		T113	1
index[0x2]	lens_less_than_1000[6]	11	1			T27	1		T52	1		T118	1
index[0x2]	lens_less_than_1000[7]	5	1			T20	1		T114	1		T275	1
index[0x2]	lens_less_than_1000[8]	1	1			T94	1		-	-		-	-
index[0x2]	lens_less_than_1000[9]	4	1			T84	1		T268	1		T287	1
index[0x3]	lens_less_than_1000[0]	41	1			T22	1		T5	3		T18	1
index[0x3]	lens_less_than_1000[1]	26	1			T5	1		T76	1		T82	1
index[0x3]	lens_less_than_1000[2]	22	1			T4	1		T29	1		T95	1
index[0x3]	lens_less_than_1000[3]	17	1			T38	1		T49	1		T288	1
index[0x3]	lens_less_than_1000[4]	17	1			T72	1		T82	1		T90	1
index[0x3]	lens_less_than_1000[5]	8	1			T96	1		T124	1		T289	1
index[0x3]	lens_less_than_1000[6]	5	1			T28	1		T113	1		T266	1
index[0x3]	lens_less_than_1000[7]	5	1			T290	1		T130	1		T274	1
index[0x3]	lens_less_than_1000[8]	3	1			T5	1		T291	1		T283	1
index[0x3]	lens_less_than_1000[9]	4	1			T129	1		T105	1		T279	1
index[0x3]	len_2	5	1			T113	5		-	-		-	-