Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
93.22	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	4	40	90.91

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	4	40	90.91	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	124	1			T3	1		T5	1		T41	1
index[0x1]	120	1			T4	5		T5	1		T41	2
index[0x2]	134	1			T12	1		T4	4		T15	1
index[0x3]	129	1			T3	1		T4	6		T41	2

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	164	1			T3	2		T4	3		T18	1
lens_less_than_1000[1]	80	1			T4	2		T5	1		T41	1
lens_less_than_1000[2]	77	1			T4	4		T15	1		T41	3
lens_less_than_1000[3]	52	1			T4	6		T67	1		T45	1
lens_less_than_1000[4]	40	1			T41	2		T76	1		T80	1
lens_less_than_1000[5]	30	1			T12	1		T5	1		T41	1
lens_less_than_1000[6]	27	1			T44	1		T192	1		T74	1
lens_less_than_1000[7]	19	1			T44	2		T62	2		T25	1
lens_less_than_1000[8]	9	1			T34	1		T49	1		T254	1
lens_less_than_1000[9]	1	1			T118	1		-	-		-	-
len_2	8	1			T44	2		T45	1		T78	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	4	40	90.91	4

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0] , index[0x1]]	[lens_less_than_1000[9]]	--	--	2
[index[0x3]]	[lens_less_than_1000[9] , len_2]	--	--	2

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	39	1			T3	1		T26	1		T129	1
index[0x0]	lens_less_than_1000[1]	25	1			T5	1		T44	1		T265	1
index[0x0]	lens_less_than_1000[2]	18	1			T41	1		T22	1		T76	1
index[0x0]	lens_less_than_1000[3]	10	1			T45	1		T23	1		T190	1
index[0x0]	lens_less_than_1000[4]	10	1			T76	1		T80	1		T266	1
index[0x0]	lens_less_than_1000[5]	8	1			T22	1		T267	1		T268	1
index[0x0]	lens_less_than_1000[6]	7	1			T192	1		T74	1		T52	1
index[0x0]	lens_less_than_1000[7]	3	1			T44	1		T85	1		T20	1
index[0x0]	lens_less_than_1000[8]	2	1			T34	1		T256	1		-	-
index[0x0]	len_2	2	1			T44	1		T78	1		-	-
index[0x1]	lens_less_than_1000[0]	37	1			T4	3		T44	2		T22	2
index[0x1]	lens_less_than_1000[1]	26	1			T4	2		T22	2		T269	1
index[0x1]	lens_less_than_1000[2]	21	1			T41	1		T106	1		T73	1
index[0x1]	lens_less_than_1000[3]	13	1			T76	1		T270	1		T24	1
index[0x1]	lens_less_than_1000[4]	4	1			T41	1		T271	1		T272	1
index[0x1]	lens_less_than_1000[5]	7	1			T5	1		T39	1		T273	1
index[0x1]	lens_less_than_1000[6]	3	1			T44	1		T274	1		T275	1
index[0x1]	lens_less_than_1000[7]	3	1			T44	1		T76	1		T276	1
index[0x1]	lens_less_than_1000[8]	4	1			T277	1		T278	1		T87	1
index[0x1]	len_2	2	1			T44	1		T279	1		-	-
index[0x2]	lens_less_than_1000[0]	45	1			T18	1		T44	1		T69	1
index[0x2]	lens_less_than_1000[1]	16	1			T32	1		T245	1		T280	1
index[0x2]	lens_less_than_1000[2]	19	1			T4	4		T15	1		T71	1
index[0x2]	lens_less_than_1000[3]	11	1			T67	1		T76	1		T48	1
index[0x2]	lens_less_than_1000[4]	11	1			T41	1		T281	1		T282	1
index[0x2]	lens_less_than_1000[5]	9	1			T12	1		T41	1		T67	1
index[0x2]	lens_less_than_1000[6]	12	1			T109	1		T90	4		T283	1
index[0x2]	lens_less_than_1000[7]	5	1			T62	2		T284	2		T285	1
index[0x2]	lens_less_than_1000[8]	1	1			T49	1		-	-		-	-
index[0x2]	lens_less_than_1000[9]	1	1			T118	1		-	-		-	-
index[0x2]	len_2	4	1			T45	1		T250	1		T286	1
index[0x3]	lens_less_than_1000[0]	43	1			T3	1		T69	2		T78	1
index[0x3]	lens_less_than_1000[1]	13	1			T41	1		T74	1		T76	1
index[0x3]	lens_less_than_1000[2]	19	1			T41	1		T129	1		T287	1
index[0x3]	lens_less_than_1000[3]	18	1			T4	6		T22	1		T76	1
index[0x3]	lens_less_than_1000[4]	15	1			T33	1		T190	1		T288	1
index[0x3]	lens_less_than_1000[5]	6	1			T289	1		T290	1		T102	1
index[0x3]	lens_less_than_1000[6]	5	1			T291	1		T292	1		T293	1
index[0x3]	lens_less_than_1000[7]	8	1			T25	1		T74	1		T109	1
index[0x3]	lens_less_than_1000[8]	2	1			T254	1		T294	1		-	-