Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	52071972	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

24630561

1

T1

1506

T2

3094

T3

1946

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	12096919	1			T1	1368		T2	1212		T3	772
values[0x0]	32267625	1			T1	1276		T2	4209		T3	2578
values[0x1]	32337989	1			T1	1352		T2	4287		T3	2590

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	45357262	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

31345271

1

T1

1880

T2

3947

T3

2462

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	224609	1			T1	11		T2	42		T3	39
valid_sources[0x01]	224590	1			T1	6		T2	39		T3	30
valid_sources[0x02]	558052	1			T1	11		T2	35		T3	20
valid_sources[0x03]	228535	1			T1	19		T2	46		T3	5
valid_sources[0x04]	223385	1			T1	17		T2	38		T3	21
valid_sources[0x05]	233599	1			T1	10		T2	42		T3	30
valid_sources[0x06]	224408	1			T1	13		T2	34		T3	21
valid_sources[0x07]	226634	1			T1	15		T2	40		T3	16
valid_sources[0x08]	223846	1			T1	14		T2	47		T3	27
valid_sources[0x09]	331340	1			T1	23		T2	33		T3	23
valid_sources[0x0a]	225984	1			T1	14		T2	34		T3	51
valid_sources[0x0b]	737513	1			T1	14		T2	31		T3	34
valid_sources[0x0c]	225683	1			T1	19		T2	33		T3	17
valid_sources[0x0d]	224353	1			T1	13		T2	32		T3	31
valid_sources[0x0e]	226244	1			T1	23		T2	39		T3	25
valid_sources[0x0f]	228199	1			T1	16		T2	38		T3	22
valid_sources[0x10]	227381	1			T1	14		T2	50		T3	34
valid_sources[0x11]	222514	1			T1	12		T2	46		T3	24
valid_sources[0x12]	229305	1			T1	12		T2	32		T3	21
valid_sources[0x13]	225591	1			T1	17		T2	28		T3	12
valid_sources[0x14]	528530	1			T1	14		T2	27		T3	24
valid_sources[0x15]	228395	1			T1	20		T2	42		T3	19
valid_sources[0x16]	228155	1			T1	17		T2	30		T3	17
valid_sources[0x17]	224284	1			T1	11		T2	42		T3	24
valid_sources[0x18]	245832	1			T1	17		T2	45		T3	14
valid_sources[0x19]	239535	1			T1	18		T2	37		T3	28
valid_sources[0x1a]	221178	1			T1	15		T2	30		T3	41
valid_sources[0x1b]	616858	1			T1	24		T2	40		T3	40
valid_sources[0x1c]	241160	1			T1	11		T2	35		T3	29
valid_sources[0x1d]	225651	1			T1	17		T2	39		T3	19
valid_sources[0x1e]	227587	1			T1	12		T2	35		T3	24
valid_sources[0x1f]	223975	1			T1	14		T2	49		T3	17
valid_sources[0x20]	230974	1			T1	21		T2	33		T3	17
valid_sources[0x21]	222739	1			T1	13		T2	34		T3	11
valid_sources[0x22]	420777	1			T1	21		T2	32		T3	40
valid_sources[0x23]	227066	1			T1	18		T2	31		T3	9
valid_sources[0x24]	620854	1			T1	17		T2	42		T3	30
valid_sources[0x25]	635085	1			T1	19		T2	37		T3	35
valid_sources[0x26]	673663	1			T1	29		T2	39		T3	26
valid_sources[0x27]	710220	1			T1	9		T2	31		T3	29
valid_sources[0x28]	234246	1			T1	13		T2	28		T3	32
valid_sources[0x29]	236731	1			T1	9		T2	39		T3	21
valid_sources[0x2a]	224417	1			T1	21		T2	42		T3	31
valid_sources[0x2b]	272285	1			T1	13		T2	40		T3	43
valid_sources[0x2c]	725495	1			T1	19		T2	50		T3	25
valid_sources[0x2d]	224115	1			T1	12		T2	39		T3	18
valid_sources[0x2e]	710825	1			T1	13		T2	32		T3	41
valid_sources[0x2f]	264884	1			T1	19		T2	33		T3	28
valid_sources[0x30]	226519	1			T1	23		T2	33		T3	14
valid_sources[0x31]	257392	1			T1	15		T2	38		T3	18
valid_sources[0x32]	558145	1			T1	22		T2	34		T3	18
valid_sources[0x33]	225245	1			T1	22		T2	47		T3	16
valid_sources[0x34]	491126	1			T1	21		T2	25		T3	12
valid_sources[0x35]	225094	1			T1	15		T2	26		T3	33
valid_sources[0x36]	277119	1			T1	20		T2	33		T3	18
valid_sources[0x37]	225820	1			T1	19		T2	43		T3	25
valid_sources[0x38]	756025	1			T1	12		T2	46		T3	18
valid_sources[0x39]	486256	1			T1	19		T2	33		T3	24
valid_sources[0x3a]	242999	1			T1	13		T2	47		T3	36
valid_sources[0x3b]	226086	1			T1	25		T2	30		T3	10
valid_sources[0x3c]	223485	1			T1	21		T2	37		T3	24
valid_sources[0x3d]	706293	1			T1	15		T2	39		T3	17
valid_sources[0x3e]	227107	1			T1	16		T2	43		T3	20
valid_sources[0x3f]	675812	1			T1	21		T2	40		T3	19
valid_sources[0x40]	233921	1			T1	7		T2	44		T3	34
valid_sources[0x41]	224447	1			T1	11		T2	35		T3	42
valid_sources[0x42]	225318	1			T1	19		T2	51		T3	12
valid_sources[0x43]	256150	1			T1	10		T2	45		T3	21
valid_sources[0x44]	226823	1			T1	15		T2	37		T3	17
valid_sources[0x45]	763124	1			T1	8		T2	43		T3	48
valid_sources[0x46]	224694	1			T1	14		T2	34		T3	17
valid_sources[0x47]	533960	1			T1	15		T2	29		T3	13
valid_sources[0x48]	474482	1			T1	9		T2	29		T3	13
valid_sources[0x49]	227754	1			T1	10		T2	42		T3	23
valid_sources[0x4a]	228108	1			T1	14		T2	25		T3	18
valid_sources[0x4b]	235356	1			T1	20		T2	32		T3	27
valid_sources[0x4c]	223718	1			T1	11		T2	35		T3	5
valid_sources[0x4d]	224575	1			T1	17		T2	35		T3	29
valid_sources[0x4e]	296400	1			T1	12		T2	45		T3	8
valid_sources[0x4f]	233216	1			T1	15		T2	42		T3	30
valid_sources[0x50]	227528	1			T1	18		T2	36		T3	13
valid_sources[0x51]	225238	1			T1	19		T2	49		T3	35
valid_sources[0x52]	228454	1			T1	7		T2	33		T3	25
valid_sources[0x53]	525621	1			T1	15		T2	35		T3	20
valid_sources[0x54]	224831	1			T1	12		T2	33		T3	34
valid_sources[0x55]	226399	1			T1	19		T2	42		T3	26
valid_sources[0x56]	223319	1			T1	13		T2	37		T3	25
valid_sources[0x57]	698504	1			T1	18		T2	38		T3	16
valid_sources[0x58]	224441	1			T1	19		T2	38		T3	28
valid_sources[0x59]	222456	1			T1	21		T2	36		T3	16
valid_sources[0x5a]	226228	1			T1	9		T2	51		T3	21
valid_sources[0x5b]	226680	1			T1	20		T2	43		T3	16
valid_sources[0x5c]	222944	1			T1	16		T2	28		T3	14
valid_sources[0x5d]	453037	1			T1	15		T2	39		T3	21
valid_sources[0x5e]	450633	1			T1	13		T2	30		T3	26
valid_sources[0x5f]	236319	1			T1	14		T2	38		T3	40
valid_sources[0x60]	222473	1			T1	19		T2	37		T3	34
valid_sources[0x61]	224397	1			T1	12		T2	28		T3	27
valid_sources[0x62]	661206	1			T1	19		T2	38		T3	34
valid_sources[0x63]	232199	1			T1	21		T2	26		T3	15
valid_sources[0x64]	224157	1			T1	15		T2	41		T3	17
valid_sources[0x65]	237037	1			T1	15		T2	45		T3	22
valid_sources[0x66]	598129	1			T1	13		T2	24		T3	38
valid_sources[0x67]	234014	1			T1	19		T2	46		T3	21
valid_sources[0x68]	440988	1			T1	4		T2	36		T3	32
valid_sources[0x69]	248032	1			T1	15		T2	47		T3	37
valid_sources[0x6a]	239139	1			T1	13		T2	34		T3	11
valid_sources[0x6b]	223755	1			T1	19		T2	36		T3	15
valid_sources[0x6c]	240804	1			T1	20		T2	42		T3	38
valid_sources[0x6d]	226017	1			T1	16		T2	38		T3	14
valid_sources[0x6e]	223885	1			T1	19		T2	40		T3	29
valid_sources[0x6f]	228803	1			T1	14		T2	39		T3	12
valid_sources[0x70]	229293	1			T1	24		T2	34		T3	11
valid_sources[0x71]	221083	1			T1	17		T2	26		T3	27
valid_sources[0x72]	232857	1			T1	5		T2	38		T3	35
valid_sources[0x73]	560633	1			T1	18		T2	43		T3	16
valid_sources[0x74]	227364	1			T1	12		T2	27		T3	26
valid_sources[0x75]	224428	1			T1	17		T2	30		T3	29
valid_sources[0x76]	231930	1			T1	18		T2	38		T3	11
valid_sources[0x77]	227313	1			T1	18		T2	35		T3	17
valid_sources[0x78]	226908	1			T1	13		T2	35		T3	17
valid_sources[0x79]	229100	1			T1	21		T2	33		T3	20
valid_sources[0x7a]	599571	1			T1	18		T2	38		T3	17
valid_sources[0x7b]	221999	1			T1	21		T2	35		T3	21
valid_sources[0x7c]	228554	1			T1	11		T2	47		T3	30
valid_sources[0x7d]	227709	1			T1	18		T2	40		T3	21
valid_sources[0x7e]	224477	1			T1	15		T2	44		T3	16
valid_sources[0x7f]	221695	1			T1	11		T2	31		T3	21
valid_sources[0x80]	1039274	1			T1	18		T2	33		T3	14

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

5810215

1

T1

691

T2

602

T3

378

values[0x0]

all_enables

biggest_size

12021662

1

T1

521

T2

1613

T3

993

values[0x1]

all_enables

biggest_size

6798684

1

T1

294

T2

879

T3

575