Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
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Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_24/alert_handler-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 44357792 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 21040302 1 T1 151 T2 113 T3 610



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 10677668 1 T1 53 T2 53 T3 811
values[0x0] 27285894 1 T1 246 T2 181 T3 407
values[0x1] 27434532 1 T1 202 T2 160 T3 423



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 38536687 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 26861407 1 T1 200 T2 150 T3 791



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 197545 1 T1 6 T3 5 T10 20
valid_sources[0x01] 221416 1 T3 16 T10 13 T11 27
valid_sources[0x02] 195867 1 T1 2 T2 5 T3 1
valid_sources[0x03] 236182 1 T1 3 T2 1 T3 6
valid_sources[0x04] 210711 1 T1 1 T3 2 T10 19
valid_sources[0x05] 612197 1 T1 1 T2 1 T3 7
valid_sources[0x06] 195867 1 T1 1 T2 1 T3 2
valid_sources[0x07] 198380 1 T2 4 T3 12 T10 6
valid_sources[0x08] 491344 1 T1 1 T2 3 T3 5
valid_sources[0x09] 195360 1 T1 1 T2 3 T3 5
valid_sources[0x0a] 196184 1 T1 3 T2 3 T3 5
valid_sources[0x0b] 767330 1 T1 3 T10 8 T11 26
valid_sources[0x0c] 196472 1 T1 2 T2 2 T3 5
valid_sources[0x0d] 199086 1 T1 2 T2 1 T3 2
valid_sources[0x0e] 192594 1 T1 1 T3 12 T10 13
valid_sources[0x0f] 195818 1 T1 1 T2 2 T3 8
valid_sources[0x10] 210047 1 T1 3 T3 9 T10 5
valid_sources[0x11] 193396 1 T10 9 T11 27 T13 8
valid_sources[0x12] 197166 1 T1 1 T10 6 T11 18
valid_sources[0x13] 196225 1 T1 1 T3 6 T10 7
valid_sources[0x14] 202224 1 T1 3 T3 3 T10 15
valid_sources[0x15] 198788 1 T1 1 T3 7 T10 17
valid_sources[0x16] 238918 1 T1 6 T2 1 T3 1
valid_sources[0x17] 194815 1 T1 3 T3 17 T10 5
valid_sources[0x18] 584118 1 T1 3 T2 1 T3 3
valid_sources[0x19] 284919 1 T1 1 T3 7 T10 17
valid_sources[0x1a] 195398 1 T1 2 T2 1 T3 1
valid_sources[0x1b] 704987 1 T1 1 T3 11 T10 18
valid_sources[0x1c] 516124 1 T1 3 T3 12 T10 6
valid_sources[0x1d] 204697 1 T1 2 T3 15 T10 27
valid_sources[0x1e] 198953 1 T1 1 T3 7 T10 9
valid_sources[0x1f] 221089 1 T1 1 T2 3 T3 6
valid_sources[0x20] 192780 1 T1 3 T3 1 T10 8
valid_sources[0x21] 196442 1 T2 3 T3 11 T10 12
valid_sources[0x22] 197780 1 T1 2 T2 5 T3 4
valid_sources[0x23] 192055 1 T1 3 T2 3 T3 8
valid_sources[0x24] 642012 1 T1 1 T3 5 T10 13
valid_sources[0x25] 193533 1 T1 4 T3 3 T10 12
valid_sources[0x26] 194038 1 T1 3 T2 3 T3 1
valid_sources[0x27] 192568 1 T3 5 T10 12 T11 25
valid_sources[0x28] 231168 1 T1 2 T2 1 T3 3
valid_sources[0x29] 451236 1 T1 3 T2 2 T3 7
valid_sources[0x2a] 193633 1 T1 1 T3 2 T10 28
valid_sources[0x2b] 432861 1 T1 3 T3 14 T10 17
valid_sources[0x2c] 198050 1 T1 7 T2 7 T3 11
valid_sources[0x2d] 195766 1 T1 4 T2 4 T3 2
valid_sources[0x2e] 193062 1 T1 3 T2 4 T3 10
valid_sources[0x2f] 192968 1 T1 1 T2 1 T3 5
valid_sources[0x30] 192127 1 T1 4 T2 1 T3 11
valid_sources[0x31] 205268 1 T1 3 T2 1 T3 1
valid_sources[0x32] 193328 1 T2 1 T3 6 T10 6
valid_sources[0x33] 193008 1 T1 3 T2 2 T3 10
valid_sources[0x34] 197771 1 T2 3 T3 12 T10 17
valid_sources[0x35] 537942 1 T1 1 T3 3 T10 14
valid_sources[0x36] 227766 1 T2 3 T3 10 T10 8
valid_sources[0x37] 194872 1 T1 3 T2 2 T3 10
valid_sources[0x38] 195673 1 T3 3 T10 16 T11 32
valid_sources[0x39] 525295 1 T1 1 T2 1 T3 10
valid_sources[0x3a] 191618 1 T2 1 T3 6 T10 8
valid_sources[0x3b] 193436 1 T1 1 T2 3 T3 9
valid_sources[0x3c] 194407 1 T1 1 T2 1 T10 6
valid_sources[0x3d] 195699 1 T1 5 T2 1 T3 8
valid_sources[0x3e] 202048 1 T1 3 T2 2 T3 19
valid_sources[0x3f] 194682 1 T1 1 T2 5 T3 3
valid_sources[0x40] 196701 1 T1 2 T2 5 T3 11
valid_sources[0x41] 197627 1 T2 1 T3 5 T10 14
valid_sources[0x42] 191948 1 T1 1 T2 3 T3 4
valid_sources[0x43] 690890 1 T1 2 T2 3 T3 6
valid_sources[0x44] 194675 1 T1 3 T2 1 T10 2
valid_sources[0x45] 194028 1 T1 2 T3 6 T10 18
valid_sources[0x46] 195762 1 T1 1 T3 8 T10 9
valid_sources[0x47] 203544 1 T3 4 T10 9 T11 28
valid_sources[0x48] 677150 1 T2 3 T3 11 T10 15
valid_sources[0x49] 200747 1 T1 4 T3 3 T10 16
valid_sources[0x4a] 203969 1 T1 1 T2 1 T3 7
valid_sources[0x4b] 197310 1 T1 1 T2 1 T3 4
valid_sources[0x4c] 205140 1 T1 5 T2 1 T3 17
valid_sources[0x4d] 195668 1 T1 2 T10 18 T11 23
valid_sources[0x4e] 195488 1 T1 1 T2 7 T3 4
valid_sources[0x4f] 198830 1 T1 1 T2 3 T3 4
valid_sources[0x50] 198070 1 T1 3 T2 1 T3 5
valid_sources[0x51] 200911 1 T1 2 T2 7 T3 5
valid_sources[0x52] 676216 1 T1 2 T3 3 T10 8
valid_sources[0x53] 195608 1 T1 1 T2 2 T3 3
valid_sources[0x54] 194943 1 T1 5 T3 5 T10 6
valid_sources[0x55] 632336 1 T1 4 T3 9 T10 4
valid_sources[0x56] 197495 1 T1 1 T2 2 T3 15
valid_sources[0x57] 408594 1 T1 4 T3 10 T10 9
valid_sources[0x58] 200927 1 T3 5 T10 7 T11 29
valid_sources[0x59] 196618 1 T2 5 T3 8 T10 11
valid_sources[0x5a] 193785 1 T1 2 T2 1 T3 13
valid_sources[0x5b] 200353 1 T2 2 T3 9 T10 8
valid_sources[0x5c] 199396 1 T1 2 T2 12 T3 1
valid_sources[0x5d] 205720 1 T1 2 T2 2 T3 14
valid_sources[0x5e] 204968 1 T1 2 T2 6 T3 14
valid_sources[0x5f] 193429 1 T1 2 T2 2 T3 16
valid_sources[0x60] 205820 1 T3 15 T10 3 T11 25
valid_sources[0x61] 194843 1 T1 1 T3 4 T10 15
valid_sources[0x62] 198146 1 T1 5 T2 1 T10 13
valid_sources[0x63] 205521 1 T3 4 T10 14 T11 24
valid_sources[0x64] 559719 1 T3 22 T10 13 T11 21
valid_sources[0x65] 199284 1 T1 1 T2 2 T3 5
valid_sources[0x66] 311420 1 T1 1 T3 4 T10 11
valid_sources[0x67] 200058 1 T1 3 T2 1 T3 2
valid_sources[0x68] 203665 1 T1 5 T3 7 T10 14
valid_sources[0x69] 195219 1 T1 2 T2 2 T3 8
valid_sources[0x6a] 218745 1 T1 1 T10 7 T11 31
valid_sources[0x6b] 200157 1 T1 2 T2 1 T3 11
valid_sources[0x6c] 192317 1 T1 2 T3 3 T10 11
valid_sources[0x6d] 204888 1 T2 3 T3 11 T10 13
valid_sources[0x6e] 198247 1 T3 8 T10 9 T11 19
valid_sources[0x6f] 194116 1 T1 1 T3 10 T10 9
valid_sources[0x70] 195306 1 T2 3 T3 2 T10 10
valid_sources[0x71] 197064 1 T1 5 T3 13 T10 27
valid_sources[0x72] 193730 1 T1 3 T3 14 T10 6
valid_sources[0x73] 433907 1 T1 4 T2 3 T3 12
valid_sources[0x74] 198057 1 T1 5 T2 3 T3 14
valid_sources[0x75] 195756 1 T1 4 T10 13 T11 31
valid_sources[0x76] 194528 1 T3 9 T10 7 T11 21
valid_sources[0x77] 197039 1 T1 1 T2 1 T3 13
valid_sources[0x78] 203921 1 T2 2 T3 2 T10 15
valid_sources[0x79] 194544 1 T2 1 T3 7 T10 6
valid_sources[0x7a] 194595 1 T1 1 T3 3 T10 12
valid_sources[0x7b] 194811 1 T1 1 T2 2 T3 7
valid_sources[0x7c] 198457 1 T1 3 T2 1 T3 5
valid_sources[0x7d] 195690 1 T1 3 T3 3 T10 9
valid_sources[0x7e] 206902 1 T1 1 T3 3 T10 14
valid_sources[0x7f] 193631 1 T1 6 T3 12 T10 13
valid_sources[0x80] 199880 1 T1 2 T2 2 T3 3



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 5083888 1 T1 23 T2 30 T3 394
values[0x0] all_enables biggest_size 10187356 1 T1 90 T2 59 T3 136
values[0x1] all_enables biggest_size 5769058 1 T1 38 T2 24 T3 80

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%