T803 |
/workspace/coverage/default/10.clkmgr_div_intersig_mubi.745773211 |
|
|
Apr 28 12:56:11 PM PDT 24 |
Apr 28 12:56:13 PM PDT 24 |
190436828 ps |
T804 |
/workspace/coverage/default/11.clkmgr_lc_ctrl_intersig_mubi.629294398 |
|
|
Apr 28 12:56:13 PM PDT 24 |
Apr 28 12:56:15 PM PDT 24 |
82402470 ps |
T805 |
/workspace/coverage/default/24.clkmgr_trans.2028470406 |
|
|
Apr 28 12:56:53 PM PDT 24 |
Apr 28 12:56:55 PM PDT 24 |
21054343 ps |
T806 |
/workspace/coverage/default/23.clkmgr_lc_clk_byp_req_intersig_mubi.4138273773 |
|
|
Apr 28 12:56:51 PM PDT 24 |
Apr 28 12:56:53 PM PDT 24 |
50268038 ps |
T807 |
/workspace/coverage/default/14.clkmgr_alert_test.64234453 |
|
|
Apr 28 12:56:29 PM PDT 24 |
Apr 28 12:56:32 PM PDT 24 |
134045328 ps |
T808 |
/workspace/coverage/default/28.clkmgr_frequency.449688478 |
|
|
Apr 28 12:56:57 PM PDT 24 |
Apr 28 12:57:07 PM PDT 24 |
2508598714 ps |
T809 |
/workspace/coverage/default/45.clkmgr_lc_clk_byp_req_intersig_mubi.1509082890 |
|
|
Apr 28 12:57:34 PM PDT 24 |
Apr 28 12:57:35 PM PDT 24 |
29042171 ps |
T810 |
/workspace/coverage/default/42.clkmgr_frequency.484100326 |
|
|
Apr 28 12:57:29 PM PDT 24 |
Apr 28 12:57:33 PM PDT 24 |
442725081 ps |
T811 |
/workspace/coverage/default/23.clkmgr_alert_test.3893353060 |
|
|
Apr 28 12:56:48 PM PDT 24 |
Apr 28 12:56:50 PM PDT 24 |
16968495 ps |
T812 |
/workspace/coverage/default/47.clkmgr_stress_all.275142441 |
|
|
Apr 28 12:57:37 PM PDT 24 |
Apr 28 12:57:51 PM PDT 24 |
3208662757 ps |
T813 |
/workspace/coverage/default/48.clkmgr_clk_status.3718650049 |
|
|
Apr 28 12:57:50 PM PDT 24 |
Apr 28 12:57:52 PM PDT 24 |
43199156 ps |
T814 |
/workspace/coverage/default/11.clkmgr_clk_status.786926752 |
|
|
Apr 28 12:56:18 PM PDT 24 |
Apr 28 12:56:19 PM PDT 24 |
19738657 ps |
T815 |
/workspace/coverage/default/38.clkmgr_trans.537582854 |
|
|
Apr 28 12:57:26 PM PDT 24 |
Apr 28 12:57:28 PM PDT 24 |
75795075 ps |
T816 |
/workspace/coverage/default/16.clkmgr_lc_ctrl_intersig_mubi.2410610810 |
|
|
Apr 28 12:56:26 PM PDT 24 |
Apr 28 12:56:28 PM PDT 24 |
16609432 ps |
T817 |
/workspace/coverage/default/33.clkmgr_lc_ctrl_intersig_mubi.1501461081 |
|
|
Apr 28 12:57:23 PM PDT 24 |
Apr 28 12:57:25 PM PDT 24 |
78737362 ps |
T818 |
/workspace/coverage/default/6.clkmgr_trans.1128388453 |
|
|
Apr 28 12:56:04 PM PDT 24 |
Apr 28 12:56:06 PM PDT 24 |
122008053 ps |
T819 |
/workspace/coverage/default/30.clkmgr_frequency_timeout.440734073 |
|
|
Apr 28 12:57:00 PM PDT 24 |
Apr 28 12:57:14 PM PDT 24 |
1693556173 ps |
T820 |
/workspace/coverage/default/0.clkmgr_div_intersig_mubi.3136033533 |
|
|
Apr 28 12:55:55 PM PDT 24 |
Apr 28 12:55:57 PM PDT 24 |
99432236 ps |
T821 |
/workspace/coverage/default/17.clkmgr_stress_all_with_rand_reset.1205345649 |
|
|
Apr 28 12:56:32 PM PDT 24 |
Apr 28 01:08:28 PM PDT 24 |
38763728875 ps |
T822 |
/workspace/coverage/default/27.clkmgr_lc_ctrl_intersig_mubi.1269117176 |
|
|
Apr 28 12:56:56 PM PDT 24 |
Apr 28 12:56:58 PM PDT 24 |
27339777 ps |
T823 |
/workspace/coverage/default/37.clkmgr_peri.2438729974 |
|
|
Apr 28 12:57:20 PM PDT 24 |
Apr 28 12:57:22 PM PDT 24 |
21028724 ps |
T824 |
/workspace/coverage/default/29.clkmgr_peri.3780912046 |
|
|
Apr 28 12:56:59 PM PDT 24 |
Apr 28 12:57:02 PM PDT 24 |
23708721 ps |
T825 |
/workspace/coverage/default/12.clkmgr_lc_ctrl_intersig_mubi.1036407542 |
|
|
Apr 28 12:56:14 PM PDT 24 |
Apr 28 12:56:16 PM PDT 24 |
19023618 ps |
T826 |
/workspace/coverage/default/14.clkmgr_smoke.3470993307 |
|
|
Apr 28 12:56:19 PM PDT 24 |
Apr 28 12:56:21 PM PDT 24 |
110960135 ps |
T827 |
/workspace/coverage/default/39.clkmgr_frequency_timeout.2490454374 |
|
|
Apr 28 12:57:23 PM PDT 24 |
Apr 28 12:57:32 PM PDT 24 |
2653111988 ps |
T828 |
/workspace/coverage/default/12.clkmgr_alert_test.3667008139 |
|
|
Apr 28 12:56:18 PM PDT 24 |
Apr 28 12:56:20 PM PDT 24 |
18666951 ps |
T829 |
/workspace/coverage/default/22.clkmgr_stress_all.2592701511 |
|
|
Apr 28 12:56:48 PM PDT 24 |
Apr 28 12:57:39 PM PDT 24 |
10099729042 ps |
T830 |
/workspace/coverage/default/49.clkmgr_stress_all_with_rand_reset.3038660776 |
|
|
Apr 28 12:57:49 PM PDT 24 |
Apr 28 01:11:20 PM PDT 24 |
143814161077 ps |
T831 |
/workspace/coverage/default/47.clkmgr_frequency_timeout.392586528 |
|
|
Apr 28 12:57:47 PM PDT 24 |
Apr 28 12:57:49 PM PDT 24 |
261559662 ps |
T832 |
/workspace/coverage/default/17.clkmgr_clk_handshake_intersig_mubi.2841136737 |
|
|
Apr 28 12:56:38 PM PDT 24 |
Apr 28 12:56:40 PM PDT 24 |
39187533 ps |
T833 |
/workspace/coverage/default/15.clkmgr_extclk.1408816575 |
|
|
Apr 28 12:56:29 PM PDT 24 |
Apr 28 12:56:31 PM PDT 24 |
21438604 ps |
T834 |
/workspace/coverage/default/31.clkmgr_clk_handshake_intersig_mubi.963783167 |
|
|
Apr 28 12:57:22 PM PDT 24 |
Apr 28 12:57:24 PM PDT 24 |
23478138 ps |
T835 |
/workspace/coverage/default/18.clkmgr_clk_handshake_intersig_mubi.2162774502 |
|
|
Apr 28 12:56:49 PM PDT 24 |
Apr 28 12:56:51 PM PDT 24 |
15881170 ps |
T836 |
/workspace/coverage/default/46.clkmgr_stress_all.3545573863 |
|
|
Apr 28 12:57:36 PM PDT 24 |
Apr 28 12:58:30 PM PDT 24 |
14509560881 ps |
T837 |
/workspace/coverage/default/37.clkmgr_div_intersig_mubi.3467502116 |
|
|
Apr 28 12:57:15 PM PDT 24 |
Apr 28 12:57:17 PM PDT 24 |
38047653 ps |
T838 |
/workspace/coverage/default/46.clkmgr_clk_handshake_intersig_mubi.2248816905 |
|
|
Apr 28 12:57:35 PM PDT 24 |
Apr 28 12:57:36 PM PDT 24 |
18957989 ps |
T839 |
/workspace/coverage/default/47.clkmgr_trans.1731507875 |
|
|
Apr 28 12:57:38 PM PDT 24 |
Apr 28 12:57:40 PM PDT 24 |
58549809 ps |
T840 |
/workspace/coverage/default/25.clkmgr_trans.2328879628 |
|
|
Apr 28 12:56:54 PM PDT 24 |
Apr 28 12:56:55 PM PDT 24 |
30481434 ps |
T841 |
/workspace/coverage/default/5.clkmgr_lc_ctrl_intersig_mubi.2013979625 |
|
|
Apr 28 12:56:01 PM PDT 24 |
Apr 28 12:56:03 PM PDT 24 |
44016279 ps |
T842 |
/workspace/coverage/default/48.clkmgr_clk_handshake_intersig_mubi.3892669824 |
|
|
Apr 28 12:57:48 PM PDT 24 |
Apr 28 12:57:49 PM PDT 24 |
15112602 ps |
T843 |
/workspace/coverage/default/34.clkmgr_frequency_timeout.3405569903 |
|
|
Apr 28 12:57:11 PM PDT 24 |
Apr 28 12:57:17 PM PDT 24 |
867029045 ps |
T844 |
/workspace/coverage/default/43.clkmgr_stress_all.81222178 |
|
|
Apr 28 12:57:36 PM PDT 24 |
Apr 28 12:57:55 PM PDT 24 |
5178078625 ps |
T845 |
/workspace/coverage/default/30.clkmgr_alert_test.2825462407 |
|
|
Apr 28 12:57:07 PM PDT 24 |
Apr 28 12:57:09 PM PDT 24 |
15888833 ps |
T846 |
/workspace/coverage/default/15.clkmgr_stress_all_with_rand_reset.1087909272 |
|
|
Apr 28 12:56:24 PM PDT 24 |
Apr 28 01:11:55 PM PDT 24 |
168525079884 ps |
T847 |
/workspace/coverage/default/10.clkmgr_stress_all.3469293334 |
|
|
Apr 28 12:56:13 PM PDT 24 |
Apr 28 12:56:37 PM PDT 24 |
2856364245 ps |
T848 |
/workspace/coverage/default/34.clkmgr_clk_handshake_intersig_mubi.3310875653 |
|
|
Apr 28 12:57:11 PM PDT 24 |
Apr 28 12:57:13 PM PDT 24 |
73001254 ps |
T849 |
/workspace/coverage/default/13.clkmgr_div_intersig_mubi.16552867 |
|
|
Apr 28 12:56:22 PM PDT 24 |
Apr 28 12:56:24 PM PDT 24 |
49419787 ps |
T850 |
/workspace/coverage/default/12.clkmgr_clk_handshake_intersig_mubi.3768566510 |
|
|
Apr 28 12:56:19 PM PDT 24 |
Apr 28 12:56:21 PM PDT 24 |
17204452 ps |
T851 |
/workspace/coverage/default/28.clkmgr_stress_all_with_rand_reset.3271500992 |
|
|
Apr 28 12:56:53 PM PDT 24 |
Apr 28 01:12:41 PM PDT 24 |
163938529078 ps |
T852 |
/workspace/coverage/default/13.clkmgr_frequency_timeout.2120513908 |
|
|
Apr 28 12:56:29 PM PDT 24 |
Apr 28 12:56:33 PM PDT 24 |
408410461 ps |
T853 |
/workspace/coverage/default/5.clkmgr_lc_clk_byp_req_intersig_mubi.3187085315 |
|
|
Apr 28 12:55:59 PM PDT 24 |
Apr 28 12:56:01 PM PDT 24 |
61113009 ps |
T854 |
/workspace/coverage/default/36.clkmgr_extclk.570443971 |
|
|
Apr 28 12:57:13 PM PDT 24 |
Apr 28 12:57:15 PM PDT 24 |
40068998 ps |
T11 |
/workspace/coverage/default/12.clkmgr_regwen.3607808938 |
|
|
Apr 28 12:56:22 PM PDT 24 |
Apr 28 12:56:28 PM PDT 24 |
950192118 ps |
T855 |
/workspace/coverage/default/36.clkmgr_frequency.1680285150 |
|
|
Apr 28 12:57:14 PM PDT 24 |
Apr 28 12:57:23 PM PDT 24 |
920459311 ps |
T856 |
/workspace/coverage/default/4.clkmgr_div_intersig_mubi.2103745619 |
|
|
Apr 28 12:55:59 PM PDT 24 |
Apr 28 12:56:01 PM PDT 24 |
18241703 ps |
T857 |
/workspace/coverage/cover_reg_top/18.clkmgr_intr_test.1323735264 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:51 PM PDT 24 |
12131092 ps |
T83 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.4046763628 |
|
|
Apr 28 12:51:34 PM PDT 24 |
Apr 28 12:51:36 PM PDT 24 |
135173517 ps |
T87 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.3781339047 |
|
|
Apr 28 12:51:19 PM PDT 24 |
Apr 28 12:51:27 PM PDT 24 |
264986761 ps |
T69 |
/workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.3948876905 |
|
|
Apr 28 12:51:38 PM PDT 24 |
Apr 28 12:51:40 PM PDT 24 |
127263369 ps |
T858 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.2550934973 |
|
|
Apr 28 12:51:37 PM PDT 24 |
Apr 28 12:51:39 PM PDT 24 |
32817697 ps |
T859 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.1480835214 |
|
|
Apr 28 12:51:18 PM PDT 24 |
Apr 28 12:51:20 PM PDT 24 |
18976173 ps |
T860 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.2282057748 |
|
|
Apr 28 12:51:23 PM PDT 24 |
Apr 28 12:51:25 PM PDT 24 |
70567842 ps |
T70 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.298346267 |
|
|
Apr 28 12:51:39 PM PDT 24 |
Apr 28 12:51:40 PM PDT 24 |
16224551 ps |
T861 |
/workspace/coverage/cover_reg_top/20.clkmgr_intr_test.2890902263 |
|
|
Apr 28 12:51:45 PM PDT 24 |
Apr 28 12:51:46 PM PDT 24 |
27301253 ps |
T51 |
/workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.7684127 |
|
|
Apr 28 12:51:34 PM PDT 24 |
Apr 28 12:51:40 PM PDT 24 |
1457132163 ps |
T862 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.227530435 |
|
|
Apr 28 12:51:48 PM PDT 24 |
Apr 28 12:51:50 PM PDT 24 |
51514518 ps |
T84 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.2566956454 |
|
|
Apr 28 12:51:40 PM PDT 24 |
Apr 28 12:51:44 PM PDT 24 |
475577952 ps |
T85 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.1632239668 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:53 PM PDT 24 |
97624717 ps |
T52 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.4211382221 |
|
|
Apr 28 12:51:22 PM PDT 24 |
Apr 28 12:51:25 PM PDT 24 |
166938744 ps |
T53 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.2817576064 |
|
|
Apr 28 12:51:32 PM PDT 24 |
Apr 28 12:51:39 PM PDT 24 |
1190021600 ps |
T863 |
/workspace/coverage/cover_reg_top/38.clkmgr_intr_test.1995481427 |
|
|
Apr 28 12:51:53 PM PDT 24 |
Apr 28 12:51:55 PM PDT 24 |
13433009 ps |
T864 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.860758493 |
|
|
Apr 28 12:51:32 PM PDT 24 |
Apr 28 12:51:34 PM PDT 24 |
137809562 ps |
T865 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.1309786826 |
|
|
Apr 28 12:51:41 PM PDT 24 |
Apr 28 12:51:44 PM PDT 24 |
112013574 ps |
T866 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.895802269 |
|
|
Apr 28 12:51:37 PM PDT 24 |
Apr 28 12:51:40 PM PDT 24 |
204400854 ps |
T154 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.3632678054 |
|
|
Apr 28 12:51:23 PM PDT 24 |
Apr 28 12:51:25 PM PDT 24 |
64471788 ps |
T88 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.2785743579 |
|
|
Apr 28 12:51:41 PM PDT 24 |
Apr 28 12:51:44 PM PDT 24 |
214488216 ps |
T71 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.628146505 |
|
|
Apr 28 12:51:46 PM PDT 24 |
Apr 28 12:51:48 PM PDT 24 |
91495701 ps |
T86 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.3055438628 |
|
|
Apr 28 12:51:38 PM PDT 24 |
Apr 28 12:51:40 PM PDT 24 |
79885725 ps |
T867 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.1360424106 |
|
|
Apr 28 12:51:43 PM PDT 24 |
Apr 28 12:51:47 PM PDT 24 |
42719800 ps |
T868 |
/workspace/coverage/cover_reg_top/29.clkmgr_intr_test.3115137925 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:52 PM PDT 24 |
44579161 ps |
T869 |
/workspace/coverage/cover_reg_top/2.clkmgr_intr_test.1679308614 |
|
|
Apr 28 12:51:17 PM PDT 24 |
Apr 28 12:51:18 PM PDT 24 |
30042509 ps |
T54 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.3475466506 |
|
|
Apr 28 12:51:32 PM PDT 24 |
Apr 28 12:51:35 PM PDT 24 |
140557095 ps |
T870 |
/workspace/coverage/cover_reg_top/27.clkmgr_intr_test.3856298980 |
|
|
Apr 28 12:51:48 PM PDT 24 |
Apr 28 12:51:50 PM PDT 24 |
22738512 ps |
T72 |
/workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.1644499740 |
|
|
Apr 28 12:51:48 PM PDT 24 |
Apr 28 12:51:50 PM PDT 24 |
18852183 ps |
T91 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.197129367 |
|
|
Apr 28 12:51:20 PM PDT 24 |
Apr 28 12:51:22 PM PDT 24 |
72208020 ps |
T89 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.2117297865 |
|
|
Apr 28 12:51:29 PM PDT 24 |
Apr 28 12:51:32 PM PDT 24 |
264876013 ps |
T55 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.2495238119 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:53 PM PDT 24 |
292612483 ps |
T871 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.3323861181 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:53 PM PDT 24 |
38857285 ps |
T872 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.2851671405 |
|
|
Apr 28 12:51:22 PM PDT 24 |
Apr 28 12:51:23 PM PDT 24 |
39014631 ps |
T873 |
/workspace/coverage/cover_reg_top/19.clkmgr_intr_test.3198109002 |
|
|
Apr 28 12:51:49 PM PDT 24 |
Apr 28 12:51:50 PM PDT 24 |
36776237 ps |
T874 |
/workspace/coverage/cover_reg_top/10.clkmgr_intr_test.2376240226 |
|
|
Apr 28 12:51:38 PM PDT 24 |
Apr 28 12:51:39 PM PDT 24 |
11614213 ps |
T56 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.3569380619 |
|
|
Apr 28 12:51:43 PM PDT 24 |
Apr 28 12:51:46 PM PDT 24 |
62199748 ps |
T156 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.1294076614 |
|
|
Apr 28 12:51:58 PM PDT 24 |
Apr 28 12:52:01 PM PDT 24 |
102064817 ps |
T114 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.1314462641 |
|
|
Apr 28 12:51:38 PM PDT 24 |
Apr 28 12:51:40 PM PDT 24 |
57462890 ps |
T73 |
/workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.1299519061 |
|
|
Apr 28 12:51:35 PM PDT 24 |
Apr 28 12:51:36 PM PDT 24 |
32919568 ps |
T875 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.1316276737 |
|
|
Apr 28 12:51:26 PM PDT 24 |
Apr 28 12:51:28 PM PDT 24 |
22839782 ps |
T74 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.1438332995 |
|
|
Apr 28 12:51:26 PM PDT 24 |
Apr 28 12:51:28 PM PDT 24 |
43047036 ps |
T876 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.2536505123 |
|
|
Apr 28 12:51:24 PM PDT 24 |
Apr 28 12:51:28 PM PDT 24 |
337233378 ps |
T877 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.1752475946 |
|
|
Apr 28 12:51:17 PM PDT 24 |
Apr 28 12:51:21 PM PDT 24 |
328979893 ps |
T878 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.2881072233 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:51 PM PDT 24 |
27533366 ps |
T879 |
/workspace/coverage/cover_reg_top/25.clkmgr_intr_test.401274801 |
|
|
Apr 28 12:51:49 PM PDT 24 |
Apr 28 12:51:50 PM PDT 24 |
26145348 ps |
T880 |
/workspace/coverage/cover_reg_top/46.clkmgr_intr_test.493907608 |
|
|
Apr 28 12:51:56 PM PDT 24 |
Apr 28 12:51:57 PM PDT 24 |
21818210 ps |
T75 |
/workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.3333518456 |
|
|
Apr 28 12:51:49 PM PDT 24 |
Apr 28 12:51:52 PM PDT 24 |
343395468 ps |
T881 |
/workspace/coverage/cover_reg_top/43.clkmgr_intr_test.994731105 |
|
|
Apr 28 12:51:54 PM PDT 24 |
Apr 28 12:51:56 PM PDT 24 |
15132722 ps |
T120 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.3672391379 |
|
|
Apr 28 12:51:31 PM PDT 24 |
Apr 28 12:51:33 PM PDT 24 |
93768221 ps |
T57 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.2175959540 |
|
|
Apr 28 12:51:48 PM PDT 24 |
Apr 28 12:51:51 PM PDT 24 |
144814298 ps |
T882 |
/workspace/coverage/cover_reg_top/21.clkmgr_intr_test.3706008203 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:52 PM PDT 24 |
34809478 ps |
T883 |
/workspace/coverage/cover_reg_top/22.clkmgr_intr_test.1338867706 |
|
|
Apr 28 12:51:57 PM PDT 24 |
Apr 28 12:51:59 PM PDT 24 |
39362660 ps |
T884 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.2957687535 |
|
|
Apr 28 12:51:42 PM PDT 24 |
Apr 28 12:51:45 PM PDT 24 |
38425544 ps |
T100 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.3253717765 |
|
|
Apr 28 12:51:16 PM PDT 24 |
Apr 28 12:51:19 PM PDT 24 |
252494073 ps |
T885 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.4104673790 |
|
|
Apr 28 12:51:28 PM PDT 24 |
Apr 28 12:51:31 PM PDT 24 |
99072017 ps |
T886 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.1249210306 |
|
|
Apr 28 12:51:32 PM PDT 24 |
Apr 28 12:51:36 PM PDT 24 |
794403156 ps |
T887 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.1543336357 |
|
|
Apr 28 12:51:26 PM PDT 24 |
Apr 28 12:51:28 PM PDT 24 |
81937225 ps |
T888 |
/workspace/coverage/cover_reg_top/4.clkmgr_intr_test.1346003972 |
|
|
Apr 28 12:51:24 PM PDT 24 |
Apr 28 12:51:25 PM PDT 24 |
82577085 ps |
T101 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.3388248884 |
|
|
Apr 28 12:51:23 PM PDT 24 |
Apr 28 12:51:25 PM PDT 24 |
81289285 ps |
T889 |
/workspace/coverage/cover_reg_top/3.clkmgr_intr_test.159484592 |
|
|
Apr 28 12:51:21 PM PDT 24 |
Apr 28 12:51:23 PM PDT 24 |
23060420 ps |
T890 |
/workspace/coverage/cover_reg_top/16.clkmgr_intr_test.3538190839 |
|
|
Apr 28 12:51:51 PM PDT 24 |
Apr 28 12:51:52 PM PDT 24 |
14717154 ps |
T891 |
/workspace/coverage/cover_reg_top/0.clkmgr_intr_test.3890837570 |
|
|
Apr 28 12:51:17 PM PDT 24 |
Apr 28 12:51:18 PM PDT 24 |
27111315 ps |
T102 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.3201079234 |
|
|
Apr 28 12:51:22 PM PDT 24 |
Apr 28 12:51:24 PM PDT 24 |
101327547 ps |
T118 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.37378133 |
|
|
Apr 28 12:51:51 PM PDT 24 |
Apr 28 12:51:54 PM PDT 24 |
112244022 ps |
T892 |
/workspace/coverage/cover_reg_top/35.clkmgr_intr_test.771453096 |
|
|
Apr 28 12:51:58 PM PDT 24 |
Apr 28 12:52:00 PM PDT 24 |
23604700 ps |
T893 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.933822863 |
|
|
Apr 28 12:51:35 PM PDT 24 |
Apr 28 12:51:36 PM PDT 24 |
58310059 ps |
T894 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.2448901570 |
|
|
Apr 28 12:51:20 PM PDT 24 |
Apr 28 12:51:22 PM PDT 24 |
126924731 ps |
T895 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.4271049468 |
|
|
Apr 28 12:51:17 PM PDT 24 |
Apr 28 12:51:26 PM PDT 24 |
738682180 ps |
T896 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.652507141 |
|
|
Apr 28 12:51:22 PM PDT 24 |
Apr 28 12:51:28 PM PDT 24 |
280388184 ps |
T897 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.2297924993 |
|
|
Apr 28 12:51:43 PM PDT 24 |
Apr 28 12:51:45 PM PDT 24 |
39598398 ps |
T898 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.308501479 |
|
|
Apr 28 12:51:19 PM PDT 24 |
Apr 28 12:51:21 PM PDT 24 |
25535437 ps |
T899 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.4093210542 |
|
|
Apr 28 12:51:18 PM PDT 24 |
Apr 28 12:51:19 PM PDT 24 |
62693064 ps |
T900 |
/workspace/coverage/cover_reg_top/34.clkmgr_intr_test.853350348 |
|
|
Apr 28 12:51:56 PM PDT 24 |
Apr 28 12:51:58 PM PDT 24 |
34800080 ps |
T901 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.933413631 |
|
|
Apr 28 12:51:41 PM PDT 24 |
Apr 28 12:51:42 PM PDT 24 |
13823462 ps |
T902 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.268645817 |
|
|
Apr 28 12:51:48 PM PDT 24 |
Apr 28 12:51:51 PM PDT 24 |
173689995 ps |
T903 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.3858687752 |
|
|
Apr 28 12:51:32 PM PDT 24 |
Apr 28 12:51:33 PM PDT 24 |
19832692 ps |
T904 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.4070077971 |
|
|
Apr 28 12:51:24 PM PDT 24 |
Apr 28 12:51:26 PM PDT 24 |
17781681 ps |
T905 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.2771851490 |
|
|
Apr 28 12:51:43 PM PDT 24 |
Apr 28 12:51:46 PM PDT 24 |
75005945 ps |
T906 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.2284910188 |
|
|
Apr 28 12:51:35 PM PDT 24 |
Apr 28 12:51:38 PM PDT 24 |
36183325 ps |
T109 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.814648969 |
|
|
Apr 28 12:51:45 PM PDT 24 |
Apr 28 12:51:49 PM PDT 24 |
491894009 ps |
T907 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.2831047112 |
|
|
Apr 28 12:51:24 PM PDT 24 |
Apr 28 12:51:27 PM PDT 24 |
107472736 ps |
T908 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.2505742726 |
|
|
Apr 28 12:51:31 PM PDT 24 |
Apr 28 12:51:34 PM PDT 24 |
302954494 ps |
T909 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.1126450540 |
|
|
Apr 28 12:51:49 PM PDT 24 |
Apr 28 12:51:53 PM PDT 24 |
216725668 ps |
T910 |
/workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.3030021055 |
|
|
Apr 28 12:51:26 PM PDT 24 |
Apr 28 12:51:28 PM PDT 24 |
104041374 ps |
T103 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.3279214157 |
|
|
Apr 28 12:51:38 PM PDT 24 |
Apr 28 12:51:41 PM PDT 24 |
159305441 ps |
T911 |
/workspace/coverage/cover_reg_top/33.clkmgr_intr_test.3367111554 |
|
|
Apr 28 12:51:49 PM PDT 24 |
Apr 28 12:51:50 PM PDT 24 |
16563163 ps |
T115 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.1954930990 |
|
|
Apr 28 12:51:28 PM PDT 24 |
Apr 28 12:51:30 PM PDT 24 |
72472665 ps |
T912 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.3549043120 |
|
|
Apr 28 12:51:20 PM PDT 24 |
Apr 28 12:51:22 PM PDT 24 |
24707630 ps |
T913 |
/workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.82363597 |
|
|
Apr 28 12:51:34 PM PDT 24 |
Apr 28 12:51:36 PM PDT 24 |
28123841 ps |
T104 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.4190253789 |
|
|
Apr 28 12:51:37 PM PDT 24 |
Apr 28 12:51:42 PM PDT 24 |
397133080 ps |
T105 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.2928944043 |
|
|
Apr 28 12:51:29 PM PDT 24 |
Apr 28 12:51:31 PM PDT 24 |
90537668 ps |
T914 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.2225688645 |
|
|
Apr 28 12:51:17 PM PDT 24 |
Apr 28 12:51:18 PM PDT 24 |
15968434 ps |
T915 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.1609619373 |
|
|
Apr 28 12:51:23 PM PDT 24 |
Apr 28 12:51:26 PM PDT 24 |
152035340 ps |
T110 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.1509737086 |
|
|
Apr 28 12:51:43 PM PDT 24 |
Apr 28 12:51:46 PM PDT 24 |
103292056 ps |
T916 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.2017597503 |
|
|
Apr 28 12:51:46 PM PDT 24 |
Apr 28 12:51:49 PM PDT 24 |
65556307 ps |
T106 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.253659110 |
|
|
Apr 28 12:51:40 PM PDT 24 |
Apr 28 12:51:43 PM PDT 24 |
151195707 ps |
T917 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.1290562468 |
|
|
Apr 28 12:51:23 PM PDT 24 |
Apr 28 12:51:25 PM PDT 24 |
37649631 ps |
T918 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.2242088835 |
|
|
Apr 28 12:51:27 PM PDT 24 |
Apr 28 12:51:28 PM PDT 24 |
16440618 ps |
T919 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.1773803233 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:52 PM PDT 24 |
44525418 ps |
T920 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.2898195353 |
|
|
Apr 28 12:51:48 PM PDT 24 |
Apr 28 12:51:49 PM PDT 24 |
31346195 ps |
T921 |
/workspace/coverage/cover_reg_top/41.clkmgr_intr_test.463693658 |
|
|
Apr 28 12:51:56 PM PDT 24 |
Apr 28 12:51:58 PM PDT 24 |
11819634 ps |
T922 |
/workspace/coverage/cover_reg_top/6.clkmgr_intr_test.1437475707 |
|
|
Apr 28 12:51:28 PM PDT 24 |
Apr 28 12:51:29 PM PDT 24 |
35177209 ps |
T923 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.1533742408 |
|
|
Apr 28 12:51:22 PM PDT 24 |
Apr 28 12:51:29 PM PDT 24 |
971965906 ps |
T924 |
/workspace/coverage/cover_reg_top/39.clkmgr_intr_test.2182702985 |
|
|
Apr 28 12:51:54 PM PDT 24 |
Apr 28 12:51:56 PM PDT 24 |
27917912 ps |
T925 |
/workspace/coverage/cover_reg_top/36.clkmgr_intr_test.3089795169 |
|
|
Apr 28 12:51:52 PM PDT 24 |
Apr 28 12:51:54 PM PDT 24 |
14527834 ps |
T926 |
/workspace/coverage/cover_reg_top/30.clkmgr_intr_test.747984489 |
|
|
Apr 28 12:51:47 PM PDT 24 |
Apr 28 12:51:49 PM PDT 24 |
37565203 ps |
T927 |
/workspace/coverage/cover_reg_top/31.clkmgr_intr_test.3716783023 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:52 PM PDT 24 |
15471075 ps |
T121 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.507227557 |
|
|
Apr 28 12:51:19 PM PDT 24 |
Apr 28 12:51:23 PM PDT 24 |
162132771 ps |
T928 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.213511378 |
|
|
Apr 28 12:51:19 PM PDT 24 |
Apr 28 12:51:20 PM PDT 24 |
45462503 ps |
T929 |
/workspace/coverage/cover_reg_top/45.clkmgr_intr_test.3384332274 |
|
|
Apr 28 12:51:52 PM PDT 24 |
Apr 28 12:51:54 PM PDT 24 |
21069174 ps |
T930 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.105290050 |
|
|
Apr 28 12:51:20 PM PDT 24 |
Apr 28 12:51:22 PM PDT 24 |
180146692 ps |
T931 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.1171587156 |
|
|
Apr 28 12:51:36 PM PDT 24 |
Apr 28 12:51:40 PM PDT 24 |
150816487 ps |
T932 |
/workspace/coverage/cover_reg_top/5.clkmgr_intr_test.708285032 |
|
|
Apr 28 12:51:28 PM PDT 24 |
Apr 28 12:51:29 PM PDT 24 |
36644510 ps |
T111 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.4249770374 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:53 PM PDT 24 |
206025426 ps |
T112 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.914249980 |
|
|
Apr 28 12:51:27 PM PDT 24 |
Apr 28 12:51:28 PM PDT 24 |
110017244 ps |
T933 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.2898956361 |
|
|
Apr 28 12:51:17 PM PDT 24 |
Apr 28 12:51:18 PM PDT 24 |
19121864 ps |
T934 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.752677217 |
|
|
Apr 28 12:51:46 PM PDT 24 |
Apr 28 12:51:47 PM PDT 24 |
20678691 ps |
T935 |
/workspace/coverage/cover_reg_top/7.clkmgr_intr_test.2266307486 |
|
|
Apr 28 12:51:36 PM PDT 24 |
Apr 28 12:51:38 PM PDT 24 |
14734673 ps |
T936 |
/workspace/coverage/cover_reg_top/13.clkmgr_intr_test.4271994553 |
|
|
Apr 28 12:51:46 PM PDT 24 |
Apr 28 12:51:47 PM PDT 24 |
16428000 ps |
T937 |
/workspace/coverage/cover_reg_top/1.clkmgr_intr_test.1012871548 |
|
|
Apr 28 12:51:16 PM PDT 24 |
Apr 28 12:51:18 PM PDT 24 |
25431968 ps |
T938 |
/workspace/coverage/cover_reg_top/23.clkmgr_intr_test.3126359420 |
|
|
Apr 28 12:51:52 PM PDT 24 |
Apr 28 12:51:54 PM PDT 24 |
27949650 ps |
T939 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.3355428063 |
|
|
Apr 28 12:51:35 PM PDT 24 |
Apr 28 12:51:39 PM PDT 24 |
574463945 ps |
T940 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.2970413942 |
|
|
Apr 28 12:51:43 PM PDT 24 |
Apr 28 12:51:46 PM PDT 24 |
27231341 ps |
T941 |
/workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.514904977 |
|
|
Apr 28 12:51:40 PM PDT 24 |
Apr 28 12:51:42 PM PDT 24 |
59751431 ps |
T942 |
/workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.343553288 |
|
|
Apr 28 12:51:30 PM PDT 24 |
Apr 28 12:51:31 PM PDT 24 |
89047179 ps |
T943 |
/workspace/coverage/cover_reg_top/40.clkmgr_intr_test.320615993 |
|
|
Apr 28 12:51:55 PM PDT 24 |
Apr 28 12:51:57 PM PDT 24 |
41909043 ps |
T944 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.3764174773 |
|
|
Apr 28 12:51:33 PM PDT 24 |
Apr 28 12:51:37 PM PDT 24 |
114361780 ps |
T119 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.351142980 |
|
|
Apr 28 12:51:16 PM PDT 24 |
Apr 28 12:51:18 PM PDT 24 |
96754856 ps |
T945 |
/workspace/coverage/cover_reg_top/12.clkmgr_intr_test.3480817897 |
|
|
Apr 28 12:51:42 PM PDT 24 |
Apr 28 12:51:44 PM PDT 24 |
12818579 ps |
T946 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.405070151 |
|
|
Apr 28 12:51:49 PM PDT 24 |
Apr 28 12:51:53 PM PDT 24 |
219835202 ps |
T947 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.1245982283 |
|
|
Apr 28 12:51:57 PM PDT 24 |
Apr 28 12:52:01 PM PDT 24 |
217296244 ps |
T948 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.3677102184 |
|
|
Apr 28 12:51:52 PM PDT 24 |
Apr 28 12:51:54 PM PDT 24 |
44121052 ps |
T107 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.507094654 |
|
|
Apr 28 12:51:35 PM PDT 24 |
Apr 28 12:51:38 PM PDT 24 |
607530825 ps |
T949 |
/workspace/coverage/cover_reg_top/37.clkmgr_intr_test.408640901 |
|
|
Apr 28 12:51:52 PM PDT 24 |
Apr 28 12:51:53 PM PDT 24 |
12592842 ps |
T950 |
/workspace/coverage/cover_reg_top/11.clkmgr_intr_test.2004946359 |
|
|
Apr 28 12:51:41 PM PDT 24 |
Apr 28 12:51:42 PM PDT 24 |
26928078 ps |
T951 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.2895978545 |
|
|
Apr 28 12:51:27 PM PDT 24 |
Apr 28 12:51:29 PM PDT 24 |
87066883 ps |
T90 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.3481386455 |
|
|
Apr 28 12:51:21 PM PDT 24 |
Apr 28 12:51:23 PM PDT 24 |
63391522 ps |
T952 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.3442280626 |
|
|
Apr 28 12:51:21 PM PDT 24 |
Apr 28 12:51:23 PM PDT 24 |
28247185 ps |
T953 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.3015040276 |
|
|
Apr 28 12:51:23 PM PDT 24 |
Apr 28 12:51:24 PM PDT 24 |
44776652 ps |
T954 |
/workspace/coverage/cover_reg_top/24.clkmgr_intr_test.2885750562 |
|
|
Apr 28 12:51:50 PM PDT 24 |
Apr 28 12:51:52 PM PDT 24 |
126156475 ps |
T955 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.776746779 |
|
|
Apr 28 12:51:47 PM PDT 24 |
Apr 28 12:51:50 PM PDT 24 |
519407433 ps |
T956 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.1247731173 |
|
|
Apr 28 12:52:06 PM PDT 24 |
Apr 28 12:52:08 PM PDT 24 |
62614822 ps |
T957 |
/workspace/coverage/cover_reg_top/14.clkmgr_intr_test.762729617 |
|
|
Apr 28 12:51:43 PM PDT 24 |
Apr 28 12:51:45 PM PDT 24 |
13959841 ps |
T958 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.2446622088 |
|
|
Apr 28 12:51:28 PM PDT 24 |
Apr 28 12:51:30 PM PDT 24 |
23591107 ps |
T959 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.847691776 |
|
|
Apr 28 12:51:52 PM PDT 24 |
Apr 28 12:51:54 PM PDT 24 |
171505694 ps |
T960 |
/workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.680573343 |
|
|
Apr 28 12:51:27 PM PDT 24 |
Apr 28 12:51:29 PM PDT 24 |
256656022 ps |
T961 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.704249950 |
|
|
Apr 28 12:51:44 PM PDT 24 |
Apr 28 12:51:45 PM PDT 24 |
13852149 ps |
T962 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.1252203390 |
|
|
Apr 28 12:51:19 PM PDT 24 |
Apr 28 12:51:21 PM PDT 24 |
111953598 ps |
T963 |
/workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.771390056 |
|
|
Apr 28 12:51:40 PM PDT 24 |
Apr 28 12:51:42 PM PDT 24 |
34251982 ps |
T964 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.2482117801 |
|
|
Apr 28 12:51:23 PM PDT 24 |
Apr 28 12:51:33 PM PDT 24 |
1020128053 ps |
T965 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.2943132672 |
|
|
Apr 28 12:51:43 PM PDT 24 |
Apr 28 12:51:45 PM PDT 24 |
23619093 ps |
T155 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.2341812546 |
|
|
Apr 28 12:51:20 PM PDT 24 |
Apr 28 12:51:24 PM PDT 24 |
355810436 ps |
T108 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.1497710586 |
|
|
Apr 28 12:51:58 PM PDT 24 |
Apr 28 12:52:02 PM PDT 24 |
134107715 ps |
T966 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.981389809 |
|
|
Apr 28 12:51:36 PM PDT 24 |
Apr 28 12:51:38 PM PDT 24 |
43809683 ps |
T967 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.645006155 |
|
|
Apr 28 12:51:44 PM PDT 24 |
Apr 28 12:51:46 PM PDT 24 |
58541575 ps |
T116 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.2047231377 |
|
|
Apr 28 12:51:42 PM PDT 24 |
Apr 28 12:51:45 PM PDT 24 |
272302285 ps |
T968 |
/workspace/coverage/cover_reg_top/47.clkmgr_intr_test.2785076158 |
|
|
Apr 28 12:51:54 PM PDT 24 |
Apr 28 12:51:56 PM PDT 24 |
41131362 ps |
T969 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.3425484310 |
|
|
Apr 28 12:51:14 PM PDT 24 |
Apr 28 12:51:17 PM PDT 24 |
52272364 ps |
T970 |
/workspace/coverage/cover_reg_top/15.clkmgr_intr_test.3979520340 |
|
|
Apr 28 12:51:46 PM PDT 24 |
Apr 28 12:51:47 PM PDT 24 |
29005103 ps |
T971 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.2250850101 |
|
|
Apr 28 12:51:15 PM PDT 24 |
Apr 28 12:51:18 PM PDT 24 |
237386098 ps |
T972 |
/workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.2397615357 |
|
|
Apr 28 12:51:21 PM PDT 24 |
Apr 28 12:51:22 PM PDT 24 |
108462286 ps |
T973 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.286317239 |
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|
Apr 28 12:51:34 PM PDT 24 |
Apr 28 12:51:36 PM PDT 24 |
27210745 ps |
T974 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.3430929228 |
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|
Apr 28 12:51:28 PM PDT 24 |
Apr 28 12:51:31 PM PDT 24 |
181049116 ps |
T975 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.1139615340 |
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|
Apr 28 12:51:31 PM PDT 24 |
Apr 28 12:51:33 PM PDT 24 |
126704765 ps |
T976 |
/workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.577045865 |
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|
Apr 28 12:51:23 PM PDT 24 |
Apr 28 12:51:26 PM PDT 24 |
558040168 ps |
T977 |
/workspace/coverage/cover_reg_top/48.clkmgr_intr_test.2358212935 |
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|
Apr 28 12:51:56 PM PDT 24 |
Apr 28 12:51:58 PM PDT 24 |
37206721 ps |
T978 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.3985440385 |
|
|
Apr 28 12:51:22 PM PDT 24 |
Apr 28 12:51:25 PM PDT 24 |
97252841 ps |
T979 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.1381759427 |
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|
Apr 28 12:51:41 PM PDT 24 |
Apr 28 12:51:44 PM PDT 24 |
233390757 ps |
T980 |
/workspace/coverage/cover_reg_top/8.clkmgr_intr_test.1916090016 |
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|
Apr 28 12:51:32 PM PDT 24 |
Apr 28 12:51:33 PM PDT 24 |
35078661 ps |
T981 |
/workspace/coverage/cover_reg_top/42.clkmgr_intr_test.1438845455 |
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|
Apr 28 12:51:54 PM PDT 24 |
Apr 28 12:51:56 PM PDT 24 |
35395871 ps |
T982 |
/workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.1074351909 |
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|
Apr 28 12:51:37 PM PDT 24 |
Apr 28 12:51:38 PM PDT 24 |
24261914 ps |
T983 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.208744159 |
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|
Apr 28 12:51:35 PM PDT 24 |
Apr 28 12:51:36 PM PDT 24 |
62176026 ps |
T92 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.1678454230 |
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|
Apr 28 12:51:25 PM PDT 24 |
Apr 28 12:51:28 PM PDT 24 |
123476407 ps |
T984 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.990426670 |
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|
Apr 28 12:51:18 PM PDT 24 |
Apr 28 12:51:21 PM PDT 24 |
76552228 ps |
T985 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.3362515685 |
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|
Apr 28 12:51:37 PM PDT 24 |
Apr 28 12:51:39 PM PDT 24 |
29939337 ps |
T986 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.4269528368 |
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|
Apr 28 12:51:58 PM PDT 24 |
Apr 28 12:52:00 PM PDT 24 |
73724127 ps |
T987 |
/workspace/coverage/cover_reg_top/28.clkmgr_intr_test.840630733 |
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|
Apr 28 12:51:48 PM PDT 24 |
Apr 28 12:51:49 PM PDT 24 |
33043537 ps |
T988 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.1483299862 |
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|
Apr 28 12:51:43 PM PDT 24 |
Apr 28 12:51:47 PM PDT 24 |
89492790 ps |
T113 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.594326516 |
|
|
Apr 28 12:51:44 PM PDT 24 |
Apr 28 12:51:48 PM PDT 24 |
376630540 ps |
T989 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.898952535 |
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|
Apr 28 12:51:47 PM PDT 24 |
Apr 28 12:51:48 PM PDT 24 |
17886210 ps |
T990 |
/workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.3758170514 |
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|
Apr 28 12:51:16 PM PDT 24 |
Apr 28 12:51:17 PM PDT 24 |
28717623 ps |
T991 |
/workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.1436146507 |
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|
Apr 28 12:51:48 PM PDT 24 |
Apr 28 12:51:50 PM PDT 24 |
105822221 ps |
T992 |
/workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.4082226499 |
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|
Apr 28 12:51:33 PM PDT 24 |
Apr 28 12:51:36 PM PDT 24 |
159819650 ps |
T993 |
/workspace/coverage/cover_reg_top/26.clkmgr_intr_test.353252695 |
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|
Apr 28 12:51:48 PM PDT 24 |
Apr 28 12:51:49 PM PDT 24 |
28887293 ps |
T994 |
/workspace/coverage/cover_reg_top/9.clkmgr_intr_test.1258968996 |
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|
Apr 28 12:51:32 PM PDT 24 |
Apr 28 12:51:33 PM PDT 24 |
34046107 ps |
T122 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.3267705796 |
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|
Apr 28 12:51:19 PM PDT 24 |
Apr 28 12:51:22 PM PDT 24 |
306523314 ps |
T995 |
/workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.2178959106 |
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|
Apr 28 12:51:19 PM PDT 24 |
Apr 28 12:51:21 PM PDT 24 |
38901917 ps |
T996 |
/workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.2804369327 |
|
|
Apr 28 12:51:43 PM PDT 24 |
Apr 28 12:51:45 PM PDT 24 |
88684713 ps |
T997 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.365909703 |
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|
Apr 28 12:51:33 PM PDT 24 |
Apr 28 12:51:35 PM PDT 24 |
85222720 ps |
T998 |
/workspace/coverage/cover_reg_top/32.clkmgr_intr_test.465401290 |
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|
Apr 28 12:51:58 PM PDT 24 |
Apr 28 12:51:59 PM PDT 24 |
77302753 ps |
T999 |
/workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.2433747221 |
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|
Apr 28 12:51:45 PM PDT 24 |
Apr 28 12:51:47 PM PDT 24 |
97646599 ps |
T1000 |
/workspace/coverage/cover_reg_top/17.clkmgr_intr_test.3364322648 |
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|
Apr 28 12:51:52 PM PDT 24 |
Apr 28 12:51:53 PM PDT 24 |
24421868 ps |
T1001 |
/workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.1430992024 |
|
|
Apr 28 12:51:35 PM PDT 24 |
Apr 28 12:51:37 PM PDT 24 |
22693293 ps |
T1002 |
/workspace/coverage/cover_reg_top/44.clkmgr_intr_test.177937438 |
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|
Apr 28 12:51:52 PM PDT 24 |
Apr 28 12:51:53 PM PDT 24 |
25422175 ps |