Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	679822	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

4182507

1

T4

1

T5

3

T1

116694

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1189684	1			T5	4		T1	31221		T16	10
values[0x0]	1686293	1			T4	7		T5	1		T1	44952
values[0x1]	1986352	1			T4	10		T5	2		T1	54082

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	364688	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

4497641

1

T4

3

T5

4

T1

124293

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	17259	1			T1	428		T23	2		T9	285
valid_sources[0x01]	19312	1			T1	607		T17	2		T3	1
valid_sources[0x02]	18981	1			T1	432		T9	319		T10	4
valid_sources[0x03]	20200	1			T1	520		T28	1		T23	1
valid_sources[0x04]	18832	1			T1	594		T17	1		T3	10
valid_sources[0x05]	18260	1			T1	638		T3	1		T28	1
valid_sources[0x06]	19802	1			T1	558		T3	5		T29	1
valid_sources[0x07]	18070	1			T1	482		T9	308		T122	1
valid_sources[0x08]	18199	1			T1	514		T9	360		T10	5
valid_sources[0x09]	17716	1			T1	526		T3	1		T9	372
valid_sources[0x0a]	20228	1			T1	530		T23	2		T9	334
valid_sources[0x0b]	21014	1			T1	492		T9	329		T11	975
valid_sources[0x0c]	17195	1			T1	514		T3	1		T9	348
valid_sources[0x0d]	17953	1			T1	476		T3	3		T9	321
valid_sources[0x0e]	18570	1			T1	466		T3	2		T24	6
valid_sources[0x0f]	20253	1			T1	457		T23	1		T9	364
valid_sources[0x10]	17837	1			T1	529		T3	3		T29	2
valid_sources[0x11]	20380	1			T1	486		T9	304		T11	946
valid_sources[0x12]	18618	1			T1	516		T17	1		T3	2
valid_sources[0x13]	19321	1			T1	480		T9	297		T121	13
valid_sources[0x14]	18362	1			T1	544		T3	6		T23	1
valid_sources[0x15]	18321	1			T1	474		T28	1		T9	370
valid_sources[0x16]	18899	1			T1	519		T3	3		T9	366
valid_sources[0x17]	18657	1			T1	555		T3	3		T9	297
valid_sources[0x18]	17511	1			T1	598		T17	3		T24	12
valid_sources[0x19]	18401	1			T1	505		T3	2		T27	1
valid_sources[0x1a]	18667	1			T1	443		T19	25		T3	1
valid_sources[0x1b]	17948	1			T1	402		T3	3		T29	1
valid_sources[0x1c]	20547	1			T1	468		T3	7		T28	1
valid_sources[0x1d]	19580	1			T1	435		T9	322		T11	941
valid_sources[0x1e]	19345	1			T1	563		T23	1		T9	356
valid_sources[0x1f]	17894	1			T1	520		T28	1		T9	324
valid_sources[0x20]	20757	1			T1	555		T3	2		T9	326
valid_sources[0x21]	19317	1			T1	564		T3	1		T9	339
valid_sources[0x22]	20480	1			T1	517		T3	1		T23	1
valid_sources[0x23]	18911	1			T1	513		T3	2		T30	2
valid_sources[0x24]	19771	1			T1	471		T17	2		T30	1
valid_sources[0x25]	22343	1			T1	409		T9	325		T11	1001
valid_sources[0x26]	18439	1			T1	557		T3	1		T9	290
valid_sources[0x27]	18554	1			T1	452		T9	299		T10	11
valid_sources[0x28]	17400	1			T1	525		T9	337		T11	934
valid_sources[0x29]	19079	1			T1	507		T3	9		T23	1
valid_sources[0x2a]	18809	1			T1	485		T3	4		T9	307
valid_sources[0x2b]	18213	1			T1	481		T3	2		T9	320
valid_sources[0x2c]	18492	1			T1	486		T23	1		T30	1
valid_sources[0x2d]	17997	1			T1	449		T3	1		T9	307
valid_sources[0x2e]	19766	1			T5	1		T1	498		T28	2
valid_sources[0x2f]	18834	1			T1	525		T3	5		T9	330
valid_sources[0x30]	19189	1			T1	474		T3	6		T9	291
valid_sources[0x31]	18634	1			T1	544		T3	1		T9	341
valid_sources[0x32]	21918	1			T1	478		T2	1307		T3	2
valid_sources[0x33]	18477	1			T4	4		T1	404		T23	1
valid_sources[0x34]	20538	1			T1	459		T23	1		T24	6
valid_sources[0x35]	19503	1			T1	604		T3	2		T9	333
valid_sources[0x36]	18600	1			T1	563		T3	2		T27	1
valid_sources[0x37]	17936	1			T1	524		T23	1		T9	324
valid_sources[0x38]	20111	1			T1	482		T26	4		T28	1
valid_sources[0x39]	17991	1			T1	432		T3	5		T23	2
valid_sources[0x3a]	18082	1			T1	588		T3	1		T9	320
valid_sources[0x3b]	20738	1			T1	453		T3	1		T28	1
valid_sources[0x3c]	21137	1			T1	491		T29	2		T9	333
valid_sources[0x3d]	19467	1			T1	509		T3	2		T28	1
valid_sources[0x3e]	17953	1			T1	501		T3	5		T28	1
valid_sources[0x3f]	18817	1			T1	465		T21	5		T9	358
valid_sources[0x40]	20137	1			T1	568		T3	2		T30	1
valid_sources[0x41]	18001	1			T1	442		T23	1		T9	327
valid_sources[0x42]	17890	1			T5	1		T1	494		T3	1
valid_sources[0x43]	17880	1			T1	466		T3	1		T26	5
valid_sources[0x44]	19887	1			T1	429		T23	2		T9	310
valid_sources[0x45]	19822	1			T1	449		T23	2		T24	11
valid_sources[0x46]	19187	1			T1	552		T23	2		T24	37
valid_sources[0x47]	19031	1			T1	575		T23	1		T24	8
valid_sources[0x48]	17498	1			T1	588		T21	5		T3	5
valid_sources[0x49]	18629	1			T5	1		T1	361		T9	345
valid_sources[0x4a]	17606	1			T1	483		T28	1		T9	314
valid_sources[0x4b]	20088	1			T1	403		T9	279		T11	938
valid_sources[0x4c]	19396	1			T1	436		T3	5		T9	325
valid_sources[0x4d]	18241	1			T1	500		T3	1		T28	1
valid_sources[0x4e]	18270	1			T1	428		T3	2		T22	3
valid_sources[0x4f]	18368	1			T1	605		T9	384		T10	1
valid_sources[0x50]	19645	1			T1	493		T3	1		T23	2
valid_sources[0x51]	20818	1			T1	404		T17	3		T3	1
valid_sources[0x52]	18409	1			T1	574		T23	3		T9	346
valid_sources[0x53]	18634	1			T1	452		T23	1		T9	332
valid_sources[0x54]	19310	1			T1	519		T23	2		T9	362
valid_sources[0x55]	19200	1			T1	555		T9	391		T11	925
valid_sources[0x56]	18361	1			T1	515		T3	2		T29	1
valid_sources[0x57]	17519	1			T1	526		T23	1		T9	329
valid_sources[0x58]	18542	1			T1	600		T26	1		T9	349
valid_sources[0x59]	20332	1			T1	587		T3	1		T9	337
valid_sources[0x5a]	19267	1			T1	456		T3	1		T9	352
valid_sources[0x5b]	18840	1			T1	584		T28	1		T29	1
valid_sources[0x5c]	20905	1			T1	478		T9	337		T33	26
valid_sources[0x5d]	18917	1			T1	526		T9	375		T10	5
valid_sources[0x5e]	19104	1			T1	541		T9	301		T10	5
valid_sources[0x5f]	18559	1			T1	485		T3	3		T29	2
valid_sources[0x60]	19006	1			T1	470		T3	3		T29	2
valid_sources[0x61]	18578	1			T1	513		T17	3		T9	358
valid_sources[0x62]	19496	1			T1	469		T20	7		T9	344
valid_sources[0x63]	19018	1			T1	601		T9	333		T10	2
valid_sources[0x64]	18016	1			T1	477		T17	4		T21	5
valid_sources[0x65]	19154	1			T1	530		T22	3		T28	1
valid_sources[0x66]	19206	1			T1	576		T23	2		T9	343
valid_sources[0x67]	19024	1			T1	524		T3	1		T9	319
valid_sources[0x68]	18851	1			T1	516		T9	305		T10	2
valid_sources[0x69]	18633	1			T1	458		T28	1		T23	1
valid_sources[0x6a]	18448	1			T1	489		T3	4		T28	1
valid_sources[0x6b]	19790	1			T1	398		T3	3		T9	326
valid_sources[0x6c]	19842	1			T1	515		T3	1		T28	1
valid_sources[0x6d]	18933	1			T1	580		T3	3		T9	333
valid_sources[0x6e]	17745	1			T1	527		T26	4		T23	1
valid_sources[0x6f]	19396	1			T1	566		T29	2		T9	341
valid_sources[0x70]	18598	1			T1	483		T3	4		T29	1
valid_sources[0x71]	19671	1			T1	505		T3	3		T28	1
valid_sources[0x72]	18962	1			T1	528		T3	6		T9	314
valid_sources[0x73]	19079	1			T1	555		T3	1		T9	363
valid_sources[0x74]	18684	1			T1	442		T21	2		T23	1
valid_sources[0x75]	20113	1			T1	578		T9	325		T10	1
valid_sources[0x76]	19407	1			T1	479		T9	301		T122	1
valid_sources[0x77]	18291	1			T1	505		T3	2		T9	354
valid_sources[0x78]	19385	1			T1	525		T24	1		T9	362
valid_sources[0x79]	18802	1			T1	531		T23	2		T30	1
valid_sources[0x7a]	18174	1			T1	504		T3	1		T9	318
valid_sources[0x7b]	19865	1			T1	597		T3	4		T24	32
valid_sources[0x7c]	19035	1			T1	484		T23	1		T9	351
valid_sources[0x7d]	19633	1			T1	492		T3	2		T23	1
valid_sources[0x7e]	20593	1			T1	546		T23	1		T9	319
valid_sources[0x7f]	17908	1			T1	567		T23	2		T9	315
valid_sources[0x80]	19034	1			T1	600		T9	284		T11	952

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1052689

1

T5

3

T1

29056

T16

4

values[0x0]

all_enables

biggest_size

1589291

1

T1

43792

T16

3

T17

2

values[0x1]

all_enables

biggest_size

1540527

1

T4

1

T1

43846

T17

3