SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.clkmgr_lost_calib_regwen_sva_if | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
98.65 | 100.00 | 93.24 | 100.00 | 100.00 | 100.00 | dut |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 1 | 1 | 100.00 | 1 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 1 | 1 | 100.00 | 1 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
RegwenOff_A | 172247520 | 20687853 | 0 | 61 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 172247520 | 20687853 | 0 | 61 |
T1 | 364052 | 120167 | 0 | 0 |
T2 | 120484 | 7929 | 0 | 1 |
T3 | 85042 | 18353 | 0 | 1 |
T9 | 0 | 349811 | 0 | 0 |
T10 | 0 | 6325 | 0 | 1 |
T11 | 0 | 138616 | 0 | 0 |
T12 | 0 | 130939 | 0 | 0 |
T13 | 0 | 628375 | 0 | 0 |
T14 | 0 | 857697 | 0 | 0 |
T15 | 0 | 25358 | 0 | 0 |
T16 | 1690 | 0 | 0 | 0 |
T17 | 1810 | 0 | 0 | 0 |
T18 | 3488 | 0 | 0 | 0 |
T19 | 1768 | 0 | 0 | 0 |
T20 | 931 | 0 | 0 | 0 |
T21 | 1919 | 0 | 0 | 0 |
T22 | 1609 | 0 | 0 | 0 |
T80 | 0 | 0 | 0 | 1 |
T124 | 0 | 0 | 0 | 1 |
T125 | 0 | 0 | 0 | 1 |
T126 | 0 | 0 | 0 | 1 |
T127 | 0 | 0 | 0 | 1 |
T128 | 0 | 0 | 0 | 1 |
T129 | 0 | 0 | 0 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |