Unified Coverage Report :: Module :: prim_xor2

Module : prim_xor2

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_prim_abstract_xor2_0/prim_xor2.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_io_step_down_req_sync.gen_flops.gen_stable_chks.u_mubi_xor
tb.dut.u_clkmgr_byp.u_io_ack_sync.gen_flops.gen_stable_chks.u_mubi_xor
tb.dut.u_clkmgr_byp.u_all_ack_sync.gen_flops.gen_stable_chks.u_mubi_xor
tb.dut.u_clk_main_aes_trans.u_idle_sync.gen_flops.gen_stable_chks.u_mubi_xor
tb.dut.u_clk_main_hmac_trans.u_idle_sync.gen_flops.gen_stable_chks.u_mubi_xor
tb.dut.u_clk_main_kmac_trans.u_idle_sync.gen_flops.gen_stable_chks.u_mubi_xor
tb.dut.u_clk_main_otbn_trans.u_idle_sync.gen_flops.gen_stable_chks.u_mubi_xor

---

Module Instance : tb.dut.u_io_step_down_req_sync.gen_flops.gen_stable_chks.u_mubi_xor

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
100.00	100.00	100.00			100.00	100.00	u_io_step_down_req_sync

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_clkmgr_byp.u_io_ack_sync.gen_flops.gen_stable_chks.u_mubi_xor

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
100.00	100.00	100.00			100.00	100.00	u_io_ack_sync

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_clkmgr_byp.u_all_ack_sync.gen_flops.gen_stable_chks.u_mubi_xor

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
100.00	100.00	100.00			100.00	100.00	u_all_ack_sync

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_clk_main_aes_trans.u_idle_sync.gen_flops.gen_stable_chks.u_mubi_xor

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
100.00	100.00	100.00			100.00	100.00	u_idle_sync

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_clk_main_hmac_trans.u_idle_sync.gen_flops.gen_stable_chks.u_mubi_xor

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
100.00	100.00	100.00			100.00	100.00	u_idle_sync

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_clk_main_kmac_trans.u_idle_sync.gen_flops.gen_stable_chks.u_mubi_xor

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
100.00	100.00	100.00			100.00	100.00	u_idle_sync

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_clk_main_otbn_trans.u_idle_sync.gen_flops.gen_stable_chks.u_mubi_xor

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
100.00	100.00	100.00			100.00	100.00	u_idle_sync

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00